1 What: /sys/devices/system/cpu/
3 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
5 A collection of both global and individual CPU attributes
7 Individual CPU attributes are contained in subdirectories
8 named by the kernel's logical CPU number, e.g.:
10 /sys/devices/system/cpu/cpu#/
12 What: /sys/devices/system/cpu/sched_mc_power_savings
13 /sys/devices/system/cpu/sched_smt_power_savings
15 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
16 Description: Discover and adjust the kernel's multi-core scheduler support.
20 0 - No power saving load balance (default value)
21 1 - Fill one thread/core/package first for long running threads
22 2 - Also bias task wakeups to semi-idle cpu package for power
25 sched_mc_power_savings is dependent upon SCHED_MC, which is
26 itself architecture dependent.
28 sched_smt_power_savings is dependent upon SCHED_SMT, which
29 is itself architecture dependent.
31 The two files are independent of each other. It is possible
32 that one file may be present without the other.
34 Introduced by git commit 5c45bf27.
37 What: /sys/devices/system/cpu/kernel_max
38 /sys/devices/system/cpu/offline
39 /sys/devices/system/cpu/online
40 /sys/devices/system/cpu/possible
41 /sys/devices/system/cpu/present
43 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
44 Description: CPU topology files that describe kernel limits related to
47 kernel_max: the maximum cpu index allowed by the kernel
50 offline: cpus that are not online because they have been
51 HOTPLUGGED off or exceed the limit of cpus allowed by the
52 kernel configuration (kernel_max above).
54 online: cpus that are online and being scheduled.
56 possible: cpus that have been allocated resources and can be
57 brought online if they are present.
59 present: cpus that have been identified as being present in
62 See Documentation/cputopology.txt for more information.
65 What: /sys/devices/system/cpu/probe
66 /sys/devices/system/cpu/release
68 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
69 Description: Dynamic addition and removal of CPU's. This is not hotplug
70 removal, this is meant complete removal/addition of the CPU
73 probe: writes to this file will dynamically add a CPU to the
74 system. Information written to the file to add CPU's is
75 architecture specific.
77 release: writes to this file dynamically remove a CPU from
78 the system. Information writtento the file to remove CPU's
79 is architecture specific.
81 What: /sys/devices/system/cpu/cpu#/node
83 Contact: Linux memory management mailing list <linux-mm@kvack.org>
84 Description: Discover NUMA node a CPU belongs to
86 When CONFIG_NUMA is enabled, a symbolic link that points
87 to the corresponding NUMA node directory.
89 For example, the following symlink is created for cpu42
92 /sys/devices/system/cpu/cpu42/node2 -> ../../node/node2
95 What: /sys/devices/system/cpu/cpu#/topology/core_id
96 /sys/devices/system/cpu/cpu#/topology/core_siblings
97 /sys/devices/system/cpu/cpu#/topology/core_siblings_list
98 /sys/devices/system/cpu/cpu#/topology/physical_package_id
99 /sys/devices/system/cpu/cpu#/topology/thread_siblings
100 /sys/devices/system/cpu/cpu#/topology/thread_siblings_list
102 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
103 Description: CPU topology files that describe a logical CPU's relationship
104 to other cores and threads in the same physical package.
106 One cpu# directory is created per logical CPU in the system,
107 e.g. /sys/devices/system/cpu/cpu42/.
109 Briefly, the files above are:
111 core_id: the CPU core ID of cpu#. Typically it is the
112 hardware platform's identifier (rather than the kernel's).
113 The actual value is architecture and platform dependent.
115 core_siblings: internal kernel map of cpu#'s hardware threads
116 within the same physical_package_id.
118 core_siblings_list: human-readable list of the logical CPU
119 numbers within the same physical_package_id as cpu#.
121 physical_package_id: physical package id of cpu#. Typically
122 corresponds to a physical socket number, but the actual value
123 is architecture and platform dependent.
125 thread_siblings: internel kernel map of cpu#'s hardware
126 threads within the same core as cpu#
128 thread_siblings_list: human-readable list of cpu#'s hardware
129 threads within the same core as cpu#
131 See Documentation/cputopology.txt for more information.
134 What: /sys/devices/system/cpu/cpuidle/current_driver
135 /sys/devices/system/cpu/cpuidle/current_governer_ro
137 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
138 Description: Discover cpuidle policy and mechanism
140 Various CPUs today support multiple idle levels that are
141 differentiated by varying exit latencies and power
142 consumption during idle.
144 Idle policy (governor) is differentiated from idle mechanism
147 current_driver: displays current idle mechanism
149 current_governor_ro: displays current idle policy
151 See files in Documentation/cpuidle/ for more information.
154 What: /sys/devices/system/cpu/cpu#/cpufreq/*
155 Date: pre-git history
156 Contact: cpufreq@vger.kernel.org
157 Description: Discover and change clock speed of CPUs
159 Clock scaling allows you to change the clock speed of the
160 CPUs on the fly. This is a nice method to save battery
161 power, because the lower the clock speed, the less power
164 There are many knobs to tweak in this directory.
166 See files in Documentation/cpu-freq/ for more information.
168 In particular, read Documentation/cpu-freq/user-guide.txt
169 to learn how to control the knobs.
172 What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
174 KernelVersion: 2.6.27
175 Contact: mark.langsdorf@amd.com
176 Description: These files exist in every cpu's cache index directories.
177 There are currently 2 cache_disable_# files in each
178 directory. Reading from these files on a supported
179 processor will return that cache disable index value
180 for that processor and node. Writing to one of these
181 files will cause the specificed cache index to be disabled.
183 Currently, only AMD Family 10h Processors support cache index
184 disable, and only for their L3 caches. See the BIOS and
185 Kernel Developer's Guide at
186 http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
187 for formatting information and other details on the
189 Users: joachim.deguara@amd.com