Documentation/devicetree/bindings/arm/atmel-at91.txt

   1 Atmel AT91 device tree bindings.
   2 ================================
   3
   4 Boards with a SoC of the Atmel AT91 or SMART family shall have the following
   5 properties:
   6
   7 Required root node properties:
   8 compatible: must be one of:
   9  * "atmel,at91rm9200"
  10
  11  * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
  12    the specific SoC family or compatible:
  13     o "atmel,at91sam9260"
  14     o "atmel,at91sam9261"
  15     o "atmel,at91sam9263"
  16     o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
  17       SoC compatible:
  18        - "atmel,at91sam9g15"
  19        - "atmel,at91sam9g25"
  20        - "atmel,at91sam9g35"
  21        - "atmel,at91sam9x25"
  22        - "atmel,at91sam9x35"
  23     o "atmel,at91sam9g20"
  24     o "atmel,at91sam9g45"
  25     o "atmel,at91sam9n12"
  26     o "atmel,at91sam9rl"
  27     o "atmel,at91sam9xe"
  28  * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
  29    SoC family:
  30     o "atmel,sama5d3" shall be extended with the specific SoC compatible:
  31        - "atmel,sama5d31"
  32        - "atmel,sama5d33"
  33        - "atmel,sama5d34"
  34        - "atmel,sama5d35"
  35        - "atmel,sama5d36"
  36     o "atmel,sama5d4" shall be extended with the specific SoC compatible:
  37        - "atmel,sama5d41"
  38        - "atmel,sama5d42"
  39        - "atmel,sama5d43"
  40        - "atmel,sama5d44"
  41
  42 PIT Timer required properties:
  43 - compatible: Should be "atmel,at91sam9260-pit"
  44 - reg: Should contain registers location and length
  45 - interrupts: Should contain interrupt for the PIT which is the IRQ line
  46   shared across all System Controller members.
  47
  48 System Timer (ST) required properties:
  49 - compatible: Should be "atmel,at91rm9200-st"
  50 - reg: Should contain registers location and length
  51 - interrupts: Should contain interrupt for the ST which is the IRQ line
  52   shared across all System Controller members.
  53
  54 TC/TCLIB Timer required properties:
  55 - compatible: Should be "atmel,<chip>-tcb".
  56   <chip> can be "at91rm9200" or "at91sam9x5"
  57 - reg: Should contain registers location and length
  58 - interrupts: Should contain all interrupts for the TC block
  59   Note that you can specify several interrupt cells if the TC
  60   block has one interrupt per channel.
  61 - clock-names: tuple listing input clock names.
  62         Required elements: "t0_clk"
  63         Optional elements: "t1_clk", "t2_clk"
  64 - clocks: phandles to input clocks.
  65
  66 Examples:
  67
  68 One interrupt per TC block:
  69         tcb0: timer@fff7c000 {
  70                 compatible = "atmel,at91rm9200-tcb";
  71                 reg = <0xfff7c000 0x100>;
  72                 interrupts = <18 4>;
  73                 clocks = <&tcb0_clk>;
  74                 clock-names = "t0_clk";
  75         };
  76
  77 One interrupt per TC channel in a TC block:
  78         tcb1: timer@fffdc000 {
  79                 compatible = "atmel,at91rm9200-tcb";
  80                 reg = <0xfffdc000 0x100>;
  81                 interrupts = <26 4 27 4 28 4>;
  82                 clocks = <&tcb1_clk>;
  83                 clock-names = "t0_clk";
  84         };
  85
  86 RSTC Reset Controller required properties:
  87 - compatible: Should be "atmel,<chip>-rstc".
  88   <chip> can be "at91sam9260" or "at91sam9g45"
  89 - reg: Should contain registers location and length
  90
  91 Example:
  92
  93         rstc@fffffd00 {
  94                 compatible = "atmel,at91sam9260-rstc";
  95                 reg = <0xfffffd00 0x10>;
  96         };
  97
  98 RAMC SDRAM/DDR Controller required properties:
  99 - compatible: Should be "atmel,at91rm9200-sdramc",
 100                         "atmel,at91sam9260-sdramc",
 101                         "atmel,at91sam9g45-ddramc",
 102                         "atmel,sama5d3-ddramc",
 103 - reg: Should contain registers location and length
 104
 105 Examples:
 106
 107         ramc0: ramc@ffffe800 {
 108                 compatible = "atmel,at91sam9g45-ddramc";
 109                 reg = <0xffffe800 0x200>;
 110         };
 111
 112 SHDWC Shutdown Controller
 113
 114 required properties:
 115 - compatible: Should be "atmel,<chip>-shdwc".
 116   <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
 117 - reg: Should contain registers location and length
 118
 119 optional properties:
 120 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
 121   Supported values are: "none", "high", "low", "any".
 122 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
 123
 124 optional at91sam9260 properties:
 125 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
 126
 127 optional at91sam9rl properties:
 128 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
 129 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
 130
 131 optional at91sam9x5 properties:
 132 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
 133
 134 Example:
 135
 136         rstc@fffffd00 {
 137                 compatible = "atmel,at91sam9260-rstc";
 138                 reg = <0xfffffd00 0x10>;
 139         };
 140
 141 Special Function Registers (SFR)
 142
 143 Special Function Registers (SFR) manage specific aspects of the integrated
 144 memory, bridge implementations, processor and other functionality not controlled
 145 elsewhere.
 146
 147 required properties:
 148 - compatible: Should be "atmel,<chip>-sfr", "syscon".
 149   <chip> can be "sama5d3" or "sama5d4".
 150 - reg: Should contain registers location and length
 151
 152         sfr@f0038000 {
 153                 compatible = "atmel,sama5d3-sfr", "syscon";
 154                 reg = <0xf0038000 0x60>;
 155         };