1 DesignWare HDMI bridge bindings
4 - compatible: platform specific such as:
8 * "rockchip,rk3288-dw-hdmi"
9 - reg: Physical base address and length of the controller's registers.
10 - interrupts: The HDMI interrupt number
11 - clocks, clock-names : must have the phandles to the HDMI iahb and isfr clocks,
12 as described in Documentation/devicetree/bindings/clock/clock-bindings.txt,
13 the clocks are soc specific, the clock-names should be "iahb", "isfr"
14 -port@[X]: SoC specific port nodes with endpoint definitions as defined
15 in Documentation/devicetree/bindings/media/video-interfaces.txt,
16 please refer to the SoC specific binding document:
17 * Documentation/devicetree/bindings/display/imx/hdmi.txt
18 * Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
21 - reg-io-width: the width of the reg:1,4, default set to 1 if not present
22 - ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing,
23 if the property is omitted, a functionally reduced I2C bus
24 controller on DW HDMI is probed
25 - clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"
29 compatible = "fsl,imx6q-hdmi";
30 reg = <0x00120000 0x9000>;
31 interrupts = <0 115 0x04>;
33 clocks = <&clks 123>, <&clks 124>;
34 clock-names = "iahb", "isfr";
35 ddc-i2c-bus = <&i2c2>;
40 hdmi_mux_0: endpoint {
41 remote-endpoint = <&ipu1_di0_hdmi>;
48 hdmi_mux_1: endpoint {
49 remote-endpoint = <&ipu1_di1_hdmi>;