Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt

   1 * Rockchip specific extensions to the Synopsys Designware Mobile
   2   Storage Host Controller
   3
   4 The Synopsys designware mobile storage host controller is used to interface
   5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
   6 differences between the core Synopsys dw mshc controller properties described
   7 by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
   8 extensions to the Synopsys Designware Mobile Storage Host Controller.
   9
  10 Required Properties:
  11
  12 * compatible: should be
  13         - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
  14                                                         before RK3288
  15         - "rockchip,rk3288-dw-mshc": for Rockchip RK3288
  16         - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108
  17         - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
  18         - "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328
  19         - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
  20         - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399
  21
  22 Optional Properties:
  23 * clocks: from common clock binding: if ciu_drive and ciu_sample are
  24   specified in clock-names, should contain handles to these clocks.
  25
  26 * clock-names: Apart from the clock-names described in synopsys-dw-mshc.txt
  27   two more clocks "ciu-drive" and "ciu-sample" are supported. They are used
  28   to control the clock phases, "ciu-sample" is required for tuning high-
  29   speed modes.
  30
  31 * rockchip,default-sample-phase: The default phase to set ciu_sample at
  32   probing, low speeds or in case where all phases work at tuning time.
  33   If not specified 0 deg will be used.
  34
  35 Example:
  36
  37         rkdwmmc0@12200000 {
  38                 compatible = "rockchip,rk3288-dw-mshc";
  39                 reg = <0x12200000 0x1000>;
  40                 interrupts = <0 75 0>;
  41                 #address-cells = <1>;
  42                 #size-cells = <0>;
  43         };