1 ST Ericsson abx500 pinmux controller
4 - compatible: "stericsson,ab8500-gpio", "stericsson,ab8540-gpio",
5 "stericsson,ab8505-gpio", "stericsson,ab9540-gpio",
7 Please refer to pinctrl-bindings.txt in this directory for details of the
8 common pinctrl bindings used by client devices, including the meaning of the
9 phrase "pin configuration node".
11 ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
12 subnodes. Each of these subnodes represents some desired configuration for a
13 pin, a group, or a list of pins or groups. This configuration can include the
14 mux function to select on those pin(s)/group(s), and various pin configuration
15 parameters, such as input, output, pull up, pull down...
17 The name of each subnode is not important; all subnodes should be enumerated
18 and processed purely based on their content.
20 Required subnode-properties:
21 - ste,pins : An array of strings. Each string contains the name of a pin or
24 Optional subnode-properties:
25 - ste,function: A string containing the name of the function to mux to the
28 - generic pin configuration option to use. Example :
35 - ste,config: Handle of pin configuration node containing the generic
36 pinconfig options to use, as described in pinctrl-bindings.txt in
37 this directory. Example :
39 pcfg_bias_disable: pcfg_bias_disable {
45 ste.config = <&pcfg_bias_disable>;
48 Example board file extract:
51 pinctrl-names = "default";
52 pinctrl-0 = <&sysclkreq2_default_mode>, <&sysclkreq3_default_mode>, <&gpio3_default_mode>, <&sysclkreq6_default_mode>, <&pwmout1_default_mode>, <&pwmout2_default_mode>, <&pwmout3_default_mode>, <&adi1_default_mode>, <&dmic12_default_mode>, <&dmic34_default_mode>, <&dmic56_default_mode>, <&sysclkreq5_default_mode>, <&batremn_default_mode>, <&service_default_mode>, <&pwrctrl0_default_mode>, <&pwrctrl1_default_mode>, <&pwmextvibra1_default_mode>, <&pwmextvibra2_default_mode>, <&gpio51_default_mode>, <&gpio52_default_mode>, <&gpio53_default_mode>, <&gpio54_default_mode>, <&pdmclkdat_default_mode>;
55 sysclkreq2_default_mode: sysclkreq2_default {
57 ste,function = "sysclkreq";
58 ste,pins = "sysclkreq2_d_1";
67 sysclkreq3_default_mode: sysclkreq3_default {
69 ste,function = "sysclkreq";
70 ste,pins = "sysclkreq3_d_1";
79 gpio3_default_mode: gpio3_default {
81 ste,function = "gpio";
82 ste,pins = "gpio3_a_1";
91 sysclkreq6_default_mode: sysclkreq6_default {
93 ste,function = "sysclkreq";
94 ste,pins = "sysclkreq6_d_1";
103 pwmout1_default_mode: pwmout1_default {
105 ste,function = "pwmout";
106 ste,pins = "pwmout1_d_1";
115 pwmout2_default_mode: pwmout2_default {
116 pwmout2_default_mux {
117 ste,function = "pwmout";
118 ste,pins = "pwmout2_d_1";
120 pwmout2_default_cfg {
127 pwmout3_default_mode: pwmout3_default {
128 pwmout3_default_mux {
129 ste,function = "pwmout";
130 ste,pins = "pwmout3_d_1";
132 pwmout3_default_cfg {
140 adi1_default_mode: adi1_default {
142 ste,function = "adi1";
143 ste,pins = "adi1_d_1";
146 ste,pins = "GPIO17","GPIO19","GPIO20";
156 dmic12_default_mode: dmic12_default {
158 ste,function = "dmic";
159 ste,pins = "dmic12_d_1";
161 dmic12_default_cfg1 {
165 dmic12_default_cfg2 {
172 dmic34_default_mode: dmic34_default {
174 ste,function = "dmic";
175 ste,pins = "dmic34_d_1";
177 dmic34_default_cfg1 {
181 dmic34_default_cfg2 {
189 dmic56_default_mode: dmic56_default {
191 ste,function = "dmic";
192 ste,pins = "dmic56_d_1";
194 dmic56_default_cfg1 {
198 dmic56_default_cfg2 {
205 sysclkreq5_default_mode: sysclkreq5_default {
206 sysclkreq5_default_mux {
207 ste,function = "sysclkreq";
208 ste,pins = "sysclkreq5_d_1";
210 sysclkreq5_default_cfg {
217 batremn_default_mode: batremn_default {
218 batremn_default_mux {
219 ste,function = "batremn";
220 ste,pins = "batremn_d_1";
222 batremn_default_cfg {
229 service_default_mode: service_default {
230 service_default_mux {
231 ste,function = "service";
232 ste,pins = "service_d_1";
234 service_default_cfg {
241 pwrctrl0_default_mux: pwrctrl0_mux {
242 pwrctrl0_default_mux {
243 ste,function = "pwrctrl";
244 ste,pins = "pwrctrl0_d_1";
247 pwrctrl0_default_mode: pwrctrl0_default {
248 pwrctrl0_default_cfg {
255 pwrctrl1_default_mux: pwrctrl1_mux {
256 pwrctrl1_default_mux {
257 ste,function = "pwrctrl";
258 ste,pins = "pwrctrl1_d_1";
261 pwrctrl1_default_mode: pwrctrl1_default {
262 pwrctrl1_default_cfg {
269 pwmextvibra1_default_mode: pwmextvibra1_default {
270 pwmextvibra1_default_mux {
271 ste,function = "pwmextvibra";
272 ste,pins = "pwmextvibra1_d_1";
274 pwmextvibra1_default_cfg {
281 pwmextvibra2_default_mode: pwmextvibra2_default {
282 pwmextvibra2_default_mux {
283 ste,function = "pwmextvibra";
284 ste,pins = "pwmextvibra2_d_1";
286 pwmextvibra1_default_cfg {
293 gpio51_default_mode: gpio51_default {
295 ste,function = "gpio";
296 ste,pins = "gpio51_a_1";
305 gpio52_default_mode: gpio52_default {
307 ste,function = "gpio";
308 ste,pins = "gpio52_a_1";
317 gpio53_default_mode: gpio53_default {
319 ste,function = "gpio";
320 ste,pins = "gpio53_a_1";
329 gpio54_default_mode: gpio54_default {
331 ste,function = "gpio";
332 ste,pins = "gpio54_a_1";
341 pdmclkdat_default_mode: pdmclkdat_default {
342 pdmclkdat_default_mux {
343 ste,function = "pdm";
344 ste,pins = "pdmclkdat_d_1";
346 pdmclkdat_default_cfg {
347 ste,pins = "GPIO55", "GPIO56";