Documentation/devicetree/bindings/pwm/pwm-mediatek.txt

   1 MediaTek PWM controller
   2
   3 Required properties:
   4  - compatible: should be "mediatek,<name>-pwm":
   5    - "mediatek,mt7623-pwm": found on mt7623 SoC.
   6  - reg: physical base address and length of the controller's registers.
   7  - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
   8    the cell format.
   9  - clocks: phandle and clock specifier of the PWM reference clock.
  10  - clock-names: must contain the following:
  11    - "top": the top clock generator
  12    - "main": clock used by the PWM core
  13    - "pwm1-5": the five per PWM clocks
  14  - pinctrl-names: Must contain a "default" entry.
  15  - pinctrl-0: One property must exist for each entry in pinctrl-names.
  16    See pinctrl/pinctrl-bindings.txt for details of the property values.
  17
  18 Example:
  19         pwm0: pwm@11006000 {
  20                 compatible = "mediatek,mt7623-pwm";
  21                 reg = <0 0x11006000 0 0x1000>;
  22                 #pwm-cells = <2>;
  23                 clocks = <&topckgen CLK_TOP_PWM_SEL>,
  24                          <&pericfg CLK_PERI_PWM>,
  25                          <&pericfg CLK_PERI_PWM1>,
  26                          <&pericfg CLK_PERI_PWM2>,
  27                          <&pericfg CLK_PERI_PWM3>,
  28                          <&pericfg CLK_PERI_PWM4>,
  29                          <&pericfg CLK_PERI_PWM5>;
  30                 clock-names = "top", "main", "pwm1", "pwm2",
  31                               "pwm3", "pwm4", "pwm5";
  32                 pinctrl-names = "default";
  33                 pinctrl-0 = <&pwm0_pins>;
  34         };