1 * UART (Universal Asynchronous Receiver/Transmitter)
11 - "nvidia,tegra20-uart"
13 - "ibm,qpace-nwp-serial"
16 - "altr,16550-FIFO128"
17 - "serial" if the port type is unknown.
18 - reg : offset and length of the register set for the device.
19 - interrupts : should contain uart interrupt.
20 - clock-frequency : the input clock frequency for the UART
22 clocks phandle to refer to the clk used as per Documentation/devicetree
23 /bindings/clock/clock-bindings.txt
26 - current-speed : the current active speed of the UART.
27 - reg-offset : offset to apply to the mapbase from the start of the registers.
28 - reg-shift : quantity to shift the register offsets by.
29 - reg-io-width : the size (in bytes) of the IO accesses that should be
30 performed on the device. There are some systems that require 32-bit
31 accesses to the UART (e.g. TI davinci).
32 - used-by-rtas : set to indicate that the port is in use by the OpenFirmware
33 RTAS and should not be registered.
34 - no-loopback-test: set to indicate that the port does not implements loopback
36 - fifo-size: the fifo size of the UART.
37 - auto-flow-control: one way to enable automatic flow control support. The
38 driver is allowed to detect support for the capability even without this
44 compatible = "ns8250";
45 reg = <0x80230000 0x100>;
46 clock-frequency = <3686400>;