1 * VIA VT8500 and WonderMedia WM8xxx UART Controller
4 - compatible: should be "via,vt8500-uart"
6 - reg: base physical address of the controller and length of memory mapped
9 - interrupts: hardware interrupt number
11 - clocks: shall be the input parent clock phandle for the clock. This should
12 be the 24Mhz reference clock.
14 Aliases may be defined to ensure the correct ordering of the uarts.
21 uart0: serial@d8200000 {
22 compatible = "via,vt8500-uart";
23 reg = <0xd8200000 0x1040>;