1 Renesas MSIOF spi controller
4 - compatible : "renesas,msiof-<soctype>" for SoCs,
5 "renesas,sh-msiof" for SuperH, or
6 "renesas,sh-mobile-msiof" for SH Mobile series.
7 Examples with soctypes are:
8 "renesas,msiof-r8a7790" (R-Car H2)
9 - reg : A list of offsets and lengths of the register sets for
11 If only one register set is present, it is to be used
12 by both the CPU and the DMA engine.
13 If two register sets are present, the first is to be
14 used by the CPU, and the second is to be used by the
16 - interrupt-parent : The phandle for the interrupt controller that
17 services interrupts for this device
18 - interrupts : Interrupt specifier
19 - #address-cells : Must be <1>
20 - #size-cells : Must be <0>
23 - clocks : Must contain a reference to the functional clock.
24 - num-cs : Total number of chip-selects (default is 1)
25 - dmas : Must contain a list of two references to DMA
26 specifiers, one for transmission, and one for
28 - dma-names : Must contain a list of two DMA names, "tx" and "rx".
30 Optional properties, deprecated for soctype-specific bindings:
31 - renesas,tx-fifo-size : Overrides the default tx fifo size given in words
33 - renesas,rx-fifo-size : Overrides the default rx fifo size given in words
34 (default is 64, or 256 on R-Car H2 and M2)
36 Pinctrl properties might be needed, too. See
37 Documentation/devicetree/bindings/pinctrl/renesas,*.
41 msiof0: spi@e6e20000 {
42 compatible = "renesas,msiof-r8a7791";
43 reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>;
44 interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
45 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
46 dmas = <&dmac0 0x51>, <&dmac0 0x52>;
47 dma-names = "tx", "rx";