1 * Rockchip SPI Controller
3 The Rockchip SPI controller is used to interface with various devices such as flash
4 and display controllers using the SPI communication interface.
8 - compatible: should be one of the following.
9 "rockchip,rk3036-spi" for rk3036 SoCS.
10 "rockchip,rk3066-spi" for rk3066 SoCs.
11 "rockchip,rk3188-spi" for rk3188 SoCs.
12 "rockchip,rk3228-spi" for rk3228 SoCS.
13 "rockchip,rk3288-spi" for rk3288 SoCs.
14 "rockchip,rk3368-spi" for rk3368 SoCs.
15 "rockchip,rk3399-spi" for rk3399 SoCs.
16 - reg: physical base address of the controller and length of memory mapped
18 - interrupts: The interrupt number to the cpu. The interrupt specifier format
19 depends on the interrupt controller.
20 - clocks: Must contain an entry for each entry in clock-names.
21 - clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for
23 - #address-cells: should be 1.
24 - #size-cells: should be 0.
28 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
29 Documentation/devicetree/bindings/dma/dma.txt
30 - dma-names: DMA request names should include "tx" and "rx" if present.
31 - rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
32 Rx data (may need to be fine tuned for high capacitance lines).
33 No delay (0) by default.
34 - pinctrl-names: Names for the pin configuration(s); may be "default" or
35 "sleep", where the "sleep" configuration may describe the state
36 the pins should be in during system suspend. See also
37 pinctrl/pinctrl-bindings.txt.
43 compatible = "rockchip,rk3066-spi";
44 reg = <0xff110000 0x1000>;
45 dmas = <&pdma1 11>, <&pdma1 12>;
46 dma-names = "tx", "rx";
47 rx-sample-delay-ns = <10>;
50 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
51 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
52 clock-names = "spiclk", "apb_pclk";
53 pinctrl-0 = <&spi1_pins>;
54 pinctrl-1 = <&spi1_sleep>;
55 pinctrl-names = "default", "sleep";