1 * Samsung's usb phy transceiver
3 The Samsung's phy transceiver is used for controlling usb phy for
4 s3c-hsotg as well as ehci-s5p and ohci-exynos usb controllers
6 TODO: Adding the PHY binding with controller(s) according to the under
7 developement generic PHY driver.
12 - compatible : should be "samsung,exynos4210-usbphy"
13 - reg : base physical address of the phy registers and length of memory mapped
17 - compatible : should be "samsung,exynos5250-usbphy"
18 - reg : base physical address of the phy registers and length of memory mapped
22 - #address-cells: should be '1' when usbphy node has a child node with 'reg'
24 - #size-cells: should be '1' when usbphy node has a child node with 'reg'
26 - ranges: allows valid translation between child's address space and parent's
29 - The child node 'usbphy-sys' to the node 'usbphy' is for the system controller
30 interface for usb-phy. It should provide the following information required by
31 usb-phy controller to control phy.
32 - reg : base physical address of PHY_CONTROL registers.
33 The size of this register is the total sum of size of all PHY_CONTROL
34 registers that the SoC has. For example, the size will be
35 '0x4' in case we have only one PHY_CONTROL register (e.g.
36 OTHERS register in S3C64XX or USB_PHY_CONTROL register in S5PV210)
37 and, '0x8' in case we have two PHY_CONTROL registers (e.g.
38 USBDEVICE_PHY_CONTROL and USBHOST_PHY_CONTROL registers in exynos4x).
47 compatible = "samsung,exynos4210-usbphy";
48 reg = <0x125B0000 0x100>;
52 /* USB device and host PHY_CONTROL registers */
53 reg = <0x10020704 0x8>;