1 #ifndef __ASM_ALPHA_FPU_H
2 #define __ASM_ALPHA_FPU_H
4 #include <asm/special_insns.h>
5 #include <uapi/asm/fpu.h>
7 /* The following two functions don't need trapb/excb instructions
8 around the mf_fpcr/mt_fpcr instructions because (a) the kernel
9 never generates arithmetic faults and (b) call_pal instructions
10 are implied trap barriers. */
12 static inline unsigned long
15 unsigned long tmp, ret;
17 #if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)
18 __asm__ __volatile__ (
23 : "=r"(tmp), "=r"(ret));
25 __asm__ __volatile__ (
30 : "=m"(tmp), "=m"(ret));
37 wrfpcr(unsigned long val)
41 #if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)
42 __asm__ __volatile__ (
47 : "=&r"(tmp) : "r"(val));
49 __asm__ __volatile__ (
54 : "=m"(tmp) : "m"(val));
58 static inline unsigned long
59 swcr_update_status(unsigned long swcr, unsigned long fpcr)
61 /* EV6 implements most of the bits in hardware. Collect
62 the acrued exception bits from the real fpcr. */
63 if (implver() == IMPLVER_EV6) {
64 swcr &= ~IEEE_STATUS_MASK;
65 swcr |= (fpcr >> 35) & IEEE_STATUS_MASK;
70 extern unsigned long alpha_read_fp_reg (unsigned long reg);
71 extern void alpha_write_fp_reg (unsigned long reg, unsigned long val);
72 extern unsigned long alpha_read_fp_reg_s (unsigned long reg);
73 extern void alpha_write_fp_reg_s (unsigned long reg, unsigned long val);
75 #endif /* __ASM_ALPHA_FPU_H */