6 #include <linux/spinlock.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/scatterlist.h>
9 #include <asm/machvec.h>
12 * The following structure is used to manage multiple PCI busses.
18 struct pci_iommu_arena;
21 /* A controller. Used to manage multiple PCI busses. */
23 struct pci_controller {
24 struct pci_controller *next;
26 struct resource *io_space;
27 struct resource *mem_space;
29 /* The following are for reporting to userland. The invariant is
30 that if we report a BWX-capable dense memory, we do not report
31 a sparse memory at all, even if it exists. */
32 unsigned long sparse_mem_base;
33 unsigned long dense_mem_base;
34 unsigned long sparse_io_base;
35 unsigned long dense_io_base;
37 /* This one's for the kernel only. It's in KSEG somewhere. */
38 unsigned long config_space_base;
41 /* For compatibility with current (as of July 2003) pciutils
42 and XFree86. Eventually will be removed. */
43 unsigned int need_domain_info;
45 struct pci_iommu_arena *sg_pci;
46 struct pci_iommu_arena *sg_isa;
51 /* Override the logic in pci_scan_bus for skipping already-configured
54 #define pcibios_assign_all_busses() 1
56 #define PCIBIOS_MIN_IO alpha_mv.min_io_address
57 #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
59 extern void pcibios_set_master(struct pci_dev *dev);
63 /* The PCI address space does not equal the physical memory address space.
64 The networking and block device layers use this boolean for bounce buffer
66 #define PCI_DMA_BUS_IS_PHYS 0
70 /* implement the pci_ DMA API in terms of the generic device dma_ one */
71 #include <asm-generic/pci-dma-compat.h>
75 /* TODO: integrate with include/asm-generic/pci.h ? */
76 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
78 return channel ? 15 : 14;
81 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
83 static inline int pci_proc_domain(struct pci_bus *bus)
85 struct pci_controller *hose = bus->sysdata;
86 return hose->need_domain_info;
89 #endif /* __KERNEL__ */
91 /* Values for the `which' argument to sys_pciconfig_iobase. */
93 #define IOBASE_SPARSE_MEM 1
94 #define IOBASE_DENSE_MEM 2
95 #define IOBASE_SPARSE_IO 3
96 #define IOBASE_DENSE_IO 4
97 #define IOBASE_ROOT_BUS 5
98 #define IOBASE_FROM_HOSE 0x10000
100 extern struct pci_dev *isa_bridge;
102 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
104 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
106 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
107 struct vm_area_struct *vma,
108 enum pci_mmap_state mmap_state);
109 extern void pci_adjust_legacy_attr(struct pci_bus *bus,
110 enum pci_mmap_state mmap_type);
111 #define HAVE_PCI_LEGACY 1
113 extern int pci_create_resource_files(struct pci_dev *dev);
114 extern void pci_remove_resource_files(struct pci_dev *dev);
116 #endif /* __ALPHA_PCI_H */