2 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 # This program is free software; you can redistribute it and/or modify
5 # it under the terms of the GNU General Public License version 2 as
6 # published by the Free Software Foundation.
11 select BUILDTIME_EXTABLE_SORT
13 select CLONE_BACKWARDS
14 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
15 select DEVTMPFS if !INITRAMFS_SOURCE=""
16 select GENERIC_ATOMIC64
17 select GENERIC_CLOCKEVENTS
18 select GENERIC_FIND_FIRST_BIT
19 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
20 select GENERIC_IRQ_SHOW
21 select GENERIC_PENDING_IRQ if SMP
22 select GENERIC_SMP_IDLE_THREAD
24 select HAVE_ARCH_TRACEHOOK
25 select HAVE_IOREMAP_PROT
27 select HAVE_KRETPROBES
29 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
31 select HAVE_PERF_EVENTS
33 select MODULES_USE_ELF_RELA
36 select OF_EARLY_FLATTREE
37 select PERF_USE_VMALLOC
38 select HAVE_DEBUG_STACKOVERFLOW
40 config TRACE_IRQFLAGS_SUPPORT
43 config LOCKDEP_SUPPORT
46 config SCHED_OMIT_FRAME_POINTER
52 config RWSEM_GENERIC_SPINLOCK
55 config ARCH_FLATMEM_ENABLE
64 config GENERIC_CALIBRATE_DELAY
67 config GENERIC_HWEIGHT
70 config STACKTRACE_SUPPORT
74 config HAVE_LATENCYTOP_SUPPORT
78 source "kernel/Kconfig.freezer"
80 menu "ARC Architecture Configuration"
82 menu "ARC Platform/SoC/Board"
84 source "arch/arc/plat-sim/Kconfig"
85 source "arch/arc/plat-tb10x/Kconfig"
86 source "arch/arc/plat-axs10x/Kconfig"
87 #New platform adds here
92 prompt "ARC Instruction Set"
98 The original ARC ISA of ARC600/700 cores
103 ISA for the Next Generation ARC-HS cores
107 menu "ARC CPU Configuration"
111 default ARC_CPU_770 if ISA_ARCOMPACT
112 default ARC_CPU_HS if ISA_ARCV2
120 Support for ARC750 core
126 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
127 This core has a bunch of cool new features:
128 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
129 Shared Address Spaces (for sharing TLB entires in MMU)
130 -Caches: New Prog Model, Region Flush
131 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
139 Support for ARC HS38x Cores based on ARCv2 ISA
140 The notable features are:
141 - SMP configurations of upto 4 core with coherency
142 - Optional L2 Cache and IO-Coherency
143 - Revised Interrupt Architecture (multiple priorites, reg banks,
144 auto stack switch, auto regfile save/restore)
145 - MMUv4 (PIPT dcache, Huge Pages)
147 * 64bit load/store: LDD, STD
148 * Hardware assisted divide/remainder: DIV, REM
149 * Function prologue/epilogue: ENTER_S, LEAVE_S
150 * IRQ enable/disable: CLRI, SETI
151 * pop count: FFS, FLS
152 * SETcc, BMSKN, XBFU...
156 config CPU_BIG_ENDIAN
157 bool "Enable Big Endian Mode"
160 Build kernel for Big Endian Mode of ARC CPU
163 bool "Symmetric Multi-Processing"
165 select ARC_HAS_COH_CACHES if ISA_ARCV2
166 select ARC_MCIP if ISA_ARCV2
168 This enables support for systems with more than one CPU.
172 config ARC_HAS_COH_CACHES
175 config ARC_HAS_REENTRANT_IRQ_LV2
179 bool "ARConnect Multicore IP (MCIP) Support "
182 This IP block enables SMP in ARC-HS38 cores.
183 It provides for cross-core interrupts, multi-core debug
184 hardware semaphores, shared memory,....
187 int "Maximum number of CPUs (2-4096)"
194 bool "Enable Cache Support"
196 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
197 depends on !SMP || ARC_HAS_COH_CACHES
201 config ARC_CACHE_LINE_SHIFT
202 int "Cache Line Length (as power of 2)"
206 Starting with ARC700 4.9, Cache line length is configurable,
207 This option specifies "N", with Line-len = 2 power N
208 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
209 Linux only supports same line lengths for I and D caches.
211 config ARC_HAS_ICACHE
212 bool "Use Instruction Cache"
215 config ARC_HAS_DCACHE
216 bool "Use Data Cache"
219 config ARC_CACHE_PAGES
220 bool "Per Page Cache Control"
222 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
224 This can be used to over-ride the global I/D Cache Enable on a
225 per-page basis (but only for pages accessed via MMU such as
226 Kernel Virtual address or User Virtual Address)
227 TLB entries have a per-page Cache Enable Bit.
228 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
229 Global DISABLE + Per Page ENABLE won't work
231 config ARC_CACHE_VIPT_ALIASING
232 bool "Support VIPT Aliasing D$"
233 depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
241 Single Cycle RAMS to store Fast Path Code
245 int "ICCM Size in KB"
247 depends on ARC_HAS_ICCM
252 Single Cycle RAMS to store Fast Path Data
256 int "DCCM Size in KB"
258 depends on ARC_HAS_DCCM
261 hex "DCCM map address"
263 depends on ARC_HAS_DCCM
265 config ARC_HAS_HW_MPY
266 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
269 Influences how gcc generates code for MPY operations.
270 If enabled, MPYxx insns are generated, provided by Standard/XMAC
271 Multipler. Otherwise software multipy lib is used
275 default ARC_MMU_V3 if ARC_CPU_770
276 default ARC_MMU_V2 if ARC_CPU_750D
277 default ARC_MMU_V4 if ARC_CPU_HS
287 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
288 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
292 depends on ARC_CPU_770
294 Introduced with ARC700 4.10: New Features
295 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
296 Shared Address Spaces (SASID)
306 prompt "MMU Page Size"
307 default ARC_PAGE_SIZE_8K
309 config ARC_PAGE_SIZE_8K
312 Choose between 8k vs 16k
314 config ARC_PAGE_SIZE_16K
316 depends on ARC_MMU_V3
318 config ARC_PAGE_SIZE_4K
320 depends on ARC_MMU_V3
326 config ARC_COMPACT_IRQ_LEVELS
327 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
329 # Timer HAS to be high priority, for any other high priority config
331 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
332 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
334 if ARC_COMPACT_IRQ_LEVELS
345 endif #ARC_COMPACT_IRQ_LEVELS
347 config ARC_FPU_SAVE_RESTORE
348 bool "Enable FPU state persistence across context switch"
351 Double Precision Floating Point unit had dedictaed regs which
352 need to be saved/restored across context-switch.
353 Note that ARC FPU is overly simplistic, unlike say x86, which has
354 hardware pieces to allow software to conditionally save/restore,
355 based on actual usage of FPU by a task. Thus our implemn does
356 this for all tasks in system.
364 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
366 depends on !ARC_CANT_LLSC
369 bool "Insn: SWAPE (endian-swap)"
375 bool "Insn: 64bit LDD/STD"
377 Enable gcc to generate 64-bit load/store instructions
378 ISA mandates even/odd registers to allow encoding of two
379 dest operands with 2 possible source operands.
383 bool "Local 64-bit r/o cycle counter"
388 bool "SMP synchronized 64-bit cycle counter"
392 config ARC_NUMBER_OF_INTERRUPTS
393 int "Number of interrupts"
397 This defines the number of interrupts on the ARCv2HS core.
398 It affects the size of vector table.
399 The initial 8 IRQs are fixed (Timer, ICI etc) and although configurable
400 in hardware, it keep things simple for Linux to assume they are always
405 endmenu # "ARC CPU Configuration"
407 config LINUX_LINK_BASE
408 hex "Linux Link Address"
411 ARC700 divides the 32 bit phy address space into two equal halves
412 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
413 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
414 Typically Linux kernel is linked at the start of untransalted addr,
415 hence the default value of 0x8zs.
416 However some customers have peripherals mapped at this addr, so
417 Linux needs to be scooted a bit.
418 If you don't know what the above means, leave this setting alone.
420 config ARC_CURR_IN_REG
421 bool "Dedicate Register r25 for current_task pointer"
424 This reserved Register R25 to point to Current Task in
425 kernel mode. This saves memory access for each such access
428 config ARC_EMUL_UNALIGNED
429 bool "Emulate unaligned memory access (userspace only)"
431 select SYSCTL_ARCH_UNALIGN_NO_WARN
432 select SYSCTL_ARCH_UNALIGN_ALLOW
433 depends on ISA_ARCOMPACT
435 This enables misaligned 16 & 32 bit memory access from user space.
436 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
437 potential bugs in code
440 int "Timer Frequency"
443 config ARC_METAWARE_HLINK
444 bool "Support for Metaware debugger assisted Host access"
447 This options allows a Linux userland apps to directly access
448 host file system (open/creat/read/write etc) with help from
449 Metaware Debugger. This can come in handy for Linux-host communication
450 when there is no real usable peripheral such as EMAC.
458 config ARC_DW2_UNWIND
459 bool "Enable DWARF specific kernel stack unwind"
463 Compiles the kernel with DWARF unwind information and can be used
464 to get stack backtraces.
466 If you say Y here the resulting kernel image will be slightly larger
467 but not slower, and it will give very useful debugging information.
468 If you don't debug the kernel, you can say N, but we may not be able
469 to solve problems without frame unwind information
471 config ARC_DBG_TLB_PARANOIA
472 bool "Paranoia Checks in Low Level TLB Handlers"
475 config ARC_DBG_TLB_MISS_COUNT
476 bool "Profile TLB Misses"
480 Counts number of I and D TLB Misses and exports them via Debugfs
481 The counters can be cleared via Debugfs as well
486 bool "Debug Inter Core interrupts"
493 config ARC_UBOOT_SUPPORT
494 bool "Support uboot arg Handling"
497 ARC Linux by default checks for uboot provided args as pointers to
498 external cmdline or DTB. This however breaks in absence of uboot,
499 when booting from Metaware debugger directly, as the registers are
500 not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
501 registers look like uboot args to kernel which then chokes.
502 So only enable the uboot arg checking/processing if users are sure
503 of uboot being in play.
505 config ARC_BUILTIN_DTB_NAME
506 string "Built in DTB"
508 Set the name of the DTB to embed in the vmlinux binary
509 Leaving it blank selects the minimal "skeleton" dtb
511 source "kernel/Kconfig.preempt"
513 menu "Executable file formats"
514 source "fs/Kconfig.binfmt"
517 endmenu # "ARC Architecture Configuration"
521 source "drivers/Kconfig"
523 source "arch/arc/Kconfig.debug"
524 source "security/Kconfig"
525 source "crypto/Kconfig"
527 source "kernel/power/Kconfig"