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ARC: Atomic/bitops/cmpxchg/barriers
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1 /*
2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 #ifndef __ASM_ARC_SMP_H
10 #define __ASM_ARC_SMP_H
11
12 /*
13  * ARC700 doesn't support atomic Read-Modify-Write ops.
14  * Originally Interrupts had to be disabled around code to gaurantee atomicity.
15  * The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
16  * based on retry-if-irq-in-atomic (with hardware assist).
17  * However despite these, we provide the IRQ disabling variant
18  *
19  * (1) These insn were introduced only in 4.10 release. So for older released
20  *      support needed.
21  */
22 #ifndef CONFIG_ARC_HAS_LLSC
23
24 #include <linux/irqflags.h>
25
26 #define atomic_ops_lock(flags)          local_irq_save(flags)
27 #define atomic_ops_unlock(flags)        local_irq_restore(flags)
28
29 #define bitops_lock(flags)              local_irq_save(flags)
30 #define bitops_unlock(flags)            local_irq_restore(flags)
31
32 #endif  /* !CONFIG_ARC_HAS_LLSC */
33
34 #endif