8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17 select HAVE_GENERIC_DMA_COHERENT
18 select HAVE_KERNEL_GZIP
19 select HAVE_KERNEL_LZO
20 select HAVE_KERNEL_LZMA
22 select HAVE_PERF_EVENTS
23 select PERF_USE_VMALLOC
24 select HAVE_REGS_AND_STACK_ACCESS_API
25 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
27 The ARM series is a line of low-power-consumption RISC chip designs
28 licensed by ARM Ltd and targeted at embedded applications and
29 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
30 manufactured, but legacy ARM-based PC hardware remains popular in
31 Europe. There is an ARM Linux project with a web page at
32 <http://www.arm.linux.org.uk/>.
37 config SYS_SUPPORTS_APM_EMULATION
43 config ARCH_USES_GETTIMEOFFSET
47 config GENERIC_CLOCKEVENTS
50 config GENERIC_CLOCKEVENTS_BROADCAST
52 depends on GENERIC_CLOCKEVENTS
57 select GENERIC_ALLOCATOR
68 The Extended Industry Standard Architecture (EISA) bus was
69 developed as an open alternative to the IBM MicroChannel bus.
71 The EISA bus provided some of the features of the IBM MicroChannel
72 bus while maintaining backward compatibility with cards made for
73 the older ISA bus. The EISA bus saw limited use between 1988 and
74 1995 when it was made obsolete by the PCI bus.
76 Say Y here if you are building a kernel for an EISA-based machine.
86 MicroChannel Architecture is found in some IBM PS/2 machines and
87 laptops. It is a bus system similar to PCI or ISA. See
88 <file:Documentation/mca.txt> (and especially the web page given
89 there) before attempting to build an MCA bus kernel.
91 config GENERIC_HARDIRQS
95 config STACKTRACE_SUPPORT
99 config HAVE_LATENCYTOP_SUPPORT
104 config LOCKDEP_SUPPORT
108 config TRACE_IRQFLAGS_SUPPORT
112 config HARDIRQS_SW_RESEND
116 config GENERIC_IRQ_PROBE
120 config GENERIC_LOCKBREAK
123 depends on SMP && PREEMPT
125 config RWSEM_GENERIC_SPINLOCK
129 config RWSEM_XCHGADD_ALGORITHM
132 config ARCH_HAS_ILOG2_U32
135 config ARCH_HAS_ILOG2_U64
138 config ARCH_HAS_CPUFREQ
141 Internal node to signify that the ARCH has CPUFREQ support
142 and that the relevant menu configurations are displayed for
145 config ARCH_HAS_CPU_IDLE_WAIT
148 config GENERIC_HWEIGHT
152 config GENERIC_CALIBRATE_DELAY
156 config ARCH_MAY_HAVE_PC_FDC
162 config NEED_DMA_MAP_STATE
165 config GENERIC_ISA_DMA
174 config GENERIC_HARDIRQS_NO__DO_IRQ
177 config ARM_L1_CACHE_SHIFT_6
180 Setting ARM L1 cache line size to 64 Bytes.
184 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
185 default DRAM_BASE if REMAP_VECTORS_TO_RAM
188 The base address of exception vectors.
190 source "init/Kconfig"
192 source "kernel/Kconfig.freezer"
197 bool "MMU-based Paged Memory Management Support"
200 Select if you want MMU-based virtualised addressing space
201 support by paged memory management. If unsure, say 'Y'.
204 # The "ARM system type" choice list is ordered alphabetically by option
205 # text. Please add new entries in the option alphabetic order.
208 prompt "ARM system type"
209 default ARCH_VERSATILE
212 bool "Agilent AAEC-2000 based"
216 select ARCH_USES_GETTIMEOFFSET
218 This enables support for systems based on the Agilent AAEC-2000
220 config ARCH_INTEGRATOR
221 bool "ARM Ltd. Integrator family"
223 select ARCH_HAS_CPUFREQ
226 select GENERIC_CLOCKEVENTS
227 select PLAT_VERSATILE
229 Support for ARM's Integrator platform.
232 bool "ARM Ltd. RealView family"
236 select GENERIC_CLOCKEVENTS
237 select ARCH_WANT_OPTIONAL_GPIOLIB
238 select PLAT_VERSATILE
239 select ARM_TIMER_SP804
240 select GPIO_PL061 if GPIOLIB
242 This enables support for ARM Ltd RealView boards.
244 config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
250 select GENERIC_CLOCKEVENTS
251 select ARCH_WANT_OPTIONAL_GPIOLIB
252 select PLAT_VERSATILE
253 select ARM_TIMER_SP804
255 This enables support for ARM Ltd Versatile board.
258 bool "ARM Ltd. Versatile Express family"
259 select ARCH_WANT_OPTIONAL_GPIOLIB
261 select ARM_TIMER_SP804
263 select GENERIC_CLOCKEVENTS
266 select PLAT_VERSATILE
268 This enables support for the ARM Ltd Versatile Express boards.
272 select ARCH_REQUIRE_GPIOLIB
275 This enables support for systems based on the Atmel AT91RM9200,
276 AT91SAM9 and AT91CAP9 processors.
279 bool "Broadcom BCMRING"
284 select GENERIC_CLOCKEVENTS
285 select ARCH_WANT_OPTIONAL_GPIOLIB
287 Support for Broadcom's BCMRing platform.
290 bool "Cirrus Logic CLPS711x/EP721x-based"
292 select ARCH_USES_GETTIMEOFFSET
294 Support for Cirrus Logic 711x/721x based boards.
297 bool "Cavium Networks CNS3XXX family"
299 select GENERIC_CLOCKEVENTS
301 select PCI_DOMAINS if PCI
303 Support for Cavium Networks CNS3XXX platform.
306 bool "Cortina Systems Gemini"
308 select ARCH_REQUIRE_GPIOLIB
309 select ARCH_USES_GETTIMEOFFSET
311 Support for the Cortina Systems Gemini family SoCs
318 select ARCH_USES_GETTIMEOFFSET
320 This is an evaluation board for the StrongARM processor available
321 from Digital. It has limited hardware on-board, including an
322 Ethernet interface, two PCMCIA sockets, two serial ports and a
331 select ARCH_REQUIRE_GPIOLIB
332 select ARCH_HAS_HOLES_MEMORYMODEL
333 select ARCH_USES_GETTIMEOFFSET
335 This enables support for the Cirrus EP93xx series of CPUs.
337 config ARCH_FOOTBRIDGE
341 select ARCH_USES_GETTIMEOFFSET
343 Support for systems based on the DC21285 companion chip
344 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
347 bool "Freescale MXC/iMX-based"
348 select GENERIC_CLOCKEVENTS
349 select ARCH_REQUIRE_GPIOLIB
352 Support for Freescale MXC/iMX-based family of processors
355 bool "Freescale MXS-based"
356 select GENERIC_CLOCKEVENTS
357 select ARCH_REQUIRE_GPIOLIB
360 Support for Freescale MXS-based family of processors
363 bool "Freescale STMP3xxx"
366 select ARCH_REQUIRE_GPIOLIB
367 select GENERIC_CLOCKEVENTS
368 select USB_ARCH_HAS_EHCI
370 Support for systems based on the Freescale 3xxx CPUs.
373 bool "Hilscher NetX based"
376 select GENERIC_CLOCKEVENTS
378 This enables support for systems based on the Hilscher NetX Soc
381 bool "Hynix HMS720x-based"
384 select ARCH_USES_GETTIMEOFFSET
386 This enables support for systems based on the Hynix HMS720x
394 select ARCH_SUPPORTS_MSI
397 Support for Intel's IOP13XX (XScale) family of processors.
405 select ARCH_REQUIRE_GPIOLIB
407 Support for Intel's 80219 and IOP32X (XScale) family of
416 select ARCH_REQUIRE_GPIOLIB
418 Support for Intel's IOP33X (XScale) family of processors.
425 select ARCH_USES_GETTIMEOFFSET
427 Support for Intel's IXP23xx (XScale) family of processors.
430 bool "IXP2400/2800-based"
434 select ARCH_USES_GETTIMEOFFSET
436 Support for Intel's IXP2400/2800 (XScale) family of processors.
443 select GENERIC_CLOCKEVENTS
444 select DMABOUNCE if PCI
446 Support for Intel's IXP4XX (XScale) family of processors.
451 select ARCH_REQUIRE_GPIOLIB
452 select GENERIC_CLOCKEVENTS
455 Support for the Marvell Dove SoC 88AP510
458 bool "Marvell Kirkwood"
461 select ARCH_REQUIRE_GPIOLIB
462 select GENERIC_CLOCKEVENTS
465 Support for the following Marvell Kirkwood series SoCs:
466 88F6180, 88F6192 and 88F6281.
469 bool "Marvell Loki (88RC8480)"
471 select GENERIC_CLOCKEVENTS
474 Support for the Marvell Loki (88RC8480) SoC.
479 select ARCH_REQUIRE_GPIOLIB
482 select USB_ARCH_HAS_OHCI
485 select GENERIC_CLOCKEVENTS
487 Support for the NXP LPC32XX family of processors
490 bool "Marvell MV78xx0"
493 select ARCH_REQUIRE_GPIOLIB
494 select GENERIC_CLOCKEVENTS
497 Support for the following Marvell MV78xx0 series SoCs:
505 select ARCH_REQUIRE_GPIOLIB
506 select GENERIC_CLOCKEVENTS
509 Support for the following Marvell Orion 5x series SoCs:
510 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
511 Orion-2 (5281), Orion-1-90 (6183).
514 bool "Marvell PXA168/910/MMP2"
516 select ARCH_REQUIRE_GPIOLIB
518 select GENERIC_CLOCKEVENTS
523 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
526 bool "Micrel/Kendin KS8695"
528 select ARCH_REQUIRE_GPIOLIB
529 select ARCH_USES_GETTIMEOFFSET
531 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
532 System-on-Chip devices.
535 bool "NetSilicon NS9xxx"
538 select GENERIC_CLOCKEVENTS
541 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
544 <http://www.digi.com/products/microprocessors/index.jsp>
547 bool "Nuvoton W90X900 CPU"
549 select ARCH_REQUIRE_GPIOLIB
551 select GENERIC_CLOCKEVENTS
553 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
554 At present, the w90x900 has been renamed nuc900, regarding
555 the ARM series product line, you can login the following
556 link address to know more.
558 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
559 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
562 bool "Nuvoton NUC93X CPU"
566 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
567 low-power and high performance MPEG-4/JPEG multimedia controller chip.
572 select GENERIC_CLOCKEVENTS
576 select ARCH_HAS_BARRIERS if CACHE_L2X0
577 select ARCH_HAS_CPUFREQ
579 This enables support for NVIDIA Tegra based systems (Tegra APX,
580 Tegra 6xx and Tegra 2 series).
583 bool "Philips Nexperia PNX4008 Mobile"
586 select ARCH_USES_GETTIMEOFFSET
588 This enables support for Philips PNX4008 mobile platform.
591 bool "PXA2xx/PXA3xx-based"
594 select ARCH_HAS_CPUFREQ
596 select ARCH_REQUIRE_GPIOLIB
597 select GENERIC_CLOCKEVENTS
602 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
607 select GENERIC_CLOCKEVENTS
608 select ARCH_REQUIRE_GPIOLIB
610 Support for Qualcomm MSM/QSD based systems. This runs on the
611 apps processor of the MSM/QSD and depends on a shared memory
612 interface to the modem processor which runs the baseband
613 stack and controls some vital subsystems
614 (clock and power control, etc).
617 bool "Renesas SH-Mobile"
619 Support for Renesas's SH-Mobile ARM platforms
626 select ARCH_MAY_HAVE_PC_FDC
627 select HAVE_PATA_PLATFORM
630 select ARCH_SPARSEMEM_ENABLE
631 select ARCH_USES_GETTIMEOFFSET
633 On the Acorn Risc-PC, Linux can support the internal IDE disk and
634 CD-ROM interface, serial and parallel port, and the floppy drive.
640 select ARCH_SPARSEMEM_ENABLE
642 select ARCH_HAS_CPUFREQ
644 select GENERIC_CLOCKEVENTS
647 select ARCH_REQUIRE_GPIOLIB
649 Support for StrongARM 11x0 based boards.
652 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
654 select ARCH_HAS_CPUFREQ
656 select ARCH_USES_GETTIMEOFFSET
657 select HAVE_S3C2410_I2C if I2C
659 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
660 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
661 the Samsung SMDK2410 development board (and derivatives).
663 Note, the S3C2416 and the S3C2450 are so close that they even share
664 the same SoC ID code. This means that there is no seperate machine
665 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
668 bool "Samsung S3C64XX"
674 select ARCH_USES_GETTIMEOFFSET
675 select ARCH_HAS_CPUFREQ
676 select ARCH_REQUIRE_GPIOLIB
677 select SAMSUNG_CLKSRC
678 select SAMSUNG_IRQ_VIC_TIMER
679 select SAMSUNG_IRQ_UART
680 select S3C_GPIO_TRACK
681 select S3C_GPIO_PULL_UPDOWN
682 select S3C_GPIO_CFG_S3C24XX
683 select S3C_GPIO_CFG_S3C64XX
685 select USB_ARCH_HAS_OHCI
686 select SAMSUNG_GPIOLIB_4BIT
687 select HAVE_S3C2410_I2C if I2C
688 select HAVE_S3C2410_WATCHDOG if WATCHDOG
690 Samsung S3C64XX series based systems
693 bool "Samsung S5P6440 S5P6450"
697 select HAVE_S3C2410_WATCHDOG if WATCHDOG
698 select ARCH_USES_GETTIMEOFFSET
699 select HAVE_S3C2410_I2C if I2C
700 select HAVE_S3C_RTC if RTC_CLASS
702 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
706 bool "Samsung S5P6442"
710 select ARCH_USES_GETTIMEOFFSET
711 select HAVE_S3C2410_WATCHDOG if WATCHDOG
713 Samsung S5P6442 CPU based systems
716 bool "Samsung S5PC100"
720 select ARM_L1_CACHE_SHIFT_6
721 select ARCH_USES_GETTIMEOFFSET
722 select HAVE_S3C2410_I2C if I2C
723 select HAVE_S3C_RTC if RTC_CLASS
724 select HAVE_S3C2410_WATCHDOG if WATCHDOG
726 Samsung S5PC100 series based systems
729 bool "Samsung S5PV210/S5PC110"
731 select ARCH_SPARSEMEM_ENABLE
734 select ARM_L1_CACHE_SHIFT_6
735 select ARCH_HAS_CPUFREQ
736 select ARCH_USES_GETTIMEOFFSET
737 select HAVE_S3C2410_I2C if I2C
738 select HAVE_S3C_RTC if RTC_CLASS
739 select HAVE_S3C2410_WATCHDOG if WATCHDOG
741 Samsung S5PV210/S5PC110 series based systems
744 bool "Samsung S5PV310/S5PC210"
746 select ARCH_SPARSEMEM_ENABLE
749 select GENERIC_CLOCKEVENTS
750 select HAVE_S3C_RTC if RTC_CLASS
751 select HAVE_S3C2410_I2C if I2C
752 select HAVE_S3C2410_WATCHDOG if WATCHDOG
754 Samsung S5PV310 series based systems
763 select ARCH_USES_GETTIMEOFFSET
765 Support for the StrongARM based Digital DNARD machine, also known
766 as "Shark" (<http://www.shark-linux.de/shark.html>).
769 bool "Telechips TCC ARM926-based systems"
773 select GENERIC_CLOCKEVENTS
775 Support for Telechips TCC ARM926-based systems.
780 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
781 select ARCH_USES_GETTIMEOFFSET
783 Say Y here for systems based on one of the Sharp LH7A40X
784 System on a Chip processors. These CPUs include an ARM922T
785 core with a wide array of integrated devices for
786 hand-held and low-power applications.
789 bool "ST-Ericsson U300 Series"
795 select GENERIC_CLOCKEVENTS
799 Support for ST-Ericsson U300 series mobile platforms.
802 bool "ST-Ericsson U8500 Series"
805 select GENERIC_CLOCKEVENTS
807 select ARCH_REQUIRE_GPIOLIB
809 Support for ST-Ericsson's Ux500 architecture
812 bool "STMicroelectronics Nomadik"
817 select GENERIC_CLOCKEVENTS
818 select ARCH_REQUIRE_GPIOLIB
820 Support for the Nomadik platform by ST-Ericsson
824 select GENERIC_CLOCKEVENTS
825 select ARCH_REQUIRE_GPIOLIB
829 select GENERIC_ALLOCATOR
830 select ARCH_HAS_HOLES_MEMORYMODEL
832 Support for TI's DaVinci platform.
837 select ARCH_REQUIRE_GPIOLIB
838 select ARCH_HAS_CPUFREQ
839 select GENERIC_CLOCKEVENTS
840 select ARCH_HAS_HOLES_MEMORYMODEL
842 Support for TI's OMAP platform (OMAP1/2/3/4).
847 select ARCH_REQUIRE_GPIOLIB
849 select GENERIC_CLOCKEVENTS
852 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
857 # This is sorted alphabetically by mach-* pathname. However, plat-*
858 # Kconfigs may be included either alphabetically (according to the
859 # plat- suffix) or along side the corresponding mach-* source.
861 source "arch/arm/mach-aaec2000/Kconfig"
863 source "arch/arm/mach-at91/Kconfig"
865 source "arch/arm/mach-bcmring/Kconfig"
867 source "arch/arm/mach-clps711x/Kconfig"
869 source "arch/arm/mach-cns3xxx/Kconfig"
871 source "arch/arm/mach-davinci/Kconfig"
873 source "arch/arm/mach-dove/Kconfig"
875 source "arch/arm/mach-ep93xx/Kconfig"
877 source "arch/arm/mach-footbridge/Kconfig"
879 source "arch/arm/mach-gemini/Kconfig"
881 source "arch/arm/mach-h720x/Kconfig"
883 source "arch/arm/mach-integrator/Kconfig"
885 source "arch/arm/mach-iop32x/Kconfig"
887 source "arch/arm/mach-iop33x/Kconfig"
889 source "arch/arm/mach-iop13xx/Kconfig"
891 source "arch/arm/mach-ixp4xx/Kconfig"
893 source "arch/arm/mach-ixp2000/Kconfig"
895 source "arch/arm/mach-ixp23xx/Kconfig"
897 source "arch/arm/mach-kirkwood/Kconfig"
899 source "arch/arm/mach-ks8695/Kconfig"
901 source "arch/arm/mach-lh7a40x/Kconfig"
903 source "arch/arm/mach-loki/Kconfig"
905 source "arch/arm/mach-lpc32xx/Kconfig"
907 source "arch/arm/mach-msm/Kconfig"
909 source "arch/arm/mach-mv78xx0/Kconfig"
911 source "arch/arm/plat-mxc/Kconfig"
913 source "arch/arm/mach-mxs/Kconfig"
915 source "arch/arm/mach-netx/Kconfig"
917 source "arch/arm/mach-nomadik/Kconfig"
918 source "arch/arm/plat-nomadik/Kconfig"
920 source "arch/arm/mach-ns9xxx/Kconfig"
922 source "arch/arm/mach-nuc93x/Kconfig"
924 source "arch/arm/plat-omap/Kconfig"
926 source "arch/arm/mach-omap1/Kconfig"
928 source "arch/arm/mach-omap2/Kconfig"
930 source "arch/arm/mach-orion5x/Kconfig"
932 source "arch/arm/mach-pxa/Kconfig"
933 source "arch/arm/plat-pxa/Kconfig"
935 source "arch/arm/mach-mmp/Kconfig"
937 source "arch/arm/mach-realview/Kconfig"
939 source "arch/arm/mach-sa1100/Kconfig"
941 source "arch/arm/plat-samsung/Kconfig"
942 source "arch/arm/plat-s3c24xx/Kconfig"
943 source "arch/arm/plat-s5p/Kconfig"
945 source "arch/arm/plat-spear/Kconfig"
947 source "arch/arm/plat-tcc/Kconfig"
950 source "arch/arm/mach-s3c2400/Kconfig"
951 source "arch/arm/mach-s3c2410/Kconfig"
952 source "arch/arm/mach-s3c2412/Kconfig"
953 source "arch/arm/mach-s3c2416/Kconfig"
954 source "arch/arm/mach-s3c2440/Kconfig"
955 source "arch/arm/mach-s3c2443/Kconfig"
959 source "arch/arm/mach-s3c64xx/Kconfig"
962 source "arch/arm/mach-s5p64x0/Kconfig"
964 source "arch/arm/mach-s5p6442/Kconfig"
966 source "arch/arm/mach-s5pc100/Kconfig"
968 source "arch/arm/mach-s5pv210/Kconfig"
970 source "arch/arm/mach-s5pv310/Kconfig"
972 source "arch/arm/mach-shmobile/Kconfig"
974 source "arch/arm/plat-stmp3xxx/Kconfig"
976 source "arch/arm/mach-tegra/Kconfig"
978 source "arch/arm/mach-u300/Kconfig"
980 source "arch/arm/mach-ux500/Kconfig"
982 source "arch/arm/mach-versatile/Kconfig"
984 source "arch/arm/mach-vexpress/Kconfig"
986 source "arch/arm/mach-w90x900/Kconfig"
988 # Definitions to make life easier
994 select GENERIC_CLOCKEVENTS
1002 config PLAT_VERSATILE
1005 config ARM_TIMER_SP804
1008 source arch/arm/mm/Kconfig
1011 bool "Enable iWMMXt support"
1012 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1013 default y if PXA27x || PXA3xx || ARCH_MMP
1015 Enable support for iWMMXt context switching at run time if
1016 running on a CPU that supports it.
1018 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1021 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1025 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1026 (!ARCH_OMAP3 || OMAP3_EMU)
1031 source "arch/arm/Kconfig-nommu"
1034 config ARM_ERRATA_411920
1035 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1038 Invalidation of the Instruction Cache operation can
1039 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1040 It does not affect the MPCore. This option enables the ARM Ltd.
1041 recommended workaround.
1043 config ARM_ERRATA_430973
1044 bool "ARM errata: Stale prediction on replaced interworking branch"
1047 This option enables the workaround for the 430973 Cortex-A8
1048 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1049 interworking branch is replaced with another code sequence at the
1050 same virtual address, whether due to self-modifying code or virtual
1051 to physical address re-mapping, Cortex-A8 does not recover from the
1052 stale interworking branch prediction. This results in Cortex-A8
1053 executing the new code sequence in the incorrect ARM or Thumb state.
1054 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1055 and also flushes the branch target cache at every context switch.
1056 Note that setting specific bits in the ACTLR register may not be
1057 available in non-secure mode.
1059 config ARM_ERRATA_458693
1060 bool "ARM errata: Processor deadlock when a false hazard is created"
1063 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1064 erratum. For very specific sequences of memory operations, it is
1065 possible for a hazard condition intended for a cache line to instead
1066 be incorrectly associated with a different cache line. This false
1067 hazard might then cause a processor deadlock. The workaround enables
1068 the L1 caching of the NEON accesses and disables the PLD instruction
1069 in the ACTLR register. Note that setting specific bits in the ACTLR
1070 register may not be available in non-secure mode.
1072 config ARM_ERRATA_460075
1073 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1076 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1077 erratum. Any asynchronous access to the L2 cache may encounter a
1078 situation in which recent store transactions to the L2 cache are lost
1079 and overwritten with stale memory contents from external memory. The
1080 workaround disables the write-allocate mode for the L2 cache via the
1081 ACTLR register. Note that setting specific bits in the ACTLR register
1082 may not be available in non-secure mode.
1084 config ARM_ERRATA_742230
1085 bool "ARM errata: DMB operation may be faulty"
1086 depends on CPU_V7 && SMP
1088 This option enables the workaround for the 742230 Cortex-A9
1089 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1090 between two write operations may not ensure the correct visibility
1091 ordering of the two writes. This workaround sets a specific bit in
1092 the diagnostic register of the Cortex-A9 which causes the DMB
1093 instruction to behave as a DSB, ensuring the correct behaviour of
1096 config ARM_ERRATA_742231
1097 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1098 depends on CPU_V7 && SMP
1100 This option enables the workaround for the 742231 Cortex-A9
1101 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1102 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1103 accessing some data located in the same cache line, may get corrupted
1104 data due to bad handling of the address hazard when the line gets
1105 replaced from one of the CPUs at the same time as another CPU is
1106 accessing it. This workaround sets specific bits in the diagnostic
1107 register of the Cortex-A9 which reduces the linefill issuing
1108 capabilities of the processor.
1110 config PL310_ERRATA_588369
1111 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1112 depends on CACHE_L2X0 && ARCH_OMAP4
1114 The PL310 L2 cache controller implements three types of Clean &
1115 Invalidate maintenance operations: by Physical Address
1116 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1117 They are architecturally defined to behave as the execution of a
1118 clean operation followed immediately by an invalidate operation,
1119 both performing to the same memory location. This functionality
1120 is not correctly implemented in PL310 as clean lines are not
1121 invalidated as a result of these operations. Note that this errata
1122 uses Texas Instrument's secure monitor api.
1124 config ARM_ERRATA_720789
1125 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1126 depends on CPU_V7 && SMP
1128 This option enables the workaround for the 720789 Cortex-A9 (prior to
1129 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1130 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1131 As a consequence of this erratum, some TLB entries which should be
1132 invalidated are not, resulting in an incoherency in the system page
1133 tables. The workaround changes the TLB flushing routines to invalidate
1134 entries regardless of the ASID.
1136 config ARM_ERRATA_743622
1137 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1140 This option enables the workaround for the 743622 Cortex-A9
1141 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1142 optimisation in the Cortex-A9 Store Buffer may lead to data
1143 corruption. This workaround sets a specific bit in the diagnostic
1144 register of the Cortex-A9 which disables the Store Buffer
1145 optimisation, preventing the defect from occurring. This has no
1146 visible impact on the overall performance or power consumption of the
1151 source "arch/arm/common/Kconfig"
1161 Find out whether you have ISA slots on your motherboard. ISA is the
1162 name of a bus system, i.e. the way the CPU talks to the other stuff
1163 inside your box. Other bus systems are PCI, EISA, MicroChannel
1164 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1165 newer boards don't support it. If you have ISA, say Y, otherwise N.
1167 # Select ISA DMA controller support
1172 # Select ISA DMA interface
1177 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1179 Find out whether you have a PCI motherboard. PCI is the name of a
1180 bus system, i.e. the way the CPU talks to the other stuff inside
1181 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1182 VESA. If you have PCI, say Y, otherwise N.
1191 # Select the host bridge type
1192 config PCI_HOST_VIA82C505
1194 depends on PCI && ARCH_SHARK
1197 config PCI_HOST_ITE8152
1199 depends on PCI && MACH_ARMCORE
1203 source "drivers/pci/Kconfig"
1205 source "drivers/pcmcia/Kconfig"
1209 menu "Kernel Features"
1211 source "kernel/time/Kconfig"
1214 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1215 depends on EXPERIMENTAL
1216 depends on GENERIC_CLOCKEVENTS
1217 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1218 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1219 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1220 select USE_GENERIC_SMP_HELPERS
1223 This enables support for systems with more than one CPU. If you have
1224 a system with only one CPU, like most personal computers, say N. If
1225 you have a system with more than one CPU, say Y.
1227 If you say N here, the kernel will run on single and multiprocessor
1228 machines, but will use only one CPU of a multiprocessor machine. If
1229 you say Y here, the kernel will run on many, but not all, single
1230 processor machines. On a single processor machine, the kernel will
1231 run faster if you say N here.
1233 See also <file:Documentation/i386/IO-APIC.txt>,
1234 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1235 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1237 If you don't know what to do here, say N.
1240 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1241 depends on EXPERIMENTAL
1242 depends on SMP && !XIP && !THUMB2_KERNEL
1245 SMP kernels contain instructions which fail on non-SMP processors.
1246 Enabling this option allows the kernel to modify itself to make
1247 these instructions safe. Disabling it allows about 1K of space
1250 If you don't know what to do here, say Y.
1256 This option enables support for the ARM system coherency unit
1262 This options enables support for the ARM timer and watchdog unit
1265 prompt "Memory split"
1268 Select the desired split between kernel and user memory.
1270 If you are not absolutely sure what you are doing, leave this
1274 bool "3G/1G user/kernel split"
1276 bool "2G/2G user/kernel split"
1278 bool "1G/3G user/kernel split"
1283 default 0x40000000 if VMSPLIT_1G
1284 default 0x80000000 if VMSPLIT_2G
1288 int "Maximum number of CPUs (2-32)"
1294 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1295 depends on SMP && HOTPLUG && EXPERIMENTAL
1297 Say Y here to experiment with turning CPUs off and on. CPUs
1298 can be controlled through /sys/devices/system/cpu.
1301 bool "Use local timer interrupts"
1306 Enable support for local timers on SMP platforms, rather then the
1307 legacy IPI broadcast method. Local timers allows the system
1308 accounting to be spread across the timer interval, preventing a
1309 "thundering herd" at every timer tick.
1311 source kernel/Kconfig.preempt
1315 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1316 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1317 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1318 default AT91_TIMER_HZ if ARCH_AT91
1319 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1322 config THUMB2_KERNEL
1323 bool "Compile the kernel in Thumb-2 mode"
1324 depends on CPU_V7 && EXPERIMENTAL
1326 select ARM_ASM_UNIFIED
1328 By enabling this option, the kernel will be compiled in
1329 Thumb-2 mode. A compiler/assembler that understand the unified
1330 ARM-Thumb syntax is needed.
1334 config ARM_ASM_UNIFIED
1338 bool "Use the ARM EABI to compile the kernel"
1340 This option allows for the kernel to be compiled using the latest
1341 ARM ABI (aka EABI). This is only useful if you are using a user
1342 space environment that is also compiled with EABI.
1344 Since there are major incompatibilities between the legacy ABI and
1345 EABI, especially with regard to structure member alignment, this
1346 option also changes the kernel syscall calling convention to
1347 disambiguate both ABIs and allow for backward compatibility support
1348 (selected with CONFIG_OABI_COMPAT).
1350 To use this you need GCC version 4.0.0 or later.
1353 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1354 depends on AEABI && EXPERIMENTAL
1357 This option preserves the old syscall interface along with the
1358 new (ARM EABI) one. It also provides a compatibility layer to
1359 intercept syscalls that have structure arguments which layout
1360 in memory differs between the legacy ABI and the new ARM EABI
1361 (only for non "thumb" binaries). This option adds a tiny
1362 overhead to all syscalls and produces a slightly larger kernel.
1363 If you know you'll be using only pure EABI user space then you
1364 can say N here. If this option is not selected and you attempt
1365 to execute a legacy ABI binary then the result will be
1366 UNPREDICTABLE (in fact it can be predicted that it won't work
1367 at all). If in doubt say Y.
1369 config ARCH_HAS_HOLES_MEMORYMODEL
1372 config ARCH_SPARSEMEM_ENABLE
1375 config ARCH_SPARSEMEM_DEFAULT
1376 def_bool ARCH_SPARSEMEM_ENABLE
1378 config ARCH_SELECT_MEMORY_MODEL
1379 def_bool ARCH_SPARSEMEM_ENABLE
1382 bool "High Memory Support (EXPERIMENTAL)"
1383 depends on MMU && EXPERIMENTAL
1385 The address space of ARM processors is only 4 Gigabytes large
1386 and it has to accommodate user address space, kernel address
1387 space as well as some memory mapped IO. That means that, if you
1388 have a large amount of physical memory and/or IO, not all of the
1389 memory can be "permanently mapped" by the kernel. The physical
1390 memory that is not permanently mapped is called "high memory".
1392 Depending on the selected kernel/user memory split, minimum
1393 vmalloc space and actual amount of RAM, you may not need this
1394 option which should result in a slightly faster kernel.
1399 bool "Allocate 2nd-level pagetables from highmem"
1401 depends on !OUTER_CACHE
1403 config HW_PERF_EVENTS
1404 bool "Enable hardware performance counter support for perf events"
1405 depends on PERF_EVENTS && CPU_HAS_PMU
1408 Enable hardware performance counter support for perf events. If
1409 disabled, perf events will use software events only.
1414 This enables support for sparse irqs. This is useful in general
1415 as most CPUs have a fairly sparse array of IRQ vectors, which
1416 the irq_desc then maps directly on to. Systems with a high
1417 number of off-chip IRQs will want to treat this as
1418 experimental until they have been independently verified.
1422 config FORCE_MAX_ZONEORDER
1423 int "Maximum zone order" if ARCH_SHMOBILE
1424 range 11 64 if ARCH_SHMOBILE
1425 default "9" if SA1111
1428 The kernel memory allocator divides physically contiguous memory
1429 blocks into "zones", where each zone is a power of two number of
1430 pages. This option selects the largest power of two that the kernel
1431 keeps in the memory allocator. If you need to allocate very large
1432 blocks of physically contiguous memory, then you may need to
1433 increase this value.
1435 This config option is actually maximum order plus one. For example,
1436 a value of 11 means that the largest free memory block is 2^10 pages.
1439 bool "Timer and CPU usage LEDs"
1440 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1441 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1442 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1443 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1444 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1445 ARCH_AT91 || ARCH_DAVINCI || \
1446 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1448 If you say Y here, the LEDs on your machine will be used
1449 to provide useful information about your current system status.
1451 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1452 be able to select which LEDs are active using the options below. If
1453 you are compiling a kernel for the EBSA-110 or the LART however, the
1454 red LED will simply flash regularly to indicate that the system is
1455 still functional. It is safe to say Y here if you have a CATS
1456 system, but the driver will do nothing.
1459 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1460 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1461 || MACH_OMAP_PERSEUS2
1463 depends on !GENERIC_CLOCKEVENTS
1464 default y if ARCH_EBSA110
1466 If you say Y here, one of the system LEDs (the green one on the
1467 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1468 will flash regularly to indicate that the system is still
1469 operational. This is mainly useful to kernel hackers who are
1470 debugging unstable kernels.
1472 The LART uses the same LED for both Timer LED and CPU usage LED
1473 functions. You may choose to use both, but the Timer LED function
1474 will overrule the CPU usage LED.
1477 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1479 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1480 || MACH_OMAP_PERSEUS2
1483 If you say Y here, the red LED will be used to give a good real
1484 time indication of CPU usage, by lighting whenever the idle task
1485 is not currently executing.
1487 The LART uses the same LED for both Timer LED and CPU usage LED
1488 functions. You may choose to use both, but the Timer LED function
1489 will overrule the CPU usage LED.
1491 config ALIGNMENT_TRAP
1493 depends on CPU_CP15_MMU
1494 default y if !ARCH_EBSA110
1495 select HAVE_PROC_CPU if PROC_FS
1497 ARM processors cannot fetch/store information which is not
1498 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1499 address divisible by 4. On 32-bit ARM processors, these non-aligned
1500 fetch/store instructions will be emulated in software if you say
1501 here, which has a severe performance impact. This is necessary for
1502 correct operation of some network protocols. With an IP-only
1503 configuration it is safe to say N, otherwise say Y.
1505 config UACCESS_WITH_MEMCPY
1506 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1507 depends on MMU && EXPERIMENTAL
1508 default y if CPU_FEROCEON
1510 Implement faster copy_to_user and clear_user methods for CPU
1511 cores where a 8-word STM instruction give significantly higher
1512 memory write throughput than a sequence of individual 32bit stores.
1514 A possible side effect is a slight increase in scheduling latency
1515 between threads sharing the same address space if they invoke
1516 such copy operations with large buffers.
1518 However, if the CPU data cache is using a write-allocate mode,
1519 this option is unlikely to provide any performance gain.
1523 prompt "Enable seccomp to safely compute untrusted bytecode"
1525 This kernel feature is useful for number crunching applications
1526 that may need to compute untrusted bytecode during their
1527 execution. By using pipes or other transports made available to
1528 the process as file descriptors supporting the read/write
1529 syscalls, it's possible to isolate those applications in
1530 their own address space using seccomp. Once seccomp is
1531 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1532 and the task is only allowed to execute a few safe syscalls
1533 defined by each seccomp mode.
1535 config CC_STACKPROTECTOR
1536 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1538 This option turns on the -fstack-protector GCC feature. This
1539 feature puts, at the beginning of functions, a canary value on
1540 the stack just before the return address, and validates
1541 the value just before actually returning. Stack based buffer
1542 overflows (that need to overwrite this return address) now also
1543 overwrite the canary, which gets detected and the attack is then
1544 neutralized via a kernel panic.
1545 This feature requires gcc version 4.2 or above.
1547 config DEPRECATED_PARAM_STRUCT
1548 bool "Provide old way to pass kernel parameters"
1550 This was deprecated in 2001 and announced to live on for 5 years.
1551 Some old boot loaders still use this way.
1557 # Compressed boot loader in ROM. Yes, we really want to ask about
1558 # TEXT and BSS so we preserve their values in the config files.
1559 config ZBOOT_ROM_TEXT
1560 hex "Compressed ROM boot loader base address"
1563 The physical address at which the ROM-able zImage is to be
1564 placed in the target. Platforms which normally make use of
1565 ROM-able zImage formats normally set this to a suitable
1566 value in their defconfig file.
1568 If ZBOOT_ROM is not enabled, this has no effect.
1570 config ZBOOT_ROM_BSS
1571 hex "Compressed ROM boot loader BSS address"
1574 The base address of an area of read/write memory in the target
1575 for the ROM-able zImage which must be available while the
1576 decompressor is running. It must be large enough to hold the
1577 entire decompressed kernel plus an additional 128 KiB.
1578 Platforms which normally make use of ROM-able zImage formats
1579 normally set this to a suitable value in their defconfig file.
1581 If ZBOOT_ROM is not enabled, this has no effect.
1584 bool "Compressed boot loader in ROM/flash"
1585 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1587 Say Y here if you intend to execute your compressed kernel image
1588 (zImage) directly from ROM or flash. If unsure, say N.
1591 string "Default kernel command string"
1594 On some architectures (EBSA110 and CATS), there is currently no way
1595 for the boot loader to pass arguments to the kernel. For these
1596 architectures, you should supply some command-line options at build
1597 time by entering them here. As a minimum, you should specify the
1598 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1600 config CMDLINE_FORCE
1601 bool "Always use the default kernel command string"
1602 depends on CMDLINE != ""
1604 Always use the default kernel command string, even if the boot
1605 loader passes other arguments to the kernel.
1606 This is useful if you cannot or don't want to change the
1607 command-line options your boot loader passes to the kernel.
1612 bool "Kernel Execute-In-Place from ROM"
1613 depends on !ZBOOT_ROM
1615 Execute-In-Place allows the kernel to run from non-volatile storage
1616 directly addressable by the CPU, such as NOR flash. This saves RAM
1617 space since the text section of the kernel is not loaded from flash
1618 to RAM. Read-write sections, such as the data section and stack,
1619 are still copied to RAM. The XIP kernel is not compressed since
1620 it has to run directly from flash, so it will take more space to
1621 store it. The flash address used to link the kernel object files,
1622 and for storing it, is configuration dependent. Therefore, if you
1623 say Y here, you must know the proper physical address where to
1624 store the kernel image depending on your own flash memory usage.
1626 Also note that the make target becomes "make xipImage" rather than
1627 "make zImage" or "make Image". The final kernel binary to put in
1628 ROM memory will be arch/arm/boot/xipImage.
1632 config XIP_PHYS_ADDR
1633 hex "XIP Kernel Physical Location"
1634 depends on XIP_KERNEL
1635 default "0x00080000"
1637 This is the physical address in your flash memory the kernel will
1638 be linked for and stored to. This address is dependent on your
1642 bool "Kexec system call (EXPERIMENTAL)"
1643 depends on EXPERIMENTAL
1645 kexec is a system call that implements the ability to shutdown your
1646 current kernel, and to start another kernel. It is like a reboot
1647 but it is independent of the system firmware. And like a reboot
1648 you can start any kernel with it, not just Linux.
1650 It is an ongoing process to be certain the hardware in a machine
1651 is properly shutdown, so do not be surprised if this code does not
1652 initially work for you. It may help to enable device hotplugging
1656 bool "Export atags in procfs"
1660 Should the atags used to boot the kernel be exported in an "atags"
1661 file in procfs. Useful with kexec.
1663 config AUTO_ZRELADDR
1664 bool "Auto calculation of the decompressed kernel image address"
1665 depends on !ZBOOT_ROM && !ARCH_U300
1667 ZRELADDR is the physical address where the decompressed kernel
1668 image will be placed. If AUTO_ZRELADDR is selected, the address
1669 will be determined at run-time by masking the current IP with
1670 0xf8000000. This assumes the zImage being placed in the first 128MB
1671 from start of memory.
1675 menu "CPU Power Management"
1679 source "drivers/cpufreq/Kconfig"
1682 tristate "CPUfreq driver for i.MX CPUs"
1683 depends on ARCH_MXC && CPU_FREQ
1685 This enables the CPUfreq driver for i.MX CPUs.
1687 config CPU_FREQ_SA1100
1690 config CPU_FREQ_SA1110
1693 config CPU_FREQ_INTEGRATOR
1694 tristate "CPUfreq driver for ARM Integrator CPUs"
1695 depends on ARCH_INTEGRATOR && CPU_FREQ
1698 This enables the CPUfreq driver for ARM Integrator CPUs.
1700 For details, take a look at <file:Documentation/cpu-freq>.
1706 depends on CPU_FREQ && ARCH_PXA && PXA25x
1708 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1710 config CPU_FREQ_S3C64XX
1711 bool "CPUfreq support for Samsung S3C64XX CPUs"
1712 depends on CPU_FREQ && CPU_S3C6410
1717 Internal configuration node for common cpufreq on Samsung SoC
1719 config CPU_FREQ_S3C24XX
1720 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1721 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1724 This enables the CPUfreq driver for the Samsung S3C24XX family
1727 For details, take a look at <file:Documentation/cpu-freq>.
1731 config CPU_FREQ_S3C24XX_PLL
1732 bool "Support CPUfreq changing of PLL frequency"
1733 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1735 Compile in support for changing the PLL frequency from the
1736 S3C24XX series CPUfreq driver. The PLL takes time to settle
1737 after a frequency change, so by default it is not enabled.
1739 This also means that the PLL tables for the selected CPU(s) will
1740 be built which may increase the size of the kernel image.
1742 config CPU_FREQ_S3C24XX_DEBUG
1743 bool "Debug CPUfreq Samsung driver core"
1744 depends on CPU_FREQ_S3C24XX
1746 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1748 config CPU_FREQ_S3C24XX_IODEBUG
1749 bool "Debug CPUfreq Samsung driver IO timing"
1750 depends on CPU_FREQ_S3C24XX
1752 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1754 config CPU_FREQ_S3C24XX_DEBUGFS
1755 bool "Export debugfs for CPUFreq"
1756 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1758 Export status information via debugfs.
1762 source "drivers/cpuidle/Kconfig"
1766 menu "Floating point emulation"
1768 comment "At least one emulation must be selected"
1771 bool "NWFPE math emulation"
1772 depends on !AEABI || OABI_COMPAT
1774 Say Y to include the NWFPE floating point emulator in the kernel.
1775 This is necessary to run most binaries. Linux does not currently
1776 support floating point hardware so you need to say Y here even if
1777 your machine has an FPA or floating point co-processor podule.
1779 You may say N here if you are going to load the Acorn FPEmulator
1780 early in the bootup.
1783 bool "Support extended precision"
1784 depends on FPE_NWFPE
1786 Say Y to include 80-bit support in the kernel floating-point
1787 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1788 Note that gcc does not generate 80-bit operations by default,
1789 so in most cases this option only enlarges the size of the
1790 floating point emulator without any good reason.
1792 You almost surely want to say N here.
1795 bool "FastFPE math emulation (EXPERIMENTAL)"
1796 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1798 Say Y here to include the FAST floating point emulator in the kernel.
1799 This is an experimental much faster emulator which now also has full
1800 precision for the mantissa. It does not support any exceptions.
1801 It is very simple, and approximately 3-6 times faster than NWFPE.
1803 It should be sufficient for most programs. It may be not suitable
1804 for scientific calculations, but you have to check this for yourself.
1805 If you do not feel you need a faster FP emulation you should better
1809 bool "VFP-format floating point maths"
1810 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1812 Say Y to include VFP support code in the kernel. This is needed
1813 if your hardware includes a VFP unit.
1815 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1816 release notes and additional status information.
1818 Say N if your target does not have VFP hardware.
1826 bool "Advanced SIMD (NEON) Extension support"
1827 depends on VFPv3 && CPU_V7
1829 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1834 menu "Userspace binary formats"
1836 source "fs/Kconfig.binfmt"
1839 tristate "RISC OS personality"
1842 Say Y here to include the kernel code necessary if you want to run
1843 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1844 experimental; if this sounds frightening, say N and sleep in peace.
1845 You can also say M here to compile this support as a module (which
1846 will be called arthur).
1850 menu "Power management options"
1852 source "kernel/power/Kconfig"
1854 config ARCH_SUSPEND_POSSIBLE
1859 source "net/Kconfig"
1861 source "drivers/Kconfig"
1865 source "arch/arm/Kconfig.debug"
1867 source "security/Kconfig"
1869 source "crypto/Kconfig"
1871 source "lib/Kconfig"