8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
18 select HAVE_GENERIC_DMA_COHERENT
19 select HAVE_KERNEL_GZIP
20 select HAVE_KERNEL_LZO
21 select HAVE_KERNEL_LZMA
23 select HAVE_PERF_EVENTS
24 select PERF_USE_VMALLOC
25 select HAVE_REGS_AND_STACK_ACCESS_API
26 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
27 select HAVE_C_RECORDMCOUNT
29 The ARM series is a line of low-power-consumption RISC chip designs
30 licensed by ARM Ltd and targeted at embedded applications and
31 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
32 manufactured, but legacy ARM-based PC hardware remains popular in
33 Europe. There is an ARM Linux project with a web page at
34 <http://www.arm.linux.org.uk/>.
39 config SYS_SUPPORTS_APM_EMULATION
42 config HAVE_SCHED_CLOCK
48 config ARCH_USES_GETTIMEOFFSET
52 config GENERIC_CLOCKEVENTS
55 config GENERIC_CLOCKEVENTS_BROADCAST
57 depends on GENERIC_CLOCKEVENTS
62 select GENERIC_ALLOCATOR
73 The Extended Industry Standard Architecture (EISA) bus was
74 developed as an open alternative to the IBM MicroChannel bus.
76 The EISA bus provided some of the features of the IBM MicroChannel
77 bus while maintaining backward compatibility with cards made for
78 the older ISA bus. The EISA bus saw limited use between 1988 and
79 1995 when it was made obsolete by the PCI bus.
81 Say Y here if you are building a kernel for an EISA-based machine.
91 MicroChannel Architecture is found in some IBM PS/2 machines and
92 laptops. It is a bus system similar to PCI or ISA. See
93 <file:Documentation/mca.txt> (and especially the web page given
94 there) before attempting to build an MCA bus kernel.
96 config GENERIC_HARDIRQS
100 config STACKTRACE_SUPPORT
104 config HAVE_LATENCYTOP_SUPPORT
109 config LOCKDEP_SUPPORT
113 config TRACE_IRQFLAGS_SUPPORT
117 config HARDIRQS_SW_RESEND
121 config GENERIC_IRQ_PROBE
125 config GENERIC_LOCKBREAK
128 depends on SMP && PREEMPT
130 config RWSEM_GENERIC_SPINLOCK
134 config RWSEM_XCHGADD_ALGORITHM
137 config ARCH_HAS_ILOG2_U32
140 config ARCH_HAS_ILOG2_U64
143 config ARCH_HAS_CPUFREQ
146 Internal node to signify that the ARCH has CPUFREQ support
147 and that the relevant menu configurations are displayed for
150 config ARCH_HAS_CPU_IDLE_WAIT
153 config GENERIC_HWEIGHT
157 config GENERIC_CALIBRATE_DELAY
161 config ARCH_MAY_HAVE_PC_FDC
167 config NEED_DMA_MAP_STATE
170 config GENERIC_ISA_DMA
179 config GENERIC_HARDIRQS_NO__DO_IRQ
182 config ARM_L1_CACHE_SHIFT_6
185 Setting ARM L1 cache line size to 64 Bytes.
189 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
190 default DRAM_BASE if REMAP_VECTORS_TO_RAM
193 The base address of exception vectors.
195 source "init/Kconfig"
197 source "kernel/Kconfig.freezer"
202 bool "MMU-based Paged Memory Management Support"
205 Select if you want MMU-based virtualised addressing space
206 support by paged memory management. If unsure, say 'Y'.
209 # The "ARM system type" choice list is ordered alphabetically by option
210 # text. Please add new entries in the option alphabetic order.
213 prompt "ARM system type"
214 default ARCH_VERSATILE
217 bool "Agilent AAEC-2000 based"
221 select ARCH_USES_GETTIMEOFFSET
223 This enables support for systems based on the Agilent AAEC-2000
225 config ARCH_INTEGRATOR
226 bool "ARM Ltd. Integrator family"
228 select ARCH_HAS_CPUFREQ
231 select GENERIC_CLOCKEVENTS
232 select PLAT_VERSATILE
234 Support for ARM's Integrator platform.
237 bool "ARM Ltd. RealView family"
240 select HAVE_SCHED_CLOCK
242 select GENERIC_CLOCKEVENTS
243 select ARCH_WANT_OPTIONAL_GPIOLIB
244 select PLAT_VERSATILE
245 select ARM_TIMER_SP804
246 select GPIO_PL061 if GPIOLIB
248 This enables support for ARM Ltd RealView boards.
250 config ARCH_VERSATILE
251 bool "ARM Ltd. Versatile family"
255 select HAVE_SCHED_CLOCK
257 select GENERIC_CLOCKEVENTS
258 select ARCH_WANT_OPTIONAL_GPIOLIB
259 select PLAT_VERSATILE
260 select ARM_TIMER_SP804
262 This enables support for ARM Ltd Versatile board.
265 bool "ARM Ltd. Versatile Express family"
266 select ARCH_WANT_OPTIONAL_GPIOLIB
268 select ARM_TIMER_SP804
270 select GENERIC_CLOCKEVENTS
272 select HAVE_SCHED_CLOCK
274 select PLAT_VERSATILE
276 This enables support for the ARM Ltd Versatile Express boards.
280 select ARCH_REQUIRE_GPIOLIB
283 This enables support for systems based on the Atmel AT91RM9200,
284 AT91SAM9 and AT91CAP9 processors.
287 bool "Broadcom BCMRING"
292 select GENERIC_CLOCKEVENTS
293 select ARCH_WANT_OPTIONAL_GPIOLIB
295 Support for Broadcom's BCMRing platform.
298 bool "Cirrus Logic CLPS711x/EP721x-based"
300 select ARCH_USES_GETTIMEOFFSET
302 Support for Cirrus Logic 711x/721x based boards.
305 bool "Cavium Networks CNS3XXX family"
307 select GENERIC_CLOCKEVENTS
309 select PCI_DOMAINS if PCI
311 Support for Cavium Networks CNS3XXX platform.
314 bool "Cortina Systems Gemini"
316 select ARCH_REQUIRE_GPIOLIB
317 select ARCH_USES_GETTIMEOFFSET
319 Support for the Cortina Systems Gemini family SoCs
326 select ARCH_USES_GETTIMEOFFSET
328 This is an evaluation board for the StrongARM processor available
329 from Digital. It has limited hardware on-board, including an
330 Ethernet interface, two PCMCIA sockets, two serial ports and a
339 select ARCH_REQUIRE_GPIOLIB
340 select ARCH_HAS_HOLES_MEMORYMODEL
341 select ARCH_USES_GETTIMEOFFSET
343 This enables support for the Cirrus EP93xx series of CPUs.
345 config ARCH_FOOTBRIDGE
349 select ARCH_USES_GETTIMEOFFSET
351 Support for systems based on the DC21285 companion chip
352 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
355 bool "Freescale MXC/iMX-based"
356 select GENERIC_CLOCKEVENTS
357 select ARCH_REQUIRE_GPIOLIB
360 Support for Freescale MXC/iMX-based family of processors
363 bool "Freescale STMP3xxx"
366 select ARCH_REQUIRE_GPIOLIB
367 select GENERIC_CLOCKEVENTS
368 select USB_ARCH_HAS_EHCI
370 Support for systems based on the Freescale 3xxx CPUs.
373 bool "Hilscher NetX based"
376 select GENERIC_CLOCKEVENTS
378 This enables support for systems based on the Hilscher NetX Soc
381 bool "Hynix HMS720x-based"
384 select ARCH_USES_GETTIMEOFFSET
386 This enables support for systems based on the Hynix HMS720x
394 select ARCH_SUPPORTS_MSI
397 Support for Intel's IOP13XX (XScale) family of processors.
405 select ARCH_REQUIRE_GPIOLIB
407 Support for Intel's 80219 and IOP32X (XScale) family of
416 select ARCH_REQUIRE_GPIOLIB
418 Support for Intel's IOP33X (XScale) family of processors.
425 select ARCH_USES_GETTIMEOFFSET
427 Support for Intel's IXP23xx (XScale) family of processors.
430 bool "IXP2400/2800-based"
434 select ARCH_USES_GETTIMEOFFSET
436 Support for Intel's IXP2400/2800 (XScale) family of processors.
443 select GENERIC_CLOCKEVENTS
444 select HAVE_SCHED_CLOCK
445 select DMABOUNCE if PCI
447 Support for Intel's IXP4XX (XScale) family of processors.
452 select ARCH_REQUIRE_GPIOLIB
453 select GENERIC_CLOCKEVENTS
456 Support for the Marvell Dove SoC 88AP510
459 bool "Marvell Kirkwood"
462 select ARCH_REQUIRE_GPIOLIB
463 select GENERIC_CLOCKEVENTS
466 Support for the following Marvell Kirkwood series SoCs:
467 88F6180, 88F6192 and 88F6281.
470 bool "Marvell Loki (88RC8480)"
472 select GENERIC_CLOCKEVENTS
475 Support for the Marvell Loki (88RC8480) SoC.
480 select ARCH_REQUIRE_GPIOLIB
483 select USB_ARCH_HAS_OHCI
486 select GENERIC_CLOCKEVENTS
488 Support for the NXP LPC32XX family of processors
491 bool "Marvell MV78xx0"
494 select ARCH_REQUIRE_GPIOLIB
495 select GENERIC_CLOCKEVENTS
498 Support for the following Marvell MV78xx0 series SoCs:
506 select ARCH_REQUIRE_GPIOLIB
507 select GENERIC_CLOCKEVENTS
510 Support for the following Marvell Orion 5x series SoCs:
511 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
512 Orion-2 (5281), Orion-1-90 (6183).
515 bool "Marvell PXA168/910/MMP2"
517 select ARCH_REQUIRE_GPIOLIB
519 select GENERIC_CLOCKEVENTS
520 select HAVE_SCHED_CLOCK
525 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
528 bool "Micrel/Kendin KS8695"
530 select ARCH_REQUIRE_GPIOLIB
531 select ARCH_USES_GETTIMEOFFSET
533 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
534 System-on-Chip devices.
537 bool "NetSilicon NS9xxx"
540 select GENERIC_CLOCKEVENTS
543 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
546 <http://www.digi.com/products/microprocessors/index.jsp>
549 bool "Nuvoton W90X900 CPU"
551 select ARCH_REQUIRE_GPIOLIB
553 select GENERIC_CLOCKEVENTS
555 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
556 At present, the w90x900 has been renamed nuc900, regarding
557 the ARM series product line, you can login the following
558 link address to know more.
560 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
561 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
564 bool "Nuvoton NUC93X CPU"
568 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
569 low-power and high performance MPEG-4/JPEG multimedia controller chip.
574 select GENERIC_CLOCKEVENTS
577 select HAVE_SCHED_CLOCK
579 select ARCH_HAS_BARRIERS if CACHE_L2X0
580 select ARCH_HAS_CPUFREQ
582 This enables support for NVIDIA Tegra based systems (Tegra APX,
583 Tegra 6xx and Tegra 2 series).
586 bool "Philips Nexperia PNX4008 Mobile"
589 select ARCH_USES_GETTIMEOFFSET
591 This enables support for Philips PNX4008 mobile platform.
594 bool "PXA2xx/PXA3xx-based"
597 select ARCH_HAS_CPUFREQ
599 select ARCH_REQUIRE_GPIOLIB
600 select GENERIC_CLOCKEVENTS
601 select HAVE_SCHED_CLOCK
606 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
611 select GENERIC_CLOCKEVENTS
612 select ARCH_REQUIRE_GPIOLIB
614 Support for Qualcomm MSM/QSD based systems. This runs on the
615 apps processor of the MSM/QSD and depends on a shared memory
616 interface to the modem processor which runs the baseband
617 stack and controls some vital subsystems
618 (clock and power control, etc).
621 bool "Renesas SH-Mobile"
623 Support for Renesas's SH-Mobile ARM platforms
630 select ARCH_MAY_HAVE_PC_FDC
631 select HAVE_PATA_PLATFORM
634 select ARCH_SPARSEMEM_ENABLE
635 select ARCH_USES_GETTIMEOFFSET
637 On the Acorn Risc-PC, Linux can support the internal IDE disk and
638 CD-ROM interface, serial and parallel port, and the floppy drive.
644 select ARCH_SPARSEMEM_ENABLE
646 select ARCH_HAS_CPUFREQ
648 select GENERIC_CLOCKEVENTS
650 select HAVE_SCHED_CLOCK
652 select ARCH_REQUIRE_GPIOLIB
654 Support for StrongARM 11x0 based boards.
657 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
659 select ARCH_HAS_CPUFREQ
661 select ARCH_USES_GETTIMEOFFSET
662 select HAVE_S3C2410_I2C if I2C
664 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
665 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
666 the Samsung SMDK2410 development board (and derivatives).
668 Note, the S3C2416 and the S3C2450 are so close that they even share
669 the same SoC ID code. This means that there is no seperate machine
670 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
673 bool "Samsung S3C64XX"
679 select ARCH_USES_GETTIMEOFFSET
680 select ARCH_HAS_CPUFREQ
681 select ARCH_REQUIRE_GPIOLIB
682 select SAMSUNG_CLKSRC
683 select SAMSUNG_IRQ_VIC_TIMER
684 select SAMSUNG_IRQ_UART
685 select S3C_GPIO_TRACK
686 select S3C_GPIO_PULL_UPDOWN
687 select S3C_GPIO_CFG_S3C24XX
688 select S3C_GPIO_CFG_S3C64XX
690 select USB_ARCH_HAS_OHCI
691 select SAMSUNG_GPIOLIB_4BIT
692 select HAVE_S3C2410_I2C if I2C
693 select HAVE_S3C2410_WATCHDOG if WATCHDOG
695 Samsung S3C64XX series based systems
698 bool "Samsung S5P6440 S5P6450"
702 select HAVE_S3C2410_WATCHDOG if WATCHDOG
703 select ARCH_USES_GETTIMEOFFSET
704 select HAVE_S3C2410_I2C if I2C
705 select HAVE_S3C_RTC if RTC_CLASS
707 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
711 bool "Samsung S5P6442"
715 select ARCH_USES_GETTIMEOFFSET
716 select HAVE_S3C2410_WATCHDOG if WATCHDOG
718 Samsung S5P6442 CPU based systems
721 bool "Samsung S5PC100"
725 select ARM_L1_CACHE_SHIFT_6
726 select ARCH_USES_GETTIMEOFFSET
727 select HAVE_S3C2410_I2C if I2C
728 select HAVE_S3C_RTC if RTC_CLASS
729 select HAVE_S3C2410_WATCHDOG if WATCHDOG
731 Samsung S5PC100 series based systems
734 bool "Samsung S5PV210/S5PC110"
736 select ARCH_SPARSEMEM_ENABLE
739 select ARM_L1_CACHE_SHIFT_6
740 select ARCH_HAS_CPUFREQ
741 select ARCH_USES_GETTIMEOFFSET
742 select HAVE_S3C2410_I2C if I2C
743 select HAVE_S3C_RTC if RTC_CLASS
744 select HAVE_S3C2410_WATCHDOG if WATCHDOG
746 Samsung S5PV210/S5PC110 series based systems
749 bool "Samsung S5PV310/S5PC210"
751 select ARCH_SPARSEMEM_ENABLE
754 select GENERIC_CLOCKEVENTS
755 select HAVE_S3C_RTC if RTC_CLASS
756 select HAVE_S3C2410_I2C if I2C
757 select HAVE_S3C2410_WATCHDOG if WATCHDOG
759 Samsung S5PV310 series based systems
768 select ARCH_USES_GETTIMEOFFSET
770 Support for the StrongARM based Digital DNARD machine, also known
771 as "Shark" (<http://www.shark-linux.de/shark.html>).
774 bool "Telechips TCC ARM926-based systems"
778 select GENERIC_CLOCKEVENTS
780 Support for Telechips TCC ARM926-based systems.
785 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
786 select ARCH_USES_GETTIMEOFFSET
788 Say Y here for systems based on one of the Sharp LH7A40X
789 System on a Chip processors. These CPUs include an ARM922T
790 core with a wide array of integrated devices for
791 hand-held and low-power applications.
794 bool "ST-Ericsson U300 Series"
797 select HAVE_SCHED_CLOCK
801 select GENERIC_CLOCKEVENTS
805 Support for ST-Ericsson U300 series mobile platforms.
808 bool "ST-Ericsson U8500 Series"
811 select GENERIC_CLOCKEVENTS
813 select ARCH_REQUIRE_GPIOLIB
815 Support for ST-Ericsson's Ux500 architecture
818 bool "STMicroelectronics Nomadik"
823 select GENERIC_CLOCKEVENTS
824 select ARCH_REQUIRE_GPIOLIB
826 Support for the Nomadik platform by ST-Ericsson
830 select GENERIC_CLOCKEVENTS
831 select ARCH_REQUIRE_GPIOLIB
835 select GENERIC_ALLOCATOR
836 select ARCH_HAS_HOLES_MEMORYMODEL
838 Support for TI's DaVinci platform.
843 select ARCH_REQUIRE_GPIOLIB
844 select ARCH_HAS_CPUFREQ
845 select GENERIC_CLOCKEVENTS
846 select HAVE_SCHED_CLOCK
847 select ARCH_HAS_HOLES_MEMORYMODEL
849 Support for TI's OMAP platform (OMAP1/2/3/4).
854 select ARCH_REQUIRE_GPIOLIB
856 select GENERIC_CLOCKEVENTS
859 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
864 # This is sorted alphabetically by mach-* pathname. However, plat-*
865 # Kconfigs may be included either alphabetically (according to the
866 # plat- suffix) or along side the corresponding mach-* source.
868 source "arch/arm/mach-aaec2000/Kconfig"
870 source "arch/arm/mach-at91/Kconfig"
872 source "arch/arm/mach-bcmring/Kconfig"
874 source "arch/arm/mach-clps711x/Kconfig"
876 source "arch/arm/mach-cns3xxx/Kconfig"
878 source "arch/arm/mach-davinci/Kconfig"
880 source "arch/arm/mach-dove/Kconfig"
882 source "arch/arm/mach-ep93xx/Kconfig"
884 source "arch/arm/mach-footbridge/Kconfig"
886 source "arch/arm/mach-gemini/Kconfig"
888 source "arch/arm/mach-h720x/Kconfig"
890 source "arch/arm/mach-integrator/Kconfig"
892 source "arch/arm/mach-iop32x/Kconfig"
894 source "arch/arm/mach-iop33x/Kconfig"
896 source "arch/arm/mach-iop13xx/Kconfig"
898 source "arch/arm/mach-ixp4xx/Kconfig"
900 source "arch/arm/mach-ixp2000/Kconfig"
902 source "arch/arm/mach-ixp23xx/Kconfig"
904 source "arch/arm/mach-kirkwood/Kconfig"
906 source "arch/arm/mach-ks8695/Kconfig"
908 source "arch/arm/mach-lh7a40x/Kconfig"
910 source "arch/arm/mach-loki/Kconfig"
912 source "arch/arm/mach-lpc32xx/Kconfig"
914 source "arch/arm/mach-msm/Kconfig"
916 source "arch/arm/mach-mv78xx0/Kconfig"
918 source "arch/arm/plat-mxc/Kconfig"
920 source "arch/arm/mach-netx/Kconfig"
922 source "arch/arm/mach-nomadik/Kconfig"
923 source "arch/arm/plat-nomadik/Kconfig"
925 source "arch/arm/mach-ns9xxx/Kconfig"
927 source "arch/arm/mach-nuc93x/Kconfig"
929 source "arch/arm/plat-omap/Kconfig"
931 source "arch/arm/mach-omap1/Kconfig"
933 source "arch/arm/mach-omap2/Kconfig"
935 source "arch/arm/mach-orion5x/Kconfig"
937 source "arch/arm/mach-pxa/Kconfig"
938 source "arch/arm/plat-pxa/Kconfig"
940 source "arch/arm/mach-mmp/Kconfig"
942 source "arch/arm/mach-realview/Kconfig"
944 source "arch/arm/mach-sa1100/Kconfig"
946 source "arch/arm/plat-samsung/Kconfig"
947 source "arch/arm/plat-s3c24xx/Kconfig"
948 source "arch/arm/plat-s5p/Kconfig"
950 source "arch/arm/plat-spear/Kconfig"
952 source "arch/arm/plat-tcc/Kconfig"
955 source "arch/arm/mach-s3c2400/Kconfig"
956 source "arch/arm/mach-s3c2410/Kconfig"
957 source "arch/arm/mach-s3c2412/Kconfig"
958 source "arch/arm/mach-s3c2416/Kconfig"
959 source "arch/arm/mach-s3c2440/Kconfig"
960 source "arch/arm/mach-s3c2443/Kconfig"
964 source "arch/arm/mach-s3c64xx/Kconfig"
967 source "arch/arm/mach-s5p64x0/Kconfig"
969 source "arch/arm/mach-s5p6442/Kconfig"
971 source "arch/arm/mach-s5pc100/Kconfig"
973 source "arch/arm/mach-s5pv210/Kconfig"
975 source "arch/arm/mach-s5pv310/Kconfig"
977 source "arch/arm/mach-shmobile/Kconfig"
979 source "arch/arm/plat-stmp3xxx/Kconfig"
981 source "arch/arm/mach-tegra/Kconfig"
983 source "arch/arm/mach-u300/Kconfig"
985 source "arch/arm/mach-ux500/Kconfig"
987 source "arch/arm/mach-versatile/Kconfig"
989 source "arch/arm/mach-vexpress/Kconfig"
991 source "arch/arm/mach-w90x900/Kconfig"
993 # Definitions to make life easier
999 select GENERIC_CLOCKEVENTS
1000 select HAVE_SCHED_CLOCK
1004 select HAVE_SCHED_CLOCK
1009 config PLAT_VERSATILE
1012 config ARM_TIMER_SP804
1015 source arch/arm/mm/Kconfig
1018 bool "Enable iWMMXt support"
1019 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1020 default y if PXA27x || PXA3xx || ARCH_MMP
1022 Enable support for iWMMXt context switching at run time if
1023 running on a CPU that supports it.
1025 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1028 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1032 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1033 (!ARCH_OMAP3 || OMAP3_EMU)
1038 source "arch/arm/Kconfig-nommu"
1041 config ARM_ERRATA_411920
1042 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1045 Invalidation of the Instruction Cache operation can
1046 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1047 It does not affect the MPCore. This option enables the ARM Ltd.
1048 recommended workaround.
1050 config ARM_ERRATA_430973
1051 bool "ARM errata: Stale prediction on replaced interworking branch"
1054 This option enables the workaround for the 430973 Cortex-A8
1055 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1056 interworking branch is replaced with another code sequence at the
1057 same virtual address, whether due to self-modifying code or virtual
1058 to physical address re-mapping, Cortex-A8 does not recover from the
1059 stale interworking branch prediction. This results in Cortex-A8
1060 executing the new code sequence in the incorrect ARM or Thumb state.
1061 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1062 and also flushes the branch target cache at every context switch.
1063 Note that setting specific bits in the ACTLR register may not be
1064 available in non-secure mode.
1066 config ARM_ERRATA_458693
1067 bool "ARM errata: Processor deadlock when a false hazard is created"
1070 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1071 erratum. For very specific sequences of memory operations, it is
1072 possible for a hazard condition intended for a cache line to instead
1073 be incorrectly associated with a different cache line. This false
1074 hazard might then cause a processor deadlock. The workaround enables
1075 the L1 caching of the NEON accesses and disables the PLD instruction
1076 in the ACTLR register. Note that setting specific bits in the ACTLR
1077 register may not be available in non-secure mode.
1079 config ARM_ERRATA_460075
1080 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1083 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1084 erratum. Any asynchronous access to the L2 cache may encounter a
1085 situation in which recent store transactions to the L2 cache are lost
1086 and overwritten with stale memory contents from external memory. The
1087 workaround disables the write-allocate mode for the L2 cache via the
1088 ACTLR register. Note that setting specific bits in the ACTLR register
1089 may not be available in non-secure mode.
1091 config ARM_ERRATA_742230
1092 bool "ARM errata: DMB operation may be faulty"
1093 depends on CPU_V7 && SMP
1095 This option enables the workaround for the 742230 Cortex-A9
1096 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1097 between two write operations may not ensure the correct visibility
1098 ordering of the two writes. This workaround sets a specific bit in
1099 the diagnostic register of the Cortex-A9 which causes the DMB
1100 instruction to behave as a DSB, ensuring the correct behaviour of
1103 config ARM_ERRATA_742231
1104 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1105 depends on CPU_V7 && SMP
1107 This option enables the workaround for the 742231 Cortex-A9
1108 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1109 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1110 accessing some data located in the same cache line, may get corrupted
1111 data due to bad handling of the address hazard when the line gets
1112 replaced from one of the CPUs at the same time as another CPU is
1113 accessing it. This workaround sets specific bits in the diagnostic
1114 register of the Cortex-A9 which reduces the linefill issuing
1115 capabilities of the processor.
1117 config PL310_ERRATA_588369
1118 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1119 depends on CACHE_L2X0 && ARCH_OMAP4
1121 The PL310 L2 cache controller implements three types of Clean &
1122 Invalidate maintenance operations: by Physical Address
1123 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1124 They are architecturally defined to behave as the execution of a
1125 clean operation followed immediately by an invalidate operation,
1126 both performing to the same memory location. This functionality
1127 is not correctly implemented in PL310 as clean lines are not
1128 invalidated as a result of these operations. Note that this errata
1129 uses Texas Instrument's secure monitor api.
1131 config ARM_ERRATA_720789
1132 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1133 depends on CPU_V7 && SMP
1135 This option enables the workaround for the 720789 Cortex-A9 (prior to
1136 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1137 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1138 As a consequence of this erratum, some TLB entries which should be
1139 invalidated are not, resulting in an incoherency in the system page
1140 tables. The workaround changes the TLB flushing routines to invalidate
1141 entries regardless of the ASID.
1143 config ARM_ERRATA_743622
1144 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1147 This option enables the workaround for the 743622 Cortex-A9
1148 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1149 optimisation in the Cortex-A9 Store Buffer may lead to data
1150 corruption. This workaround sets a specific bit in the diagnostic
1151 register of the Cortex-A9 which disables the Store Buffer
1152 optimisation, preventing the defect from occurring. This has no
1153 visible impact on the overall performance or power consumption of the
1158 source "arch/arm/common/Kconfig"
1168 Find out whether you have ISA slots on your motherboard. ISA is the
1169 name of a bus system, i.e. the way the CPU talks to the other stuff
1170 inside your box. Other bus systems are PCI, EISA, MicroChannel
1171 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1172 newer boards don't support it. If you have ISA, say Y, otherwise N.
1174 # Select ISA DMA controller support
1179 # Select ISA DMA interface
1184 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX || SA1100_NANOENGINE
1186 Find out whether you have a PCI motherboard. PCI is the name of a
1187 bus system, i.e. the way the CPU talks to the other stuff inside
1188 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1189 VESA. If you have PCI, say Y, otherwise N.
1195 config PCI_NANOENGINE
1196 bool "BSE nanoEngine PCI support"
1197 depends on SA1100_NANOENGINE
1199 Enable PCI on the BSE nanoEngine board.
1204 # Select the host bridge type
1205 config PCI_HOST_VIA82C505
1207 depends on PCI && ARCH_SHARK
1210 config PCI_HOST_ITE8152
1212 depends on PCI && MACH_ARMCORE
1216 source "drivers/pci/Kconfig"
1218 source "drivers/pcmcia/Kconfig"
1222 menu "Kernel Features"
1224 source "kernel/time/Kconfig"
1227 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1228 depends on EXPERIMENTAL
1229 depends on GENERIC_CLOCKEVENTS
1230 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1231 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1232 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1234 select USE_GENERIC_SMP_HELPERS
1235 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1237 This enables support for systems with more than one CPU. If you have
1238 a system with only one CPU, like most personal computers, say N. If
1239 you have a system with more than one CPU, say Y.
1241 If you say N here, the kernel will run on single and multiprocessor
1242 machines, but will use only one CPU of a multiprocessor machine. If
1243 you say Y here, the kernel will run on many, but not all, single
1244 processor machines. On a single processor machine, the kernel will
1245 run faster if you say N here.
1247 See also <file:Documentation/i386/IO-APIC.txt>,
1248 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1249 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1251 If you don't know what to do here, say N.
1254 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1255 depends on EXPERIMENTAL
1256 depends on SMP && !XIP && !THUMB2_KERNEL
1259 SMP kernels contain instructions which fail on non-SMP processors.
1260 Enabling this option allows the kernel to modify itself to make
1261 these instructions safe. Disabling it allows about 1K of space
1264 If you don't know what to do here, say Y.
1270 This option enables support for the ARM system coherency unit
1276 This options enables support for the ARM timer and watchdog unit
1279 prompt "Memory split"
1282 Select the desired split between kernel and user memory.
1284 If you are not absolutely sure what you are doing, leave this
1288 bool "3G/1G user/kernel split"
1290 bool "2G/2G user/kernel split"
1292 bool "1G/3G user/kernel split"
1297 default 0x40000000 if VMSPLIT_1G
1298 default 0x80000000 if VMSPLIT_2G
1302 int "Maximum number of CPUs (2-32)"
1308 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1309 depends on SMP && HOTPLUG && EXPERIMENTAL
1310 depends on !ARCH_MSM
1312 Say Y here to experiment with turning CPUs off and on. CPUs
1313 can be controlled through /sys/devices/system/cpu.
1316 bool "Use local timer interrupts"
1319 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1321 Enable support for local timers on SMP platforms, rather then the
1322 legacy IPI broadcast method. Local timers allows the system
1323 accounting to be spread across the timer interval, preventing a
1324 "thundering herd" at every timer tick.
1326 source kernel/Kconfig.preempt
1330 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1331 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1332 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1333 default AT91_TIMER_HZ if ARCH_AT91
1334 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1337 config THUMB2_KERNEL
1338 bool "Compile the kernel in Thumb-2 mode"
1339 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1341 select ARM_ASM_UNIFIED
1343 By enabling this option, the kernel will be compiled in
1344 Thumb-2 mode. A compiler/assembler that understand the unified
1345 ARM-Thumb syntax is needed.
1349 config ARM_ASM_UNIFIED
1353 bool "Use the ARM EABI to compile the kernel"
1355 This option allows for the kernel to be compiled using the latest
1356 ARM ABI (aka EABI). This is only useful if you are using a user
1357 space environment that is also compiled with EABI.
1359 Since there are major incompatibilities between the legacy ABI and
1360 EABI, especially with regard to structure member alignment, this
1361 option also changes the kernel syscall calling convention to
1362 disambiguate both ABIs and allow for backward compatibility support
1363 (selected with CONFIG_OABI_COMPAT).
1365 To use this you need GCC version 4.0.0 or later.
1368 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1369 depends on AEABI && EXPERIMENTAL
1372 This option preserves the old syscall interface along with the
1373 new (ARM EABI) one. It also provides a compatibility layer to
1374 intercept syscalls that have structure arguments which layout
1375 in memory differs between the legacy ABI and the new ARM EABI
1376 (only for non "thumb" binaries). This option adds a tiny
1377 overhead to all syscalls and produces a slightly larger kernel.
1378 If you know you'll be using only pure EABI user space then you
1379 can say N here. If this option is not selected and you attempt
1380 to execute a legacy ABI binary then the result will be
1381 UNPREDICTABLE (in fact it can be predicted that it won't work
1382 at all). If in doubt say Y.
1384 config ARCH_HAS_HOLES_MEMORYMODEL
1387 config ARCH_SPARSEMEM_ENABLE
1390 config ARCH_SPARSEMEM_DEFAULT
1391 def_bool ARCH_SPARSEMEM_ENABLE
1393 config ARCH_SELECT_MEMORY_MODEL
1394 def_bool ARCH_SPARSEMEM_ENABLE
1397 bool "High Memory Support (EXPERIMENTAL)"
1398 depends on MMU && EXPERIMENTAL
1400 The address space of ARM processors is only 4 Gigabytes large
1401 and it has to accommodate user address space, kernel address
1402 space as well as some memory mapped IO. That means that, if you
1403 have a large amount of physical memory and/or IO, not all of the
1404 memory can be "permanently mapped" by the kernel. The physical
1405 memory that is not permanently mapped is called "high memory".
1407 Depending on the selected kernel/user memory split, minimum
1408 vmalloc space and actual amount of RAM, you may not need this
1409 option which should result in a slightly faster kernel.
1414 bool "Allocate 2nd-level pagetables from highmem"
1416 depends on !OUTER_CACHE
1418 config HW_PERF_EVENTS
1419 bool "Enable hardware performance counter support for perf events"
1420 depends on PERF_EVENTS && CPU_HAS_PMU
1423 Enable hardware performance counter support for perf events. If
1424 disabled, perf events will use software events only.
1429 This enables support for sparse irqs. This is useful in general
1430 as most CPUs have a fairly sparse array of IRQ vectors, which
1431 the irq_desc then maps directly on to. Systems with a high
1432 number of off-chip IRQs will want to treat this as
1433 experimental until they have been independently verified.
1437 config FORCE_MAX_ZONEORDER
1438 int "Maximum zone order" if ARCH_SHMOBILE
1439 range 11 64 if ARCH_SHMOBILE
1440 default "9" if SA1111
1443 The kernel memory allocator divides physically contiguous memory
1444 blocks into "zones", where each zone is a power of two number of
1445 pages. This option selects the largest power of two that the kernel
1446 keeps in the memory allocator. If you need to allocate very large
1447 blocks of physically contiguous memory, then you may need to
1448 increase this value.
1450 This config option is actually maximum order plus one. For example,
1451 a value of 11 means that the largest free memory block is 2^10 pages.
1454 bool "Timer and CPU usage LEDs"
1455 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1456 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1457 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1458 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1459 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1460 ARCH_AT91 || ARCH_DAVINCI || \
1461 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1463 If you say Y here, the LEDs on your machine will be used
1464 to provide useful information about your current system status.
1466 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1467 be able to select which LEDs are active using the options below. If
1468 you are compiling a kernel for the EBSA-110 or the LART however, the
1469 red LED will simply flash regularly to indicate that the system is
1470 still functional. It is safe to say Y here if you have a CATS
1471 system, but the driver will do nothing.
1474 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1475 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1476 || MACH_OMAP_PERSEUS2
1478 depends on !GENERIC_CLOCKEVENTS
1479 default y if ARCH_EBSA110
1481 If you say Y here, one of the system LEDs (the green one on the
1482 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1483 will flash regularly to indicate that the system is still
1484 operational. This is mainly useful to kernel hackers who are
1485 debugging unstable kernels.
1487 The LART uses the same LED for both Timer LED and CPU usage LED
1488 functions. You may choose to use both, but the Timer LED function
1489 will overrule the CPU usage LED.
1492 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1494 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1495 || MACH_OMAP_PERSEUS2
1498 If you say Y here, the red LED will be used to give a good real
1499 time indication of CPU usage, by lighting whenever the idle task
1500 is not currently executing.
1502 The LART uses the same LED for both Timer LED and CPU usage LED
1503 functions. You may choose to use both, but the Timer LED function
1504 will overrule the CPU usage LED.
1506 config ALIGNMENT_TRAP
1508 depends on CPU_CP15_MMU
1509 default y if !ARCH_EBSA110
1510 select HAVE_PROC_CPU if PROC_FS
1512 ARM processors cannot fetch/store information which is not
1513 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1514 address divisible by 4. On 32-bit ARM processors, these non-aligned
1515 fetch/store instructions will be emulated in software if you say
1516 here, which has a severe performance impact. This is necessary for
1517 correct operation of some network protocols. With an IP-only
1518 configuration it is safe to say N, otherwise say Y.
1520 config UACCESS_WITH_MEMCPY
1521 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1522 depends on MMU && EXPERIMENTAL
1523 default y if CPU_FEROCEON
1525 Implement faster copy_to_user and clear_user methods for CPU
1526 cores where a 8-word STM instruction give significantly higher
1527 memory write throughput than a sequence of individual 32bit stores.
1529 A possible side effect is a slight increase in scheduling latency
1530 between threads sharing the same address space if they invoke
1531 such copy operations with large buffers.
1533 However, if the CPU data cache is using a write-allocate mode,
1534 this option is unlikely to provide any performance gain.
1538 prompt "Enable seccomp to safely compute untrusted bytecode"
1540 This kernel feature is useful for number crunching applications
1541 that may need to compute untrusted bytecode during their
1542 execution. By using pipes or other transports made available to
1543 the process as file descriptors supporting the read/write
1544 syscalls, it's possible to isolate those applications in
1545 their own address space using seccomp. Once seccomp is
1546 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1547 and the task is only allowed to execute a few safe syscalls
1548 defined by each seccomp mode.
1550 config CC_STACKPROTECTOR
1551 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1553 This option turns on the -fstack-protector GCC feature. This
1554 feature puts, at the beginning of functions, a canary value on
1555 the stack just before the return address, and validates
1556 the value just before actually returning. Stack based buffer
1557 overflows (that need to overwrite this return address) now also
1558 overwrite the canary, which gets detected and the attack is then
1559 neutralized via a kernel panic.
1560 This feature requires gcc version 4.2 or above.
1562 config DEPRECATED_PARAM_STRUCT
1563 bool "Provide old way to pass kernel parameters"
1565 This was deprecated in 2001 and announced to live on for 5 years.
1566 Some old boot loaders still use this way.
1572 # Compressed boot loader in ROM. Yes, we really want to ask about
1573 # TEXT and BSS so we preserve their values in the config files.
1574 config ZBOOT_ROM_TEXT
1575 hex "Compressed ROM boot loader base address"
1578 The physical address at which the ROM-able zImage is to be
1579 placed in the target. Platforms which normally make use of
1580 ROM-able zImage formats normally set this to a suitable
1581 value in their defconfig file.
1583 If ZBOOT_ROM is not enabled, this has no effect.
1585 config ZBOOT_ROM_BSS
1586 hex "Compressed ROM boot loader BSS address"
1589 The base address of an area of read/write memory in the target
1590 for the ROM-able zImage which must be available while the
1591 decompressor is running. It must be large enough to hold the
1592 entire decompressed kernel plus an additional 128 KiB.
1593 Platforms which normally make use of ROM-able zImage formats
1594 normally set this to a suitable value in their defconfig file.
1596 If ZBOOT_ROM is not enabled, this has no effect.
1599 bool "Compressed boot loader in ROM/flash"
1600 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1602 Say Y here if you intend to execute your compressed kernel image
1603 (zImage) directly from ROM or flash. If unsure, say N.
1606 string "Default kernel command string"
1609 On some architectures (EBSA110 and CATS), there is currently no way
1610 for the boot loader to pass arguments to the kernel. For these
1611 architectures, you should supply some command-line options at build
1612 time by entering them here. As a minimum, you should specify the
1613 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1615 config CMDLINE_FORCE
1616 bool "Always use the default kernel command string"
1617 depends on CMDLINE != ""
1619 Always use the default kernel command string, even if the boot
1620 loader passes other arguments to the kernel.
1621 This is useful if you cannot or don't want to change the
1622 command-line options your boot loader passes to the kernel.
1627 bool "Kernel Execute-In-Place from ROM"
1628 depends on !ZBOOT_ROM
1630 Execute-In-Place allows the kernel to run from non-volatile storage
1631 directly addressable by the CPU, such as NOR flash. This saves RAM
1632 space since the text section of the kernel is not loaded from flash
1633 to RAM. Read-write sections, such as the data section and stack,
1634 are still copied to RAM. The XIP kernel is not compressed since
1635 it has to run directly from flash, so it will take more space to
1636 store it. The flash address used to link the kernel object files,
1637 and for storing it, is configuration dependent. Therefore, if you
1638 say Y here, you must know the proper physical address where to
1639 store the kernel image depending on your own flash memory usage.
1641 Also note that the make target becomes "make xipImage" rather than
1642 "make zImage" or "make Image". The final kernel binary to put in
1643 ROM memory will be arch/arm/boot/xipImage.
1647 config XIP_PHYS_ADDR
1648 hex "XIP Kernel Physical Location"
1649 depends on XIP_KERNEL
1650 default "0x00080000"
1652 This is the physical address in your flash memory the kernel will
1653 be linked for and stored to. This address is dependent on your
1657 bool "Kexec system call (EXPERIMENTAL)"
1658 depends on EXPERIMENTAL
1660 kexec is a system call that implements the ability to shutdown your
1661 current kernel, and to start another kernel. It is like a reboot
1662 but it is independent of the system firmware. And like a reboot
1663 you can start any kernel with it, not just Linux.
1665 It is an ongoing process to be certain the hardware in a machine
1666 is properly shutdown, so do not be surprised if this code does not
1667 initially work for you. It may help to enable device hotplugging
1671 bool "Export atags in procfs"
1675 Should the atags used to boot the kernel be exported in an "atags"
1676 file in procfs. Useful with kexec.
1679 bool "Build kdump crash kernel (EXPERIMENTAL)"
1680 depends on EXPERIMENTAL
1682 Generate crash dump after being started by kexec. This should
1683 be normally only set in special crash dump kernels which are
1684 loaded in the main kernel with kexec-tools into a specially
1685 reserved region and then later executed after a crash by
1686 kdump/kexec. The crash dump kernel must be compiled to a
1687 memory address not used by the main kernel
1689 For more details see Documentation/kdump/kdump.txt
1691 config AUTO_ZRELADDR
1692 bool "Auto calculation of the decompressed kernel image address"
1693 depends on !ZBOOT_ROM && !ARCH_U300
1695 ZRELADDR is the physical address where the decompressed kernel
1696 image will be placed. If AUTO_ZRELADDR is selected, the address
1697 will be determined at run-time by masking the current IP with
1698 0xf8000000. This assumes the zImage being placed in the first 128MB
1699 from start of memory.
1703 menu "CPU Power Management"
1707 source "drivers/cpufreq/Kconfig"
1710 tristate "CPUfreq driver for i.MX CPUs"
1711 depends on ARCH_MXC && CPU_FREQ
1713 This enables the CPUfreq driver for i.MX CPUs.
1715 config CPU_FREQ_SA1100
1718 config CPU_FREQ_SA1110
1721 config CPU_FREQ_INTEGRATOR
1722 tristate "CPUfreq driver for ARM Integrator CPUs"
1723 depends on ARCH_INTEGRATOR && CPU_FREQ
1726 This enables the CPUfreq driver for ARM Integrator CPUs.
1728 For details, take a look at <file:Documentation/cpu-freq>.
1734 depends on CPU_FREQ && ARCH_PXA && PXA25x
1736 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1738 config CPU_FREQ_S3C64XX
1739 bool "CPUfreq support for Samsung S3C64XX CPUs"
1740 depends on CPU_FREQ && CPU_S3C6410
1745 Internal configuration node for common cpufreq on Samsung SoC
1747 config CPU_FREQ_S3C24XX
1748 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1749 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1752 This enables the CPUfreq driver for the Samsung S3C24XX family
1755 For details, take a look at <file:Documentation/cpu-freq>.
1759 config CPU_FREQ_S3C24XX_PLL
1760 bool "Support CPUfreq changing of PLL frequency"
1761 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1763 Compile in support for changing the PLL frequency from the
1764 S3C24XX series CPUfreq driver. The PLL takes time to settle
1765 after a frequency change, so by default it is not enabled.
1767 This also means that the PLL tables for the selected CPU(s) will
1768 be built which may increase the size of the kernel image.
1770 config CPU_FREQ_S3C24XX_DEBUG
1771 bool "Debug CPUfreq Samsung driver core"
1772 depends on CPU_FREQ_S3C24XX
1774 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1776 config CPU_FREQ_S3C24XX_IODEBUG
1777 bool "Debug CPUfreq Samsung driver IO timing"
1778 depends on CPU_FREQ_S3C24XX
1780 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1782 config CPU_FREQ_S3C24XX_DEBUGFS
1783 bool "Export debugfs for CPUFreq"
1784 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1786 Export status information via debugfs.
1790 source "drivers/cpuidle/Kconfig"
1794 menu "Floating point emulation"
1796 comment "At least one emulation must be selected"
1799 bool "NWFPE math emulation"
1800 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1802 Say Y to include the NWFPE floating point emulator in the kernel.
1803 This is necessary to run most binaries. Linux does not currently
1804 support floating point hardware so you need to say Y here even if
1805 your machine has an FPA or floating point co-processor podule.
1807 You may say N here if you are going to load the Acorn FPEmulator
1808 early in the bootup.
1811 bool "Support extended precision"
1812 depends on FPE_NWFPE
1814 Say Y to include 80-bit support in the kernel floating-point
1815 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1816 Note that gcc does not generate 80-bit operations by default,
1817 so in most cases this option only enlarges the size of the
1818 floating point emulator without any good reason.
1820 You almost surely want to say N here.
1823 bool "FastFPE math emulation (EXPERIMENTAL)"
1824 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1826 Say Y here to include the FAST floating point emulator in the kernel.
1827 This is an experimental much faster emulator which now also has full
1828 precision for the mantissa. It does not support any exceptions.
1829 It is very simple, and approximately 3-6 times faster than NWFPE.
1831 It should be sufficient for most programs. It may be not suitable
1832 for scientific calculations, but you have to check this for yourself.
1833 If you do not feel you need a faster FP emulation you should better
1837 bool "VFP-format floating point maths"
1838 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1840 Say Y to include VFP support code in the kernel. This is needed
1841 if your hardware includes a VFP unit.
1843 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1844 release notes and additional status information.
1846 Say N if your target does not have VFP hardware.
1854 bool "Advanced SIMD (NEON) Extension support"
1855 depends on VFPv3 && CPU_V7
1857 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1862 menu "Userspace binary formats"
1864 source "fs/Kconfig.binfmt"
1867 tristate "RISC OS personality"
1870 Say Y here to include the kernel code necessary if you want to run
1871 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1872 experimental; if this sounds frightening, say N and sleep in peace.
1873 You can also say M here to compile this support as a module (which
1874 will be called arthur).
1878 menu "Power management options"
1880 source "kernel/power/Kconfig"
1882 config ARCH_SUSPEND_POSSIBLE
1887 source "net/Kconfig"
1889 source "drivers/Kconfig"
1893 source "arch/arm/Kconfig.debug"
1895 source "security/Kconfig"
1897 source "crypto/Kconfig"
1899 source "lib/Kconfig"