5 select HAVE_DMA_API_DEBUG
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
32 The ARM series is a line of low-power-consumption RISC chip designs
33 licensed by ARM Ltd and targeted at embedded applications and
34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
35 manufactured, but legacy ARM-based PC hardware remains popular in
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
45 config SYS_SUPPORTS_APM_EMULATION
48 config HAVE_SCHED_CLOCK
54 config ARCH_USES_GETTIMEOFFSET
58 config GENERIC_CLOCKEVENTS
61 config GENERIC_CLOCKEVENTS_BROADCAST
63 depends on GENERIC_CLOCKEVENTS
68 select GENERIC_ALLOCATOR
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
87 Say Y here if you are building a kernel for an EISA-based machine.
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
102 config STACKTRACE_SUPPORT
106 config HAVE_LATENCYTOP_SUPPORT
111 config LOCKDEP_SUPPORT
115 config TRACE_IRQFLAGS_SUPPORT
119 config HARDIRQS_SW_RESEND
123 config GENERIC_IRQ_PROBE
127 config GENERIC_LOCKBREAK
130 depends on SMP && PREEMPT
132 config RWSEM_GENERIC_SPINLOCK
136 config RWSEM_XCHGADD_ALGORITHM
139 config ARCH_HAS_ILOG2_U32
142 config ARCH_HAS_ILOG2_U64
145 config ARCH_HAS_CPUFREQ
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
152 config ARCH_HAS_CPU_IDLE_WAIT
155 config GENERIC_HWEIGHT
159 config GENERIC_CALIBRATE_DELAY
163 config ARCH_MAY_HAVE_PC_FDC
169 config NEED_DMA_MAP_STATE
172 config GENERIC_ISA_DMA
181 config ARM_L1_CACHE_SHIFT_6
184 Setting ARM L1 cache line size to 64 Bytes.
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 config ARM_PATCH_PHYS_VIRT
195 bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
196 depends on EXPERIMENTAL
197 depends on !XIP_KERNEL && MMU
198 depends on !ARCH_REALVIEW || !SPARSEMEM
200 Patch phys-to-virt translation functions at runtime according to
201 the position of the kernel in system memory.
203 This can only be used with non-XIP with MMU kernels where
204 the base of physical memory is at a 16MB boundary.
206 config ARM_PATCH_PHYS_VIRT_16BIT
208 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
210 source "init/Kconfig"
212 source "kernel/Kconfig.freezer"
217 bool "MMU-based Paged Memory Management Support"
220 Select if you want MMU-based virtualised addressing space
221 support by paged memory management. If unsure, say 'Y'.
224 # The "ARM system type" choice list is ordered alphabetically by option
225 # text. Please add new entries in the option alphabetic order.
228 prompt "ARM system type"
229 default ARCH_VERSATILE
232 bool "Agilent AAEC-2000 based"
236 select ARCH_USES_GETTIMEOFFSET
238 This enables support for systems based on the Agilent AAEC-2000
240 config ARCH_INTEGRATOR
241 bool "ARM Ltd. Integrator family"
243 select ARCH_HAS_CPUFREQ
246 select GENERIC_CLOCKEVENTS
247 select PLAT_VERSATILE
249 Support for ARM's Integrator platform.
252 bool "ARM Ltd. RealView family"
255 select HAVE_SCHED_CLOCK
257 select GENERIC_CLOCKEVENTS
258 select ARCH_WANT_OPTIONAL_GPIOLIB
259 select PLAT_VERSATILE
260 select ARM_TIMER_SP804
261 select GPIO_PL061 if GPIOLIB
263 This enables support for ARM Ltd RealView boards.
265 config ARCH_VERSATILE
266 bool "ARM Ltd. Versatile family"
270 select HAVE_SCHED_CLOCK
272 select GENERIC_CLOCKEVENTS
273 select ARCH_WANT_OPTIONAL_GPIOLIB
274 select PLAT_VERSATILE
275 select ARM_TIMER_SP804
277 This enables support for ARM Ltd Versatile board.
280 bool "ARM Ltd. Versatile Express family"
281 select ARCH_WANT_OPTIONAL_GPIOLIB
283 select ARM_TIMER_SP804
285 select GENERIC_CLOCKEVENTS
287 select HAVE_SCHED_CLOCK
289 select PLAT_VERSATILE
291 This enables support for the ARM Ltd Versatile Express boards.
295 select ARCH_REQUIRE_GPIOLIB
298 This enables support for systems based on the Atmel AT91RM9200,
299 AT91SAM9 and AT91CAP9 processors.
302 bool "Broadcom BCMRING"
307 select GENERIC_CLOCKEVENTS
308 select ARCH_WANT_OPTIONAL_GPIOLIB
310 Support for Broadcom's BCMRing platform.
313 bool "Cirrus Logic CLPS711x/EP721x-based"
315 select ARCH_USES_GETTIMEOFFSET
317 Support for Cirrus Logic 711x/721x based boards.
320 bool "Cavium Networks CNS3XXX family"
322 select GENERIC_CLOCKEVENTS
324 select MIGHT_HAVE_PCI
325 select PCI_DOMAINS if PCI
327 Support for Cavium Networks CNS3XXX platform.
330 bool "Cortina Systems Gemini"
332 select ARCH_REQUIRE_GPIOLIB
333 select ARCH_USES_GETTIMEOFFSET
335 Support for the Cortina Systems Gemini family SoCs
342 select ARCH_USES_GETTIMEOFFSET
344 This is an evaluation board for the StrongARM processor available
345 from Digital. It has limited hardware on-board, including an
346 Ethernet interface, two PCMCIA sockets, two serial ports and a
355 select ARCH_REQUIRE_GPIOLIB
356 select ARCH_HAS_HOLES_MEMORYMODEL
357 select ARCH_USES_GETTIMEOFFSET
359 This enables support for the Cirrus EP93xx series of CPUs.
361 config ARCH_FOOTBRIDGE
365 select ARCH_USES_GETTIMEOFFSET
367 Support for systems based on the DC21285 companion chip
368 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
371 bool "Freescale MXC/iMX-based"
372 select GENERIC_CLOCKEVENTS
373 select ARCH_REQUIRE_GPIOLIB
376 Support for Freescale MXC/iMX-based family of processors
379 bool "Freescale MXS-based"
380 select GENERIC_CLOCKEVENTS
381 select ARCH_REQUIRE_GPIOLIB
384 Support for Freescale MXS-based family of processors
387 bool "Freescale STMP3xxx"
390 select ARCH_REQUIRE_GPIOLIB
391 select GENERIC_CLOCKEVENTS
392 select USB_ARCH_HAS_EHCI
394 Support for systems based on the Freescale 3xxx CPUs.
397 bool "Hilscher NetX based"
400 select GENERIC_CLOCKEVENTS
402 This enables support for systems based on the Hilscher NetX Soc
405 bool "Hynix HMS720x-based"
408 select ARCH_USES_GETTIMEOFFSET
410 This enables support for systems based on the Hynix HMS720x
418 select ARCH_SUPPORTS_MSI
421 Support for Intel's IOP13XX (XScale) family of processors.
429 select ARCH_REQUIRE_GPIOLIB
431 Support for Intel's 80219 and IOP32X (XScale) family of
440 select ARCH_REQUIRE_GPIOLIB
442 Support for Intel's IOP33X (XScale) family of processors.
449 select ARCH_USES_GETTIMEOFFSET
451 Support for Intel's IXP23xx (XScale) family of processors.
454 bool "IXP2400/2800-based"
458 select ARCH_USES_GETTIMEOFFSET
460 Support for Intel's IXP2400/2800 (XScale) family of processors.
467 select GENERIC_CLOCKEVENTS
468 select HAVE_SCHED_CLOCK
469 select MIGHT_HAVE_PCI
470 select DMABOUNCE if PCI
472 Support for Intel's IXP4XX (XScale) family of processors.
477 select ARCH_REQUIRE_GPIOLIB
478 select GENERIC_CLOCKEVENTS
481 Support for the Marvell Dove SoC 88AP510
484 bool "Marvell Kirkwood"
487 select ARCH_REQUIRE_GPIOLIB
488 select GENERIC_CLOCKEVENTS
491 Support for the following Marvell Kirkwood series SoCs:
492 88F6180, 88F6192 and 88F6281.
495 bool "Marvell Loki (88RC8480)"
497 select GENERIC_CLOCKEVENTS
500 Support for the Marvell Loki (88RC8480) SoC.
505 select ARCH_REQUIRE_GPIOLIB
508 select USB_ARCH_HAS_OHCI
511 select GENERIC_CLOCKEVENTS
513 Support for the NXP LPC32XX family of processors
516 bool "Marvell MV78xx0"
519 select ARCH_REQUIRE_GPIOLIB
520 select GENERIC_CLOCKEVENTS
523 Support for the following Marvell MV78xx0 series SoCs:
531 select ARCH_REQUIRE_GPIOLIB
532 select GENERIC_CLOCKEVENTS
535 Support for the following Marvell Orion 5x series SoCs:
536 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
537 Orion-2 (5281), Orion-1-90 (6183).
540 bool "Marvell PXA168/910/MMP2"
542 select ARCH_REQUIRE_GPIOLIB
544 select GENERIC_CLOCKEVENTS
545 select HAVE_SCHED_CLOCK
550 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
553 bool "Micrel/Kendin KS8695"
555 select ARCH_REQUIRE_GPIOLIB
556 select ARCH_USES_GETTIMEOFFSET
558 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
559 System-on-Chip devices.
562 bool "NetSilicon NS9xxx"
565 select GENERIC_CLOCKEVENTS
568 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
571 <http://www.digi.com/products/microprocessors/index.jsp>
574 bool "Nuvoton W90X900 CPU"
576 select ARCH_REQUIRE_GPIOLIB
578 select GENERIC_CLOCKEVENTS
580 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
581 At present, the w90x900 has been renamed nuc900, regarding
582 the ARM series product line, you can login the following
583 link address to know more.
585 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
586 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
589 bool "Nuvoton NUC93X CPU"
593 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
594 low-power and high performance MPEG-4/JPEG multimedia controller chip.
600 select GENERIC_CLOCKEVENTS
603 select HAVE_SCHED_CLOCK
604 select ARCH_HAS_BARRIERS if CACHE_L2X0
605 select ARCH_HAS_CPUFREQ
607 This enables support for NVIDIA Tegra based systems (Tegra APX,
608 Tegra 6xx and Tegra 2 series).
611 bool "Philips Nexperia PNX4008 Mobile"
614 select ARCH_USES_GETTIMEOFFSET
616 This enables support for Philips PNX4008 mobile platform.
619 bool "PXA2xx/PXA3xx-based"
622 select ARCH_HAS_CPUFREQ
624 select ARCH_REQUIRE_GPIOLIB
625 select GENERIC_CLOCKEVENTS
626 select HAVE_SCHED_CLOCK
631 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
636 select GENERIC_CLOCKEVENTS
637 select ARCH_REQUIRE_GPIOLIB
639 Support for Qualcomm MSM/QSD based systems. This runs on the
640 apps processor of the MSM/QSD and depends on a shared memory
641 interface to the modem processor which runs the baseband
642 stack and controls some vital subsystems
643 (clock and power control, etc).
646 bool "Renesas SH-Mobile / R-Mobile"
649 select GENERIC_CLOCKEVENTS
652 select MULTI_IRQ_HANDLER
654 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
661 select ARCH_MAY_HAVE_PC_FDC
662 select HAVE_PATA_PLATFORM
665 select ARCH_SPARSEMEM_ENABLE
666 select ARCH_USES_GETTIMEOFFSET
668 On the Acorn Risc-PC, Linux can support the internal IDE disk and
669 CD-ROM interface, serial and parallel port, and the floppy drive.
675 select ARCH_SPARSEMEM_ENABLE
677 select ARCH_HAS_CPUFREQ
679 select GENERIC_CLOCKEVENTS
681 select HAVE_SCHED_CLOCK
683 select ARCH_REQUIRE_GPIOLIB
685 Support for StrongARM 11x0 based boards.
688 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
690 select ARCH_HAS_CPUFREQ
692 select ARCH_USES_GETTIMEOFFSET
693 select HAVE_S3C2410_I2C if I2C
695 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
696 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
697 the Samsung SMDK2410 development board (and derivatives).
699 Note, the S3C2416 and the S3C2450 are so close that they even share
700 the same SoC ID code. This means that there is no seperate machine
701 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
704 bool "Samsung S3C64XX"
710 select ARCH_USES_GETTIMEOFFSET
711 select ARCH_HAS_CPUFREQ
712 select ARCH_REQUIRE_GPIOLIB
713 select SAMSUNG_CLKSRC
714 select SAMSUNG_IRQ_VIC_TIMER
715 select SAMSUNG_IRQ_UART
716 select S3C_GPIO_TRACK
717 select S3C_GPIO_PULL_UPDOWN
718 select S3C_GPIO_CFG_S3C24XX
719 select S3C_GPIO_CFG_S3C64XX
721 select USB_ARCH_HAS_OHCI
722 select SAMSUNG_GPIOLIB_4BIT
723 select HAVE_S3C2410_I2C if I2C
724 select HAVE_S3C2410_WATCHDOG if WATCHDOG
726 Samsung S3C64XX series based systems
729 bool "Samsung S5P6440 S5P6450"
733 select HAVE_S3C2410_WATCHDOG if WATCHDOG
734 select ARCH_USES_GETTIMEOFFSET
735 select HAVE_S3C2410_I2C if I2C
736 select HAVE_S3C_RTC if RTC_CLASS
738 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
742 bool "Samsung S5P6442"
746 select ARCH_USES_GETTIMEOFFSET
747 select HAVE_S3C2410_WATCHDOG if WATCHDOG
749 Samsung S5P6442 CPU based systems
752 bool "Samsung S5PC100"
756 select ARM_L1_CACHE_SHIFT_6
757 select ARCH_USES_GETTIMEOFFSET
758 select HAVE_S3C2410_I2C if I2C
759 select HAVE_S3C_RTC if RTC_CLASS
760 select HAVE_S3C2410_WATCHDOG if WATCHDOG
762 Samsung S5PC100 series based systems
765 bool "Samsung S5PV210/S5PC110"
767 select ARCH_SPARSEMEM_ENABLE
770 select ARM_L1_CACHE_SHIFT_6
771 select ARCH_HAS_CPUFREQ
772 select ARCH_USES_GETTIMEOFFSET
773 select HAVE_S3C2410_I2C if I2C
774 select HAVE_S3C_RTC if RTC_CLASS
775 select HAVE_S3C2410_WATCHDOG if WATCHDOG
777 Samsung S5PV210/S5PC110 series based systems
780 bool "Samsung S5PV310/S5PC210"
782 select ARCH_SPARSEMEM_ENABLE
785 select ARCH_HAS_CPUFREQ
786 select GENERIC_CLOCKEVENTS
787 select HAVE_S3C_RTC if RTC_CLASS
788 select HAVE_S3C2410_I2C if I2C
789 select HAVE_S3C2410_WATCHDOG if WATCHDOG
791 Samsung S5PV310 series based systems
800 select ARCH_USES_GETTIMEOFFSET
802 Support for the StrongARM based Digital DNARD machine, also known
803 as "Shark" (<http://www.shark-linux.de/shark.html>).
806 bool "Telechips TCC ARM926-based systems"
810 select GENERIC_CLOCKEVENTS
812 Support for Telechips TCC ARM926-based systems.
817 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
818 select ARCH_USES_GETTIMEOFFSET
820 Say Y here for systems based on one of the Sharp LH7A40X
821 System on a Chip processors. These CPUs include an ARM922T
822 core with a wide array of integrated devices for
823 hand-held and low-power applications.
826 bool "ST-Ericsson U300 Series"
829 select HAVE_SCHED_CLOCK
833 select GENERIC_CLOCKEVENTS
837 Support for ST-Ericsson U300 series mobile platforms.
840 bool "ST-Ericsson U8500 Series"
843 select GENERIC_CLOCKEVENTS
845 select ARCH_REQUIRE_GPIOLIB
846 select ARCH_HAS_CPUFREQ
848 Support for ST-Ericsson's Ux500 architecture
851 bool "STMicroelectronics Nomadik"
856 select GENERIC_CLOCKEVENTS
857 select ARCH_REQUIRE_GPIOLIB
859 Support for the Nomadik platform by ST-Ericsson
863 select GENERIC_CLOCKEVENTS
864 select ARCH_REQUIRE_GPIOLIB
868 select GENERIC_ALLOCATOR
869 select ARCH_HAS_HOLES_MEMORYMODEL
871 Support for TI's DaVinci platform.
876 select ARCH_REQUIRE_GPIOLIB
877 select ARCH_HAS_CPUFREQ
878 select GENERIC_CLOCKEVENTS
879 select HAVE_SCHED_CLOCK
880 select ARCH_HAS_HOLES_MEMORYMODEL
882 Support for TI's OMAP platform (OMAP1/2/3/4).
887 select ARCH_REQUIRE_GPIOLIB
889 select GENERIC_CLOCKEVENTS
892 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
897 # This is sorted alphabetically by mach-* pathname. However, plat-*
898 # Kconfigs may be included either alphabetically (according to the
899 # plat- suffix) or along side the corresponding mach-* source.
901 source "arch/arm/mach-aaec2000/Kconfig"
903 source "arch/arm/mach-at91/Kconfig"
905 source "arch/arm/mach-bcmring/Kconfig"
907 source "arch/arm/mach-clps711x/Kconfig"
909 source "arch/arm/mach-cns3xxx/Kconfig"
911 source "arch/arm/mach-davinci/Kconfig"
913 source "arch/arm/mach-dove/Kconfig"
915 source "arch/arm/mach-ep93xx/Kconfig"
917 source "arch/arm/mach-footbridge/Kconfig"
919 source "arch/arm/mach-gemini/Kconfig"
921 source "arch/arm/mach-h720x/Kconfig"
923 source "arch/arm/mach-integrator/Kconfig"
925 source "arch/arm/mach-iop32x/Kconfig"
927 source "arch/arm/mach-iop33x/Kconfig"
929 source "arch/arm/mach-iop13xx/Kconfig"
931 source "arch/arm/mach-ixp4xx/Kconfig"
933 source "arch/arm/mach-ixp2000/Kconfig"
935 source "arch/arm/mach-ixp23xx/Kconfig"
937 source "arch/arm/mach-kirkwood/Kconfig"
939 source "arch/arm/mach-ks8695/Kconfig"
941 source "arch/arm/mach-lh7a40x/Kconfig"
943 source "arch/arm/mach-loki/Kconfig"
945 source "arch/arm/mach-lpc32xx/Kconfig"
947 source "arch/arm/mach-msm/Kconfig"
949 source "arch/arm/mach-mv78xx0/Kconfig"
951 source "arch/arm/plat-mxc/Kconfig"
953 source "arch/arm/mach-mxs/Kconfig"
955 source "arch/arm/mach-netx/Kconfig"
957 source "arch/arm/mach-nomadik/Kconfig"
958 source "arch/arm/plat-nomadik/Kconfig"
960 source "arch/arm/mach-ns9xxx/Kconfig"
962 source "arch/arm/mach-nuc93x/Kconfig"
964 source "arch/arm/plat-omap/Kconfig"
966 source "arch/arm/mach-omap1/Kconfig"
968 source "arch/arm/mach-omap2/Kconfig"
970 source "arch/arm/mach-orion5x/Kconfig"
972 source "arch/arm/mach-pxa/Kconfig"
973 source "arch/arm/plat-pxa/Kconfig"
975 source "arch/arm/mach-mmp/Kconfig"
977 source "arch/arm/mach-realview/Kconfig"
979 source "arch/arm/mach-sa1100/Kconfig"
981 source "arch/arm/plat-samsung/Kconfig"
982 source "arch/arm/plat-s3c24xx/Kconfig"
983 source "arch/arm/plat-s5p/Kconfig"
985 source "arch/arm/plat-spear/Kconfig"
987 source "arch/arm/plat-tcc/Kconfig"
990 source "arch/arm/mach-s3c2400/Kconfig"
991 source "arch/arm/mach-s3c2410/Kconfig"
992 source "arch/arm/mach-s3c2412/Kconfig"
993 source "arch/arm/mach-s3c2416/Kconfig"
994 source "arch/arm/mach-s3c2440/Kconfig"
995 source "arch/arm/mach-s3c2443/Kconfig"
999 source "arch/arm/mach-s3c64xx/Kconfig"
1002 source "arch/arm/mach-s5p64x0/Kconfig"
1004 source "arch/arm/mach-s5p6442/Kconfig"
1006 source "arch/arm/mach-s5pc100/Kconfig"
1008 source "arch/arm/mach-s5pv210/Kconfig"
1010 source "arch/arm/mach-s5pv310/Kconfig"
1012 source "arch/arm/mach-shmobile/Kconfig"
1014 source "arch/arm/plat-stmp3xxx/Kconfig"
1016 source "arch/arm/mach-tegra/Kconfig"
1018 source "arch/arm/mach-u300/Kconfig"
1020 source "arch/arm/mach-ux500/Kconfig"
1022 source "arch/arm/mach-versatile/Kconfig"
1024 source "arch/arm/mach-vexpress/Kconfig"
1026 source "arch/arm/mach-w90x900/Kconfig"
1028 # Definitions to make life easier
1034 select GENERIC_CLOCKEVENTS
1035 select HAVE_SCHED_CLOCK
1039 select HAVE_SCHED_CLOCK
1044 config PLAT_VERSATILE
1047 config ARM_TIMER_SP804
1050 source arch/arm/mm/Kconfig
1053 bool "Enable iWMMXt support"
1054 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1055 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1057 Enable support for iWMMXt context switching at run time if
1058 running on a CPU that supports it.
1060 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1063 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1067 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1068 (!ARCH_OMAP3 || OMAP3_EMU)
1072 config MULTI_IRQ_HANDLER
1075 Allow each machine to specify it's own IRQ handler at run time.
1078 source "arch/arm/Kconfig-nommu"
1081 config ARM_ERRATA_411920
1082 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1085 Invalidation of the Instruction Cache operation can
1086 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1087 It does not affect the MPCore. This option enables the ARM Ltd.
1088 recommended workaround.
1090 config ARM_ERRATA_430973
1091 bool "ARM errata: Stale prediction on replaced interworking branch"
1094 This option enables the workaround for the 430973 Cortex-A8
1095 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1096 interworking branch is replaced with another code sequence at the
1097 same virtual address, whether due to self-modifying code or virtual
1098 to physical address re-mapping, Cortex-A8 does not recover from the
1099 stale interworking branch prediction. This results in Cortex-A8
1100 executing the new code sequence in the incorrect ARM or Thumb state.
1101 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1102 and also flushes the branch target cache at every context switch.
1103 Note that setting specific bits in the ACTLR register may not be
1104 available in non-secure mode.
1106 config ARM_ERRATA_458693
1107 bool "ARM errata: Processor deadlock when a false hazard is created"
1110 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1111 erratum. For very specific sequences of memory operations, it is
1112 possible for a hazard condition intended for a cache line to instead
1113 be incorrectly associated with a different cache line. This false
1114 hazard might then cause a processor deadlock. The workaround enables
1115 the L1 caching of the NEON accesses and disables the PLD instruction
1116 in the ACTLR register. Note that setting specific bits in the ACTLR
1117 register may not be available in non-secure mode.
1119 config ARM_ERRATA_460075
1120 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1123 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1124 erratum. Any asynchronous access to the L2 cache may encounter a
1125 situation in which recent store transactions to the L2 cache are lost
1126 and overwritten with stale memory contents from external memory. The
1127 workaround disables the write-allocate mode for the L2 cache via the
1128 ACTLR register. Note that setting specific bits in the ACTLR register
1129 may not be available in non-secure mode.
1131 config ARM_ERRATA_742230
1132 bool "ARM errata: DMB operation may be faulty"
1133 depends on CPU_V7 && SMP
1135 This option enables the workaround for the 742230 Cortex-A9
1136 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1137 between two write operations may not ensure the correct visibility
1138 ordering of the two writes. This workaround sets a specific bit in
1139 the diagnostic register of the Cortex-A9 which causes the DMB
1140 instruction to behave as a DSB, ensuring the correct behaviour of
1143 config ARM_ERRATA_742231
1144 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1145 depends on CPU_V7 && SMP
1147 This option enables the workaround for the 742231 Cortex-A9
1148 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1149 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1150 accessing some data located in the same cache line, may get corrupted
1151 data due to bad handling of the address hazard when the line gets
1152 replaced from one of the CPUs at the same time as another CPU is
1153 accessing it. This workaround sets specific bits in the diagnostic
1154 register of the Cortex-A9 which reduces the linefill issuing
1155 capabilities of the processor.
1157 config PL310_ERRATA_588369
1158 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1159 depends on CACHE_L2X0 && ARCH_OMAP4
1161 The PL310 L2 cache controller implements three types of Clean &
1162 Invalidate maintenance operations: by Physical Address
1163 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1164 They are architecturally defined to behave as the execution of a
1165 clean operation followed immediately by an invalidate operation,
1166 both performing to the same memory location. This functionality
1167 is not correctly implemented in PL310 as clean lines are not
1168 invalidated as a result of these operations. Note that this errata
1169 uses Texas Instrument's secure monitor api.
1171 config ARM_ERRATA_720789
1172 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1173 depends on CPU_V7 && SMP
1175 This option enables the workaround for the 720789 Cortex-A9 (prior to
1176 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1177 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1178 As a consequence of this erratum, some TLB entries which should be
1179 invalidated are not, resulting in an incoherency in the system page
1180 tables. The workaround changes the TLB flushing routines to invalidate
1181 entries regardless of the ASID.
1183 config ARM_ERRATA_743622
1184 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1187 This option enables the workaround for the 743622 Cortex-A9
1188 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1189 optimisation in the Cortex-A9 Store Buffer may lead to data
1190 corruption. This workaround sets a specific bit in the diagnostic
1191 register of the Cortex-A9 which disables the Store Buffer
1192 optimisation, preventing the defect from occurring. This has no
1193 visible impact on the overall performance or power consumption of the
1198 source "arch/arm/common/Kconfig"
1208 Find out whether you have ISA slots on your motherboard. ISA is the
1209 name of a bus system, i.e. the way the CPU talks to the other stuff
1210 inside your box. Other bus systems are PCI, EISA, MicroChannel
1211 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1212 newer boards don't support it. If you have ISA, say Y, otherwise N.
1214 # Select ISA DMA controller support
1219 # Select ISA DMA interface
1224 bool "PCI support" if MIGHT_HAVE_PCI
1226 Find out whether you have a PCI motherboard. PCI is the name of a
1227 bus system, i.e. the way the CPU talks to the other stuff inside
1228 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1229 VESA. If you have PCI, say Y, otherwise N.
1235 config PCI_NANOENGINE
1236 bool "BSE nanoEngine PCI support"
1237 depends on SA1100_NANOENGINE
1239 Enable PCI on the BSE nanoEngine board.
1244 # Select the host bridge type
1245 config PCI_HOST_VIA82C505
1247 depends on PCI && ARCH_SHARK
1250 config PCI_HOST_ITE8152
1252 depends on PCI && MACH_ARMCORE
1256 source "drivers/pci/Kconfig"
1258 source "drivers/pcmcia/Kconfig"
1262 menu "Kernel Features"
1264 source "kernel/time/Kconfig"
1267 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1268 depends on EXPERIMENTAL
1269 depends on GENERIC_CLOCKEVENTS
1270 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1271 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1272 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1273 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1274 select USE_GENERIC_SMP_HELPERS
1275 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1277 This enables support for systems with more than one CPU. If you have
1278 a system with only one CPU, like most personal computers, say N. If
1279 you have a system with more than one CPU, say Y.
1281 If you say N here, the kernel will run on single and multiprocessor
1282 machines, but will use only one CPU of a multiprocessor machine. If
1283 you say Y here, the kernel will run on many, but not all, single
1284 processor machines. On a single processor machine, the kernel will
1285 run faster if you say N here.
1287 See also <file:Documentation/i386/IO-APIC.txt>,
1288 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1289 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1291 If you don't know what to do here, say N.
1294 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1295 depends on EXPERIMENTAL
1296 depends on SMP && !XIP_KERNEL
1299 SMP kernels contain instructions which fail on non-SMP processors.
1300 Enabling this option allows the kernel to modify itself to make
1301 these instructions safe. Disabling it allows about 1K of space
1304 If you don't know what to do here, say Y.
1310 This option enables support for the ARM system coherency unit
1317 This options enables support for the ARM timer and watchdog unit
1320 prompt "Memory split"
1323 Select the desired split between kernel and user memory.
1325 If you are not absolutely sure what you are doing, leave this
1329 bool "3G/1G user/kernel split"
1331 bool "2G/2G user/kernel split"
1333 bool "1G/3G user/kernel split"
1338 default 0x40000000 if VMSPLIT_1G
1339 default 0x80000000 if VMSPLIT_2G
1343 int "Maximum number of CPUs (2-32)"
1349 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1350 depends on SMP && HOTPLUG && EXPERIMENTAL
1351 depends on !ARCH_MSM
1353 Say Y here to experiment with turning CPUs off and on. CPUs
1354 can be controlled through /sys/devices/system/cpu.
1357 bool "Use local timer interrupts"
1360 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1362 Enable support for local timers on SMP platforms, rather then the
1363 legacy IPI broadcast method. Local timers allows the system
1364 accounting to be spread across the timer interval, preventing a
1365 "thundering herd" at every timer tick.
1367 source kernel/Kconfig.preempt
1371 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1372 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1373 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1374 default AT91_TIMER_HZ if ARCH_AT91
1375 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1378 config THUMB2_KERNEL
1379 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1380 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1382 select ARM_ASM_UNIFIED
1384 By enabling this option, the kernel will be compiled in
1385 Thumb-2 mode. A compiler/assembler that understand the unified
1386 ARM-Thumb syntax is needed.
1390 config ARM_ASM_UNIFIED
1394 bool "Use the ARM EABI to compile the kernel"
1396 This option allows for the kernel to be compiled using the latest
1397 ARM ABI (aka EABI). This is only useful if you are using a user
1398 space environment that is also compiled with EABI.
1400 Since there are major incompatibilities between the legacy ABI and
1401 EABI, especially with regard to structure member alignment, this
1402 option also changes the kernel syscall calling convention to
1403 disambiguate both ABIs and allow for backward compatibility support
1404 (selected with CONFIG_OABI_COMPAT).
1406 To use this you need GCC version 4.0.0 or later.
1409 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1410 depends on AEABI && EXPERIMENTAL
1413 This option preserves the old syscall interface along with the
1414 new (ARM EABI) one. It also provides a compatibility layer to
1415 intercept syscalls that have structure arguments which layout
1416 in memory differs between the legacy ABI and the new ARM EABI
1417 (only for non "thumb" binaries). This option adds a tiny
1418 overhead to all syscalls and produces a slightly larger kernel.
1419 If you know you'll be using only pure EABI user space then you
1420 can say N here. If this option is not selected and you attempt
1421 to execute a legacy ABI binary then the result will be
1422 UNPREDICTABLE (in fact it can be predicted that it won't work
1423 at all). If in doubt say Y.
1425 config ARCH_HAS_HOLES_MEMORYMODEL
1428 config ARCH_SPARSEMEM_ENABLE
1431 config ARCH_SPARSEMEM_DEFAULT
1432 def_bool ARCH_SPARSEMEM_ENABLE
1434 config ARCH_SELECT_MEMORY_MODEL
1435 def_bool ARCH_SPARSEMEM_ENABLE
1438 bool "High Memory Support (EXPERIMENTAL)"
1439 depends on MMU && EXPERIMENTAL
1441 The address space of ARM processors is only 4 Gigabytes large
1442 and it has to accommodate user address space, kernel address
1443 space as well as some memory mapped IO. That means that, if you
1444 have a large amount of physical memory and/or IO, not all of the
1445 memory can be "permanently mapped" by the kernel. The physical
1446 memory that is not permanently mapped is called "high memory".
1448 Depending on the selected kernel/user memory split, minimum
1449 vmalloc space and actual amount of RAM, you may not need this
1450 option which should result in a slightly faster kernel.
1455 bool "Allocate 2nd-level pagetables from highmem"
1457 depends on !OUTER_CACHE
1459 config HW_PERF_EVENTS
1460 bool "Enable hardware performance counter support for perf events"
1461 depends on PERF_EVENTS && CPU_HAS_PMU
1464 Enable hardware performance counter support for perf events. If
1465 disabled, perf events will use software events only.
1469 config FORCE_MAX_ZONEORDER
1470 int "Maximum zone order" if ARCH_SHMOBILE
1471 range 11 64 if ARCH_SHMOBILE
1472 default "9" if SA1111
1475 The kernel memory allocator divides physically contiguous memory
1476 blocks into "zones", where each zone is a power of two number of
1477 pages. This option selects the largest power of two that the kernel
1478 keeps in the memory allocator. If you need to allocate very large
1479 blocks of physically contiguous memory, then you may need to
1480 increase this value.
1482 This config option is actually maximum order plus one. For example,
1483 a value of 11 means that the largest free memory block is 2^10 pages.
1486 bool "Timer and CPU usage LEDs"
1487 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1488 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1489 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1490 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1491 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1492 ARCH_AT91 || ARCH_DAVINCI || \
1493 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1495 If you say Y here, the LEDs on your machine will be used
1496 to provide useful information about your current system status.
1498 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1499 be able to select which LEDs are active using the options below. If
1500 you are compiling a kernel for the EBSA-110 or the LART however, the
1501 red LED will simply flash regularly to indicate that the system is
1502 still functional. It is safe to say Y here if you have a CATS
1503 system, but the driver will do nothing.
1506 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1507 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1508 || MACH_OMAP_PERSEUS2
1510 depends on !GENERIC_CLOCKEVENTS
1511 default y if ARCH_EBSA110
1513 If you say Y here, one of the system LEDs (the green one on the
1514 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1515 will flash regularly to indicate that the system is still
1516 operational. This is mainly useful to kernel hackers who are
1517 debugging unstable kernels.
1519 The LART uses the same LED for both Timer LED and CPU usage LED
1520 functions. You may choose to use both, but the Timer LED function
1521 will overrule the CPU usage LED.
1524 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1526 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1527 || MACH_OMAP_PERSEUS2
1530 If you say Y here, the red LED will be used to give a good real
1531 time indication of CPU usage, by lighting whenever the idle task
1532 is not currently executing.
1534 The LART uses the same LED for both Timer LED and CPU usage LED
1535 functions. You may choose to use both, but the Timer LED function
1536 will overrule the CPU usage LED.
1538 config ALIGNMENT_TRAP
1540 depends on CPU_CP15_MMU
1541 default y if !ARCH_EBSA110
1542 select HAVE_PROC_CPU if PROC_FS
1544 ARM processors cannot fetch/store information which is not
1545 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1546 address divisible by 4. On 32-bit ARM processors, these non-aligned
1547 fetch/store instructions will be emulated in software if you say
1548 here, which has a severe performance impact. This is necessary for
1549 correct operation of some network protocols. With an IP-only
1550 configuration it is safe to say N, otherwise say Y.
1552 config UACCESS_WITH_MEMCPY
1553 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1554 depends on MMU && EXPERIMENTAL
1555 default y if CPU_FEROCEON
1557 Implement faster copy_to_user and clear_user methods for CPU
1558 cores where a 8-word STM instruction give significantly higher
1559 memory write throughput than a sequence of individual 32bit stores.
1561 A possible side effect is a slight increase in scheduling latency
1562 between threads sharing the same address space if they invoke
1563 such copy operations with large buffers.
1565 However, if the CPU data cache is using a write-allocate mode,
1566 this option is unlikely to provide any performance gain.
1570 prompt "Enable seccomp to safely compute untrusted bytecode"
1572 This kernel feature is useful for number crunching applications
1573 that may need to compute untrusted bytecode during their
1574 execution. By using pipes or other transports made available to
1575 the process as file descriptors supporting the read/write
1576 syscalls, it's possible to isolate those applications in
1577 their own address space using seccomp. Once seccomp is
1578 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1579 and the task is only allowed to execute a few safe syscalls
1580 defined by each seccomp mode.
1582 config CC_STACKPROTECTOR
1583 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1584 depends on EXPERIMENTAL
1586 This option turns on the -fstack-protector GCC feature. This
1587 feature puts, at the beginning of functions, a canary value on
1588 the stack just before the return address, and validates
1589 the value just before actually returning. Stack based buffer
1590 overflows (that need to overwrite this return address) now also
1591 overwrite the canary, which gets detected and the attack is then
1592 neutralized via a kernel panic.
1593 This feature requires gcc version 4.2 or above.
1595 config DEPRECATED_PARAM_STRUCT
1596 bool "Provide old way to pass kernel parameters"
1598 This was deprecated in 2001 and announced to live on for 5 years.
1599 Some old boot loaders still use this way.
1605 # Compressed boot loader in ROM. Yes, we really want to ask about
1606 # TEXT and BSS so we preserve their values in the config files.
1607 config ZBOOT_ROM_TEXT
1608 hex "Compressed ROM boot loader base address"
1611 The physical address at which the ROM-able zImage is to be
1612 placed in the target. Platforms which normally make use of
1613 ROM-able zImage formats normally set this to a suitable
1614 value in their defconfig file.
1616 If ZBOOT_ROM is not enabled, this has no effect.
1618 config ZBOOT_ROM_BSS
1619 hex "Compressed ROM boot loader BSS address"
1622 The base address of an area of read/write memory in the target
1623 for the ROM-able zImage which must be available while the
1624 decompressor is running. It must be large enough to hold the
1625 entire decompressed kernel plus an additional 128 KiB.
1626 Platforms which normally make use of ROM-able zImage formats
1627 normally set this to a suitable value in their defconfig file.
1629 If ZBOOT_ROM is not enabled, this has no effect.
1632 bool "Compressed boot loader in ROM/flash"
1633 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1635 Say Y here if you intend to execute your compressed kernel image
1636 (zImage) directly from ROM or flash. If unsure, say N.
1639 string "Default kernel command string"
1642 On some architectures (EBSA110 and CATS), there is currently no way
1643 for the boot loader to pass arguments to the kernel. For these
1644 architectures, you should supply some command-line options at build
1645 time by entering them here. As a minimum, you should specify the
1646 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1648 config CMDLINE_FORCE
1649 bool "Always use the default kernel command string"
1650 depends on CMDLINE != ""
1652 Always use the default kernel command string, even if the boot
1653 loader passes other arguments to the kernel.
1654 This is useful if you cannot or don't want to change the
1655 command-line options your boot loader passes to the kernel.
1660 bool "Kernel Execute-In-Place from ROM"
1661 depends on !ZBOOT_ROM
1663 Execute-In-Place allows the kernel to run from non-volatile storage
1664 directly addressable by the CPU, such as NOR flash. This saves RAM
1665 space since the text section of the kernel is not loaded from flash
1666 to RAM. Read-write sections, such as the data section and stack,
1667 are still copied to RAM. The XIP kernel is not compressed since
1668 it has to run directly from flash, so it will take more space to
1669 store it. The flash address used to link the kernel object files,
1670 and for storing it, is configuration dependent. Therefore, if you
1671 say Y here, you must know the proper physical address where to
1672 store the kernel image depending on your own flash memory usage.
1674 Also note that the make target becomes "make xipImage" rather than
1675 "make zImage" or "make Image". The final kernel binary to put in
1676 ROM memory will be arch/arm/boot/xipImage.
1680 config XIP_PHYS_ADDR
1681 hex "XIP Kernel Physical Location"
1682 depends on XIP_KERNEL
1683 default "0x00080000"
1685 This is the physical address in your flash memory the kernel will
1686 be linked for and stored to. This address is dependent on your
1690 bool "Kexec system call (EXPERIMENTAL)"
1691 depends on EXPERIMENTAL
1693 kexec is a system call that implements the ability to shutdown your
1694 current kernel, and to start another kernel. It is like a reboot
1695 but it is independent of the system firmware. And like a reboot
1696 you can start any kernel with it, not just Linux.
1698 It is an ongoing process to be certain the hardware in a machine
1699 is properly shutdown, so do not be surprised if this code does not
1700 initially work for you. It may help to enable device hotplugging
1704 bool "Export atags in procfs"
1708 Should the atags used to boot the kernel be exported in an "atags"
1709 file in procfs. Useful with kexec.
1712 bool "Build kdump crash kernel (EXPERIMENTAL)"
1713 depends on EXPERIMENTAL
1715 Generate crash dump after being started by kexec. This should
1716 be normally only set in special crash dump kernels which are
1717 loaded in the main kernel with kexec-tools into a specially
1718 reserved region and then later executed after a crash by
1719 kdump/kexec. The crash dump kernel must be compiled to a
1720 memory address not used by the main kernel
1722 For more details see Documentation/kdump/kdump.txt
1724 config AUTO_ZRELADDR
1725 bool "Auto calculation of the decompressed kernel image address"
1726 depends on !ZBOOT_ROM && !ARCH_U300
1728 ZRELADDR is the physical address where the decompressed kernel
1729 image will be placed. If AUTO_ZRELADDR is selected, the address
1730 will be determined at run-time by masking the current IP with
1731 0xf8000000. This assumes the zImage being placed in the first 128MB
1732 from start of memory.
1736 menu "CPU Power Management"
1740 source "drivers/cpufreq/Kconfig"
1743 tristate "CPUfreq driver for i.MX CPUs"
1744 depends on ARCH_MXC && CPU_FREQ
1746 This enables the CPUfreq driver for i.MX CPUs.
1748 config CPU_FREQ_SA1100
1751 config CPU_FREQ_SA1110
1754 config CPU_FREQ_INTEGRATOR
1755 tristate "CPUfreq driver for ARM Integrator CPUs"
1756 depends on ARCH_INTEGRATOR && CPU_FREQ
1759 This enables the CPUfreq driver for ARM Integrator CPUs.
1761 For details, take a look at <file:Documentation/cpu-freq>.
1767 depends on CPU_FREQ && ARCH_PXA && PXA25x
1769 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1771 config CPU_FREQ_S3C64XX
1772 bool "CPUfreq support for Samsung S3C64XX CPUs"
1773 depends on CPU_FREQ && CPU_S3C6410
1778 Internal configuration node for common cpufreq on Samsung SoC
1780 config CPU_FREQ_S3C24XX
1781 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1782 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1785 This enables the CPUfreq driver for the Samsung S3C24XX family
1788 For details, take a look at <file:Documentation/cpu-freq>.
1792 config CPU_FREQ_S3C24XX_PLL
1793 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1794 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1796 Compile in support for changing the PLL frequency from the
1797 S3C24XX series CPUfreq driver. The PLL takes time to settle
1798 after a frequency change, so by default it is not enabled.
1800 This also means that the PLL tables for the selected CPU(s) will
1801 be built which may increase the size of the kernel image.
1803 config CPU_FREQ_S3C24XX_DEBUG
1804 bool "Debug CPUfreq Samsung driver core"
1805 depends on CPU_FREQ_S3C24XX
1807 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1809 config CPU_FREQ_S3C24XX_IODEBUG
1810 bool "Debug CPUfreq Samsung driver IO timing"
1811 depends on CPU_FREQ_S3C24XX
1813 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1815 config CPU_FREQ_S3C24XX_DEBUGFS
1816 bool "Export debugfs for CPUFreq"
1817 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1819 Export status information via debugfs.
1823 source "drivers/cpuidle/Kconfig"
1827 menu "Floating point emulation"
1829 comment "At least one emulation must be selected"
1832 bool "NWFPE math emulation"
1833 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1835 Say Y to include the NWFPE floating point emulator in the kernel.
1836 This is necessary to run most binaries. Linux does not currently
1837 support floating point hardware so you need to say Y here even if
1838 your machine has an FPA or floating point co-processor podule.
1840 You may say N here if you are going to load the Acorn FPEmulator
1841 early in the bootup.
1844 bool "Support extended precision"
1845 depends on FPE_NWFPE
1847 Say Y to include 80-bit support in the kernel floating-point
1848 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1849 Note that gcc does not generate 80-bit operations by default,
1850 so in most cases this option only enlarges the size of the
1851 floating point emulator without any good reason.
1853 You almost surely want to say N here.
1856 bool "FastFPE math emulation (EXPERIMENTAL)"
1857 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1859 Say Y here to include the FAST floating point emulator in the kernel.
1860 This is an experimental much faster emulator which now also has full
1861 precision for the mantissa. It does not support any exceptions.
1862 It is very simple, and approximately 3-6 times faster than NWFPE.
1864 It should be sufficient for most programs. It may be not suitable
1865 for scientific calculations, but you have to check this for yourself.
1866 If you do not feel you need a faster FP emulation you should better
1870 bool "VFP-format floating point maths"
1871 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1873 Say Y to include VFP support code in the kernel. This is needed
1874 if your hardware includes a VFP unit.
1876 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1877 release notes and additional status information.
1879 Say N if your target does not have VFP hardware.
1887 bool "Advanced SIMD (NEON) Extension support"
1888 depends on VFPv3 && CPU_V7
1890 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1895 menu "Userspace binary formats"
1897 source "fs/Kconfig.binfmt"
1900 tristate "RISC OS personality"
1903 Say Y here to include the kernel code necessary if you want to run
1904 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1905 experimental; if this sounds frightening, say N and sleep in peace.
1906 You can also say M here to compile this support as a module (which
1907 will be called arthur).
1911 menu "Power management options"
1913 source "kernel/power/Kconfig"
1915 config ARCH_SUSPEND_POSSIBLE
1920 source "net/Kconfig"
1922 source "drivers/Kconfig"
1926 source "arch/arm/Kconfig.debug"
1928 source "security/Kconfig"
1930 source "crypto/Kconfig"
1932 source "lib/Kconfig"