5 select HAVE_DMA_API_DEBUG
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
43 config SYS_SUPPORTS_APM_EMULATION
46 config HAVE_SCHED_CLOCK
52 config ARCH_USES_GETTIMEOFFSET
56 config GENERIC_CLOCKEVENTS
59 config GENERIC_CLOCKEVENTS_BROADCAST
61 depends on GENERIC_CLOCKEVENTS
66 select GENERIC_ALLOCATOR
77 The Extended Industry Standard Architecture (EISA) bus was
78 developed as an open alternative to the IBM MicroChannel bus.
80 The EISA bus provided some of the features of the IBM MicroChannel
81 bus while maintaining backward compatibility with cards made for
82 the older ISA bus. The EISA bus saw limited use between 1988 and
83 1995 when it was made obsolete by the PCI bus.
85 Say Y here if you are building a kernel for an EISA-based machine.
95 MicroChannel Architecture is found in some IBM PS/2 machines and
96 laptops. It is a bus system similar to PCI or ISA. See
97 <file:Documentation/mca.txt> (and especially the web page given
98 there) before attempting to build an MCA bus kernel.
100 config GENERIC_HARDIRQS
104 config STACKTRACE_SUPPORT
108 config HAVE_LATENCYTOP_SUPPORT
113 config LOCKDEP_SUPPORT
117 config TRACE_IRQFLAGS_SUPPORT
121 config HARDIRQS_SW_RESEND
125 config GENERIC_IRQ_PROBE
129 config GENERIC_LOCKBREAK
132 depends on SMP && PREEMPT
134 config RWSEM_GENERIC_SPINLOCK
138 config RWSEM_XCHGADD_ALGORITHM
141 config ARCH_HAS_ILOG2_U32
144 config ARCH_HAS_ILOG2_U64
147 config ARCH_HAS_CPUFREQ
150 Internal node to signify that the ARCH has CPUFREQ support
151 and that the relevant menu configurations are displayed for
154 config ARCH_HAS_CPU_IDLE_WAIT
157 config GENERIC_HWEIGHT
161 config GENERIC_CALIBRATE_DELAY
165 config ARCH_MAY_HAVE_PC_FDC
171 config NEED_DMA_MAP_STATE
174 config GENERIC_ISA_DMA
183 config GENERIC_HARDIRQS_NO__DO_IRQ
186 config ARM_L1_CACHE_SHIFT_6
189 Setting ARM L1 cache line size to 64 Bytes.
193 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
194 default DRAM_BASE if REMAP_VECTORS_TO_RAM
197 The base address of exception vectors.
199 source "init/Kconfig"
201 source "kernel/Kconfig.freezer"
206 bool "MMU-based Paged Memory Management Support"
209 Select if you want MMU-based virtualised addressing space
210 support by paged memory management. If unsure, say 'Y'.
213 # The "ARM system type" choice list is ordered alphabetically by option
214 # text. Please add new entries in the option alphabetic order.
217 prompt "ARM system type"
218 default ARCH_VERSATILE
221 bool "Agilent AAEC-2000 based"
225 select ARCH_USES_GETTIMEOFFSET
227 This enables support for systems based on the Agilent AAEC-2000
229 config ARCH_INTEGRATOR
230 bool "ARM Ltd. Integrator family"
232 select ARCH_HAS_CPUFREQ
235 select GENERIC_CLOCKEVENTS
236 select PLAT_VERSATILE
238 Support for ARM's Integrator platform.
241 bool "ARM Ltd. RealView family"
244 select HAVE_SCHED_CLOCK
246 select GENERIC_CLOCKEVENTS
247 select ARCH_WANT_OPTIONAL_GPIOLIB
248 select PLAT_VERSATILE
249 select ARM_TIMER_SP804
250 select GPIO_PL061 if GPIOLIB
252 This enables support for ARM Ltd RealView boards.
254 config ARCH_VERSATILE
255 bool "ARM Ltd. Versatile family"
259 select HAVE_SCHED_CLOCK
261 select GENERIC_CLOCKEVENTS
262 select ARCH_WANT_OPTIONAL_GPIOLIB
263 select PLAT_VERSATILE
264 select ARM_TIMER_SP804
266 This enables support for ARM Ltd Versatile board.
269 bool "ARM Ltd. Versatile Express family"
270 select ARCH_WANT_OPTIONAL_GPIOLIB
272 select ARM_TIMER_SP804
274 select GENERIC_CLOCKEVENTS
276 select HAVE_SCHED_CLOCK
278 select PLAT_VERSATILE
280 This enables support for the ARM Ltd Versatile Express boards.
284 select ARCH_REQUIRE_GPIOLIB
287 This enables support for systems based on the Atmel AT91RM9200,
288 AT91SAM9 and AT91CAP9 processors.
291 bool "Broadcom BCMRING"
296 select GENERIC_CLOCKEVENTS
297 select ARCH_WANT_OPTIONAL_GPIOLIB
299 Support for Broadcom's BCMRing platform.
302 bool "Cirrus Logic CLPS711x/EP721x-based"
304 select ARCH_USES_GETTIMEOFFSET
306 Support for Cirrus Logic 711x/721x based boards.
309 bool "Cavium Networks CNS3XXX family"
311 select GENERIC_CLOCKEVENTS
313 select MIGHT_HAVE_PCI
314 select PCI_DOMAINS if PCI
316 Support for Cavium Networks CNS3XXX platform.
319 bool "Cortina Systems Gemini"
321 select ARCH_REQUIRE_GPIOLIB
322 select ARCH_USES_GETTIMEOFFSET
324 Support for the Cortina Systems Gemini family SoCs
331 select ARCH_USES_GETTIMEOFFSET
333 This is an evaluation board for the StrongARM processor available
334 from Digital. It has limited hardware on-board, including an
335 Ethernet interface, two PCMCIA sockets, two serial ports and a
344 select ARCH_REQUIRE_GPIOLIB
345 select ARCH_HAS_HOLES_MEMORYMODEL
346 select ARCH_USES_GETTIMEOFFSET
348 This enables support for the Cirrus EP93xx series of CPUs.
350 config ARCH_FOOTBRIDGE
354 select ARCH_USES_GETTIMEOFFSET
356 Support for systems based on the DC21285 companion chip
357 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
360 bool "Freescale MXC/iMX-based"
361 select GENERIC_CLOCKEVENTS
362 select ARCH_REQUIRE_GPIOLIB
365 Support for Freescale MXC/iMX-based family of processors
368 bool "Freescale MXS-based"
369 select GENERIC_CLOCKEVENTS
370 select ARCH_REQUIRE_GPIOLIB
373 Support for Freescale MXS-based family of processors
376 bool "Freescale STMP3xxx"
379 select ARCH_REQUIRE_GPIOLIB
380 select GENERIC_CLOCKEVENTS
381 select USB_ARCH_HAS_EHCI
383 Support for systems based on the Freescale 3xxx CPUs.
386 bool "Hilscher NetX based"
389 select GENERIC_CLOCKEVENTS
391 This enables support for systems based on the Hilscher NetX Soc
394 bool "Hynix HMS720x-based"
397 select ARCH_USES_GETTIMEOFFSET
399 This enables support for systems based on the Hynix HMS720x
407 select ARCH_SUPPORTS_MSI
410 Support for Intel's IOP13XX (XScale) family of processors.
418 select ARCH_REQUIRE_GPIOLIB
420 Support for Intel's 80219 and IOP32X (XScale) family of
429 select ARCH_REQUIRE_GPIOLIB
431 Support for Intel's IOP33X (XScale) family of processors.
438 select ARCH_USES_GETTIMEOFFSET
440 Support for Intel's IXP23xx (XScale) family of processors.
443 bool "IXP2400/2800-based"
447 select ARCH_USES_GETTIMEOFFSET
449 Support for Intel's IXP2400/2800 (XScale) family of processors.
456 select GENERIC_CLOCKEVENTS
457 select HAVE_SCHED_CLOCK
458 select MIGHT_HAVE_PCI
459 select DMABOUNCE if PCI
461 Support for Intel's IXP4XX (XScale) family of processors.
466 select ARCH_REQUIRE_GPIOLIB
467 select GENERIC_CLOCKEVENTS
470 Support for the Marvell Dove SoC 88AP510
473 bool "Marvell Kirkwood"
476 select ARCH_REQUIRE_GPIOLIB
477 select GENERIC_CLOCKEVENTS
480 Support for the following Marvell Kirkwood series SoCs:
481 88F6180, 88F6192 and 88F6281.
484 bool "Marvell Loki (88RC8480)"
486 select GENERIC_CLOCKEVENTS
489 Support for the Marvell Loki (88RC8480) SoC.
494 select ARCH_REQUIRE_GPIOLIB
497 select USB_ARCH_HAS_OHCI
500 select GENERIC_CLOCKEVENTS
502 Support for the NXP LPC32XX family of processors
505 bool "Marvell MV78xx0"
508 select ARCH_REQUIRE_GPIOLIB
509 select GENERIC_CLOCKEVENTS
512 Support for the following Marvell MV78xx0 series SoCs:
520 select ARCH_REQUIRE_GPIOLIB
521 select GENERIC_CLOCKEVENTS
524 Support for the following Marvell Orion 5x series SoCs:
525 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
526 Orion-2 (5281), Orion-1-90 (6183).
529 bool "Marvell PXA168/910/MMP2"
531 select ARCH_REQUIRE_GPIOLIB
533 select GENERIC_CLOCKEVENTS
534 select HAVE_SCHED_CLOCK
539 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
542 bool "Micrel/Kendin KS8695"
544 select ARCH_REQUIRE_GPIOLIB
545 select ARCH_USES_GETTIMEOFFSET
547 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
548 System-on-Chip devices.
551 bool "NetSilicon NS9xxx"
554 select GENERIC_CLOCKEVENTS
557 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
560 <http://www.digi.com/products/microprocessors/index.jsp>
563 bool "Nuvoton W90X900 CPU"
565 select ARCH_REQUIRE_GPIOLIB
567 select GENERIC_CLOCKEVENTS
569 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
570 At present, the w90x900 has been renamed nuc900, regarding
571 the ARM series product line, you can login the following
572 link address to know more.
574 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
575 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
578 bool "Nuvoton NUC93X CPU"
582 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
583 low-power and high performance MPEG-4/JPEG multimedia controller chip.
589 select GENERIC_CLOCKEVENTS
592 select HAVE_SCHED_CLOCK
593 select ARCH_HAS_BARRIERS if CACHE_L2X0
594 select ARCH_HAS_CPUFREQ
596 This enables support for NVIDIA Tegra based systems (Tegra APX,
597 Tegra 6xx and Tegra 2 series).
600 bool "Philips Nexperia PNX4008 Mobile"
603 select ARCH_USES_GETTIMEOFFSET
605 This enables support for Philips PNX4008 mobile platform.
608 bool "PXA2xx/PXA3xx-based"
611 select ARCH_HAS_CPUFREQ
613 select ARCH_REQUIRE_GPIOLIB
614 select GENERIC_CLOCKEVENTS
615 select HAVE_SCHED_CLOCK
620 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
625 select GENERIC_CLOCKEVENTS
626 select ARCH_REQUIRE_GPIOLIB
628 Support for Qualcomm MSM/QSD based systems. This runs on the
629 apps processor of the MSM/QSD and depends on a shared memory
630 interface to the modem processor which runs the baseband
631 stack and controls some vital subsystems
632 (clock and power control, etc).
635 bool "Renesas SH-Mobile / R-Mobile"
638 select GENERIC_CLOCKEVENTS
641 select MULTI_IRQ_HANDLER
643 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
650 select ARCH_MAY_HAVE_PC_FDC
651 select HAVE_PATA_PLATFORM
654 select ARCH_SPARSEMEM_ENABLE
655 select ARCH_USES_GETTIMEOFFSET
657 On the Acorn Risc-PC, Linux can support the internal IDE disk and
658 CD-ROM interface, serial and parallel port, and the floppy drive.
664 select ARCH_SPARSEMEM_ENABLE
666 select ARCH_HAS_CPUFREQ
668 select GENERIC_CLOCKEVENTS
670 select HAVE_SCHED_CLOCK
672 select ARCH_REQUIRE_GPIOLIB
674 Support for StrongARM 11x0 based boards.
677 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
679 select ARCH_HAS_CPUFREQ
681 select ARCH_USES_GETTIMEOFFSET
682 select HAVE_S3C2410_I2C if I2C
684 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
685 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
686 the Samsung SMDK2410 development board (and derivatives).
688 Note, the S3C2416 and the S3C2450 are so close that they even share
689 the same SoC ID code. This means that there is no seperate machine
690 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
693 bool "Samsung S3C64XX"
699 select ARCH_USES_GETTIMEOFFSET
700 select ARCH_HAS_CPUFREQ
701 select ARCH_REQUIRE_GPIOLIB
702 select SAMSUNG_CLKSRC
703 select SAMSUNG_IRQ_VIC_TIMER
704 select SAMSUNG_IRQ_UART
705 select S3C_GPIO_TRACK
706 select S3C_GPIO_PULL_UPDOWN
707 select S3C_GPIO_CFG_S3C24XX
708 select S3C_GPIO_CFG_S3C64XX
710 select USB_ARCH_HAS_OHCI
711 select SAMSUNG_GPIOLIB_4BIT
712 select HAVE_S3C2410_I2C if I2C
713 select HAVE_S3C2410_WATCHDOG if WATCHDOG
715 Samsung S3C64XX series based systems
718 bool "Samsung S5P6440 S5P6450"
722 select HAVE_S3C2410_WATCHDOG if WATCHDOG
723 select ARCH_USES_GETTIMEOFFSET
724 select HAVE_S3C2410_I2C if I2C
725 select HAVE_S3C_RTC if RTC_CLASS
727 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
731 bool "Samsung S5P6442"
735 select ARCH_USES_GETTIMEOFFSET
736 select HAVE_S3C2410_WATCHDOG if WATCHDOG
738 Samsung S5P6442 CPU based systems
741 bool "Samsung S5PC100"
745 select ARM_L1_CACHE_SHIFT_6
746 select ARCH_USES_GETTIMEOFFSET
747 select HAVE_S3C2410_I2C if I2C
748 select HAVE_S3C_RTC if RTC_CLASS
749 select HAVE_S3C2410_WATCHDOG if WATCHDOG
751 Samsung S5PC100 series based systems
754 bool "Samsung S5PV210/S5PC110"
756 select ARCH_SPARSEMEM_ENABLE
759 select ARM_L1_CACHE_SHIFT_6
760 select ARCH_HAS_CPUFREQ
761 select ARCH_USES_GETTIMEOFFSET
762 select HAVE_S3C2410_I2C if I2C
763 select HAVE_S3C_RTC if RTC_CLASS
764 select HAVE_S3C2410_WATCHDOG if WATCHDOG
766 Samsung S5PV210/S5PC110 series based systems
769 bool "Samsung S5PV310/S5PC210"
771 select ARCH_SPARSEMEM_ENABLE
774 select GENERIC_CLOCKEVENTS
775 select HAVE_S3C_RTC if RTC_CLASS
776 select HAVE_S3C2410_I2C if I2C
777 select HAVE_S3C2410_WATCHDOG if WATCHDOG
779 Samsung S5PV310 series based systems
788 select ARCH_USES_GETTIMEOFFSET
790 Support for the StrongARM based Digital DNARD machine, also known
791 as "Shark" (<http://www.shark-linux.de/shark.html>).
794 bool "Telechips TCC ARM926-based systems"
798 select GENERIC_CLOCKEVENTS
800 Support for Telechips TCC ARM926-based systems.
805 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
806 select ARCH_USES_GETTIMEOFFSET
808 Say Y here for systems based on one of the Sharp LH7A40X
809 System on a Chip processors. These CPUs include an ARM922T
810 core with a wide array of integrated devices for
811 hand-held and low-power applications.
814 bool "ST-Ericsson U300 Series"
817 select HAVE_SCHED_CLOCK
821 select GENERIC_CLOCKEVENTS
825 Support for ST-Ericsson U300 series mobile platforms.
828 bool "ST-Ericsson U8500 Series"
831 select GENERIC_CLOCKEVENTS
833 select ARCH_REQUIRE_GPIOLIB
834 select ARCH_HAS_CPUFREQ
836 Support for ST-Ericsson's Ux500 architecture
839 bool "STMicroelectronics Nomadik"
844 select GENERIC_CLOCKEVENTS
845 select ARCH_REQUIRE_GPIOLIB
847 Support for the Nomadik platform by ST-Ericsson
851 select GENERIC_CLOCKEVENTS
852 select ARCH_REQUIRE_GPIOLIB
856 select GENERIC_ALLOCATOR
857 select ARCH_HAS_HOLES_MEMORYMODEL
859 Support for TI's DaVinci platform.
864 select ARCH_REQUIRE_GPIOLIB
865 select ARCH_HAS_CPUFREQ
866 select GENERIC_CLOCKEVENTS
867 select HAVE_SCHED_CLOCK
868 select ARCH_HAS_HOLES_MEMORYMODEL
870 Support for TI's OMAP platform (OMAP1/2/3/4).
875 select ARCH_REQUIRE_GPIOLIB
877 select GENERIC_CLOCKEVENTS
880 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
885 # This is sorted alphabetically by mach-* pathname. However, plat-*
886 # Kconfigs may be included either alphabetically (according to the
887 # plat- suffix) or along side the corresponding mach-* source.
889 source "arch/arm/mach-aaec2000/Kconfig"
891 source "arch/arm/mach-at91/Kconfig"
893 source "arch/arm/mach-bcmring/Kconfig"
895 source "arch/arm/mach-clps711x/Kconfig"
897 source "arch/arm/mach-cns3xxx/Kconfig"
899 source "arch/arm/mach-davinci/Kconfig"
901 source "arch/arm/mach-dove/Kconfig"
903 source "arch/arm/mach-ep93xx/Kconfig"
905 source "arch/arm/mach-footbridge/Kconfig"
907 source "arch/arm/mach-gemini/Kconfig"
909 source "arch/arm/mach-h720x/Kconfig"
911 source "arch/arm/mach-integrator/Kconfig"
913 source "arch/arm/mach-iop32x/Kconfig"
915 source "arch/arm/mach-iop33x/Kconfig"
917 source "arch/arm/mach-iop13xx/Kconfig"
919 source "arch/arm/mach-ixp4xx/Kconfig"
921 source "arch/arm/mach-ixp2000/Kconfig"
923 source "arch/arm/mach-ixp23xx/Kconfig"
925 source "arch/arm/mach-kirkwood/Kconfig"
927 source "arch/arm/mach-ks8695/Kconfig"
929 source "arch/arm/mach-lh7a40x/Kconfig"
931 source "arch/arm/mach-loki/Kconfig"
933 source "arch/arm/mach-lpc32xx/Kconfig"
935 source "arch/arm/mach-msm/Kconfig"
937 source "arch/arm/mach-mv78xx0/Kconfig"
939 source "arch/arm/plat-mxc/Kconfig"
941 source "arch/arm/mach-mxs/Kconfig"
943 source "arch/arm/mach-netx/Kconfig"
945 source "arch/arm/mach-nomadik/Kconfig"
946 source "arch/arm/plat-nomadik/Kconfig"
948 source "arch/arm/mach-ns9xxx/Kconfig"
950 source "arch/arm/mach-nuc93x/Kconfig"
952 source "arch/arm/plat-omap/Kconfig"
954 source "arch/arm/mach-omap1/Kconfig"
956 source "arch/arm/mach-omap2/Kconfig"
958 source "arch/arm/mach-orion5x/Kconfig"
960 source "arch/arm/mach-pxa/Kconfig"
961 source "arch/arm/plat-pxa/Kconfig"
963 source "arch/arm/mach-mmp/Kconfig"
965 source "arch/arm/mach-realview/Kconfig"
967 source "arch/arm/mach-sa1100/Kconfig"
969 source "arch/arm/plat-samsung/Kconfig"
970 source "arch/arm/plat-s3c24xx/Kconfig"
971 source "arch/arm/plat-s5p/Kconfig"
973 source "arch/arm/plat-spear/Kconfig"
975 source "arch/arm/plat-tcc/Kconfig"
978 source "arch/arm/mach-s3c2400/Kconfig"
979 source "arch/arm/mach-s3c2410/Kconfig"
980 source "arch/arm/mach-s3c2412/Kconfig"
981 source "arch/arm/mach-s3c2416/Kconfig"
982 source "arch/arm/mach-s3c2440/Kconfig"
983 source "arch/arm/mach-s3c2443/Kconfig"
987 source "arch/arm/mach-s3c64xx/Kconfig"
990 source "arch/arm/mach-s5p64x0/Kconfig"
992 source "arch/arm/mach-s5p6442/Kconfig"
994 source "arch/arm/mach-s5pc100/Kconfig"
996 source "arch/arm/mach-s5pv210/Kconfig"
998 source "arch/arm/mach-s5pv310/Kconfig"
1000 source "arch/arm/mach-shmobile/Kconfig"
1002 source "arch/arm/plat-stmp3xxx/Kconfig"
1004 source "arch/arm/mach-tegra/Kconfig"
1006 source "arch/arm/mach-u300/Kconfig"
1008 source "arch/arm/mach-ux500/Kconfig"
1010 source "arch/arm/mach-versatile/Kconfig"
1012 source "arch/arm/mach-vexpress/Kconfig"
1014 source "arch/arm/mach-w90x900/Kconfig"
1016 # Definitions to make life easier
1022 select GENERIC_CLOCKEVENTS
1023 select HAVE_SCHED_CLOCK
1027 select HAVE_SCHED_CLOCK
1032 config PLAT_VERSATILE
1035 config ARM_TIMER_SP804
1038 source arch/arm/mm/Kconfig
1041 bool "Enable iWMMXt support"
1042 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1043 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1045 Enable support for iWMMXt context switching at run time if
1046 running on a CPU that supports it.
1048 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1051 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1055 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1056 (!ARCH_OMAP3 || OMAP3_EMU)
1060 config MULTI_IRQ_HANDLER
1063 Allow each machine to specify it's own IRQ handler at run time.
1066 source "arch/arm/Kconfig-nommu"
1069 config ARM_ERRATA_411920
1070 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1073 Invalidation of the Instruction Cache operation can
1074 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1075 It does not affect the MPCore. This option enables the ARM Ltd.
1076 recommended workaround.
1078 config ARM_ERRATA_430973
1079 bool "ARM errata: Stale prediction on replaced interworking branch"
1082 This option enables the workaround for the 430973 Cortex-A8
1083 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1084 interworking branch is replaced with another code sequence at the
1085 same virtual address, whether due to self-modifying code or virtual
1086 to physical address re-mapping, Cortex-A8 does not recover from the
1087 stale interworking branch prediction. This results in Cortex-A8
1088 executing the new code sequence in the incorrect ARM or Thumb state.
1089 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1090 and also flushes the branch target cache at every context switch.
1091 Note that setting specific bits in the ACTLR register may not be
1092 available in non-secure mode.
1094 config ARM_ERRATA_458693
1095 bool "ARM errata: Processor deadlock when a false hazard is created"
1098 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1099 erratum. For very specific sequences of memory operations, it is
1100 possible for a hazard condition intended for a cache line to instead
1101 be incorrectly associated with a different cache line. This false
1102 hazard might then cause a processor deadlock. The workaround enables
1103 the L1 caching of the NEON accesses and disables the PLD instruction
1104 in the ACTLR register. Note that setting specific bits in the ACTLR
1105 register may not be available in non-secure mode.
1107 config ARM_ERRATA_460075
1108 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1111 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1112 erratum. Any asynchronous access to the L2 cache may encounter a
1113 situation in which recent store transactions to the L2 cache are lost
1114 and overwritten with stale memory contents from external memory. The
1115 workaround disables the write-allocate mode for the L2 cache via the
1116 ACTLR register. Note that setting specific bits in the ACTLR register
1117 may not be available in non-secure mode.
1119 config ARM_ERRATA_742230
1120 bool "ARM errata: DMB operation may be faulty"
1121 depends on CPU_V7 && SMP
1123 This option enables the workaround for the 742230 Cortex-A9
1124 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1125 between two write operations may not ensure the correct visibility
1126 ordering of the two writes. This workaround sets a specific bit in
1127 the diagnostic register of the Cortex-A9 which causes the DMB
1128 instruction to behave as a DSB, ensuring the correct behaviour of
1131 config ARM_ERRATA_742231
1132 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1133 depends on CPU_V7 && SMP
1135 This option enables the workaround for the 742231 Cortex-A9
1136 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1137 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1138 accessing some data located in the same cache line, may get corrupted
1139 data due to bad handling of the address hazard when the line gets
1140 replaced from one of the CPUs at the same time as another CPU is
1141 accessing it. This workaround sets specific bits in the diagnostic
1142 register of the Cortex-A9 which reduces the linefill issuing
1143 capabilities of the processor.
1145 config PL310_ERRATA_588369
1146 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1147 depends on CACHE_L2X0 && ARCH_OMAP4
1149 The PL310 L2 cache controller implements three types of Clean &
1150 Invalidate maintenance operations: by Physical Address
1151 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1152 They are architecturally defined to behave as the execution of a
1153 clean operation followed immediately by an invalidate operation,
1154 both performing to the same memory location. This functionality
1155 is not correctly implemented in PL310 as clean lines are not
1156 invalidated as a result of these operations. Note that this errata
1157 uses Texas Instrument's secure monitor api.
1159 config ARM_ERRATA_720789
1160 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1161 depends on CPU_V7 && SMP
1163 This option enables the workaround for the 720789 Cortex-A9 (prior to
1164 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1165 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1166 As a consequence of this erratum, some TLB entries which should be
1167 invalidated are not, resulting in an incoherency in the system page
1168 tables. The workaround changes the TLB flushing routines to invalidate
1169 entries regardless of the ASID.
1171 config ARM_ERRATA_743622
1172 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1175 This option enables the workaround for the 743622 Cortex-A9
1176 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1177 optimisation in the Cortex-A9 Store Buffer may lead to data
1178 corruption. This workaround sets a specific bit in the diagnostic
1179 register of the Cortex-A9 which disables the Store Buffer
1180 optimisation, preventing the defect from occurring. This has no
1181 visible impact on the overall performance or power consumption of the
1186 source "arch/arm/common/Kconfig"
1196 Find out whether you have ISA slots on your motherboard. ISA is the
1197 name of a bus system, i.e. the way the CPU talks to the other stuff
1198 inside your box. Other bus systems are PCI, EISA, MicroChannel
1199 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1200 newer boards don't support it. If you have ISA, say Y, otherwise N.
1202 # Select ISA DMA controller support
1207 # Select ISA DMA interface
1212 bool "PCI support" if MIGHT_HAVE_PCI
1214 Find out whether you have a PCI motherboard. PCI is the name of a
1215 bus system, i.e. the way the CPU talks to the other stuff inside
1216 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1217 VESA. If you have PCI, say Y, otherwise N.
1223 config PCI_NANOENGINE
1224 bool "BSE nanoEngine PCI support"
1225 depends on SA1100_NANOENGINE
1227 Enable PCI on the BSE nanoEngine board.
1232 # Select the host bridge type
1233 config PCI_HOST_VIA82C505
1235 depends on PCI && ARCH_SHARK
1238 config PCI_HOST_ITE8152
1240 depends on PCI && MACH_ARMCORE
1244 source "drivers/pci/Kconfig"
1246 source "drivers/pcmcia/Kconfig"
1250 menu "Kernel Features"
1252 source "kernel/time/Kconfig"
1255 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1256 depends on EXPERIMENTAL
1257 depends on GENERIC_CLOCKEVENTS
1258 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1259 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1260 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1261 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1262 select USE_GENERIC_SMP_HELPERS
1263 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1265 This enables support for systems with more than one CPU. If you have
1266 a system with only one CPU, like most personal computers, say N. If
1267 you have a system with more than one CPU, say Y.
1269 If you say N here, the kernel will run on single and multiprocessor
1270 machines, but will use only one CPU of a multiprocessor machine. If
1271 you say Y here, the kernel will run on many, but not all, single
1272 processor machines. On a single processor machine, the kernel will
1273 run faster if you say N here.
1275 See also <file:Documentation/i386/IO-APIC.txt>,
1276 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1277 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1279 If you don't know what to do here, say N.
1282 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1283 depends on EXPERIMENTAL
1284 depends on SMP && !XIP
1287 SMP kernels contain instructions which fail on non-SMP processors.
1288 Enabling this option allows the kernel to modify itself to make
1289 these instructions safe. Disabling it allows about 1K of space
1292 If you don't know what to do here, say Y.
1298 This option enables support for the ARM system coherency unit
1305 This options enables support for the ARM timer and watchdog unit
1308 prompt "Memory split"
1311 Select the desired split between kernel and user memory.
1313 If you are not absolutely sure what you are doing, leave this
1317 bool "3G/1G user/kernel split"
1319 bool "2G/2G user/kernel split"
1321 bool "1G/3G user/kernel split"
1326 default 0x40000000 if VMSPLIT_1G
1327 default 0x80000000 if VMSPLIT_2G
1331 int "Maximum number of CPUs (2-32)"
1337 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1338 depends on SMP && HOTPLUG && EXPERIMENTAL
1339 depends on !ARCH_MSM
1341 Say Y here to experiment with turning CPUs off and on. CPUs
1342 can be controlled through /sys/devices/system/cpu.
1345 bool "Use local timer interrupts"
1348 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1350 Enable support for local timers on SMP platforms, rather then the
1351 legacy IPI broadcast method. Local timers allows the system
1352 accounting to be spread across the timer interval, preventing a
1353 "thundering herd" at every timer tick.
1355 source kernel/Kconfig.preempt
1359 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1360 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1361 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1362 default AT91_TIMER_HZ if ARCH_AT91
1363 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1366 config THUMB2_KERNEL
1367 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1368 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1370 select ARM_ASM_UNIFIED
1372 By enabling this option, the kernel will be compiled in
1373 Thumb-2 mode. A compiler/assembler that understand the unified
1374 ARM-Thumb syntax is needed.
1378 config ARM_ASM_UNIFIED
1382 bool "Use the ARM EABI to compile the kernel"
1384 This option allows for the kernel to be compiled using the latest
1385 ARM ABI (aka EABI). This is only useful if you are using a user
1386 space environment that is also compiled with EABI.
1388 Since there are major incompatibilities between the legacy ABI and
1389 EABI, especially with regard to structure member alignment, this
1390 option also changes the kernel syscall calling convention to
1391 disambiguate both ABIs and allow for backward compatibility support
1392 (selected with CONFIG_OABI_COMPAT).
1394 To use this you need GCC version 4.0.0 or later.
1397 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1398 depends on AEABI && EXPERIMENTAL
1401 This option preserves the old syscall interface along with the
1402 new (ARM EABI) one. It also provides a compatibility layer to
1403 intercept syscalls that have structure arguments which layout
1404 in memory differs between the legacy ABI and the new ARM EABI
1405 (only for non "thumb" binaries). This option adds a tiny
1406 overhead to all syscalls and produces a slightly larger kernel.
1407 If you know you'll be using only pure EABI user space then you
1408 can say N here. If this option is not selected and you attempt
1409 to execute a legacy ABI binary then the result will be
1410 UNPREDICTABLE (in fact it can be predicted that it won't work
1411 at all). If in doubt say Y.
1413 config ARCH_HAS_HOLES_MEMORYMODEL
1416 config ARCH_SPARSEMEM_ENABLE
1419 config ARCH_SPARSEMEM_DEFAULT
1420 def_bool ARCH_SPARSEMEM_ENABLE
1422 config ARCH_SELECT_MEMORY_MODEL
1423 def_bool ARCH_SPARSEMEM_ENABLE
1426 bool "High Memory Support (EXPERIMENTAL)"
1427 depends on MMU && EXPERIMENTAL
1429 The address space of ARM processors is only 4 Gigabytes large
1430 and it has to accommodate user address space, kernel address
1431 space as well as some memory mapped IO. That means that, if you
1432 have a large amount of physical memory and/or IO, not all of the
1433 memory can be "permanently mapped" by the kernel. The physical
1434 memory that is not permanently mapped is called "high memory".
1436 Depending on the selected kernel/user memory split, minimum
1437 vmalloc space and actual amount of RAM, you may not need this
1438 option which should result in a slightly faster kernel.
1443 bool "Allocate 2nd-level pagetables from highmem"
1445 depends on !OUTER_CACHE
1447 config HW_PERF_EVENTS
1448 bool "Enable hardware performance counter support for perf events"
1449 depends on PERF_EVENTS && CPU_HAS_PMU
1452 Enable hardware performance counter support for perf events. If
1453 disabled, perf events will use software events only.
1458 This enables support for sparse irqs. This is useful in general
1459 as most CPUs have a fairly sparse array of IRQ vectors, which
1460 the irq_desc then maps directly on to. Systems with a high
1461 number of off-chip IRQs will want to treat this as
1462 experimental until they have been independently verified.
1466 config FORCE_MAX_ZONEORDER
1467 int "Maximum zone order" if ARCH_SHMOBILE
1468 range 11 64 if ARCH_SHMOBILE
1469 default "9" if SA1111
1472 The kernel memory allocator divides physically contiguous memory
1473 blocks into "zones", where each zone is a power of two number of
1474 pages. This option selects the largest power of two that the kernel
1475 keeps in the memory allocator. If you need to allocate very large
1476 blocks of physically contiguous memory, then you may need to
1477 increase this value.
1479 This config option is actually maximum order plus one. For example,
1480 a value of 11 means that the largest free memory block is 2^10 pages.
1483 bool "Timer and CPU usage LEDs"
1484 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1485 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1486 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1487 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1488 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1489 ARCH_AT91 || ARCH_DAVINCI || \
1490 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1492 If you say Y here, the LEDs on your machine will be used
1493 to provide useful information about your current system status.
1495 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1496 be able to select which LEDs are active using the options below. If
1497 you are compiling a kernel for the EBSA-110 or the LART however, the
1498 red LED will simply flash regularly to indicate that the system is
1499 still functional. It is safe to say Y here if you have a CATS
1500 system, but the driver will do nothing.
1503 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1504 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1505 || MACH_OMAP_PERSEUS2
1507 depends on !GENERIC_CLOCKEVENTS
1508 default y if ARCH_EBSA110
1510 If you say Y here, one of the system LEDs (the green one on the
1511 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1512 will flash regularly to indicate that the system is still
1513 operational. This is mainly useful to kernel hackers who are
1514 debugging unstable kernels.
1516 The LART uses the same LED for both Timer LED and CPU usage LED
1517 functions. You may choose to use both, but the Timer LED function
1518 will overrule the CPU usage LED.
1521 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1523 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1524 || MACH_OMAP_PERSEUS2
1527 If you say Y here, the red LED will be used to give a good real
1528 time indication of CPU usage, by lighting whenever the idle task
1529 is not currently executing.
1531 The LART uses the same LED for both Timer LED and CPU usage LED
1532 functions. You may choose to use both, but the Timer LED function
1533 will overrule the CPU usage LED.
1535 config ALIGNMENT_TRAP
1537 depends on CPU_CP15_MMU
1538 default y if !ARCH_EBSA110
1539 select HAVE_PROC_CPU if PROC_FS
1541 ARM processors cannot fetch/store information which is not
1542 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1543 address divisible by 4. On 32-bit ARM processors, these non-aligned
1544 fetch/store instructions will be emulated in software if you say
1545 here, which has a severe performance impact. This is necessary for
1546 correct operation of some network protocols. With an IP-only
1547 configuration it is safe to say N, otherwise say Y.
1549 config UACCESS_WITH_MEMCPY
1550 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1551 depends on MMU && EXPERIMENTAL
1552 default y if CPU_FEROCEON
1554 Implement faster copy_to_user and clear_user methods for CPU
1555 cores where a 8-word STM instruction give significantly higher
1556 memory write throughput than a sequence of individual 32bit stores.
1558 A possible side effect is a slight increase in scheduling latency
1559 between threads sharing the same address space if they invoke
1560 such copy operations with large buffers.
1562 However, if the CPU data cache is using a write-allocate mode,
1563 this option is unlikely to provide any performance gain.
1567 prompt "Enable seccomp to safely compute untrusted bytecode"
1569 This kernel feature is useful for number crunching applications
1570 that may need to compute untrusted bytecode during their
1571 execution. By using pipes or other transports made available to
1572 the process as file descriptors supporting the read/write
1573 syscalls, it's possible to isolate those applications in
1574 their own address space using seccomp. Once seccomp is
1575 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1576 and the task is only allowed to execute a few safe syscalls
1577 defined by each seccomp mode.
1579 config CC_STACKPROTECTOR
1580 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1581 depends on EXPERIMENTAL
1583 This option turns on the -fstack-protector GCC feature. This
1584 feature puts, at the beginning of functions, a canary value on
1585 the stack just before the return address, and validates
1586 the value just before actually returning. Stack based buffer
1587 overflows (that need to overwrite this return address) now also
1588 overwrite the canary, which gets detected and the attack is then
1589 neutralized via a kernel panic.
1590 This feature requires gcc version 4.2 or above.
1592 config DEPRECATED_PARAM_STRUCT
1593 bool "Provide old way to pass kernel parameters"
1595 This was deprecated in 2001 and announced to live on for 5 years.
1596 Some old boot loaders still use this way.
1602 # Compressed boot loader in ROM. Yes, we really want to ask about
1603 # TEXT and BSS so we preserve their values in the config files.
1604 config ZBOOT_ROM_TEXT
1605 hex "Compressed ROM boot loader base address"
1608 The physical address at which the ROM-able zImage is to be
1609 placed in the target. Platforms which normally make use of
1610 ROM-able zImage formats normally set this to a suitable
1611 value in their defconfig file.
1613 If ZBOOT_ROM is not enabled, this has no effect.
1615 config ZBOOT_ROM_BSS
1616 hex "Compressed ROM boot loader BSS address"
1619 The base address of an area of read/write memory in the target
1620 for the ROM-able zImage which must be available while the
1621 decompressor is running. It must be large enough to hold the
1622 entire decompressed kernel plus an additional 128 KiB.
1623 Platforms which normally make use of ROM-able zImage formats
1624 normally set this to a suitable value in their defconfig file.
1626 If ZBOOT_ROM is not enabled, this has no effect.
1629 bool "Compressed boot loader in ROM/flash"
1630 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1632 Say Y here if you intend to execute your compressed kernel image
1633 (zImage) directly from ROM or flash. If unsure, say N.
1636 string "Default kernel command string"
1639 On some architectures (EBSA110 and CATS), there is currently no way
1640 for the boot loader to pass arguments to the kernel. For these
1641 architectures, you should supply some command-line options at build
1642 time by entering them here. As a minimum, you should specify the
1643 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1645 config CMDLINE_FORCE
1646 bool "Always use the default kernel command string"
1647 depends on CMDLINE != ""
1649 Always use the default kernel command string, even if the boot
1650 loader passes other arguments to the kernel.
1651 This is useful if you cannot or don't want to change the
1652 command-line options your boot loader passes to the kernel.
1657 bool "Kernel Execute-In-Place from ROM"
1658 depends on !ZBOOT_ROM
1660 Execute-In-Place allows the kernel to run from non-volatile storage
1661 directly addressable by the CPU, such as NOR flash. This saves RAM
1662 space since the text section of the kernel is not loaded from flash
1663 to RAM. Read-write sections, such as the data section and stack,
1664 are still copied to RAM. The XIP kernel is not compressed since
1665 it has to run directly from flash, so it will take more space to
1666 store it. The flash address used to link the kernel object files,
1667 and for storing it, is configuration dependent. Therefore, if you
1668 say Y here, you must know the proper physical address where to
1669 store the kernel image depending on your own flash memory usage.
1671 Also note that the make target becomes "make xipImage" rather than
1672 "make zImage" or "make Image". The final kernel binary to put in
1673 ROM memory will be arch/arm/boot/xipImage.
1677 config XIP_PHYS_ADDR
1678 hex "XIP Kernel Physical Location"
1679 depends on XIP_KERNEL
1680 default "0x00080000"
1682 This is the physical address in your flash memory the kernel will
1683 be linked for and stored to. This address is dependent on your
1687 bool "Kexec system call (EXPERIMENTAL)"
1688 depends on EXPERIMENTAL
1690 kexec is a system call that implements the ability to shutdown your
1691 current kernel, and to start another kernel. It is like a reboot
1692 but it is independent of the system firmware. And like a reboot
1693 you can start any kernel with it, not just Linux.
1695 It is an ongoing process to be certain the hardware in a machine
1696 is properly shutdown, so do not be surprised if this code does not
1697 initially work for you. It may help to enable device hotplugging
1701 bool "Export atags in procfs"
1705 Should the atags used to boot the kernel be exported in an "atags"
1706 file in procfs. Useful with kexec.
1709 bool "Build kdump crash kernel (EXPERIMENTAL)"
1710 depends on EXPERIMENTAL
1712 Generate crash dump after being started by kexec. This should
1713 be normally only set in special crash dump kernels which are
1714 loaded in the main kernel with kexec-tools into a specially
1715 reserved region and then later executed after a crash by
1716 kdump/kexec. The crash dump kernel must be compiled to a
1717 memory address not used by the main kernel
1719 For more details see Documentation/kdump/kdump.txt
1721 config AUTO_ZRELADDR
1722 bool "Auto calculation of the decompressed kernel image address"
1723 depends on !ZBOOT_ROM && !ARCH_U300
1725 ZRELADDR is the physical address where the decompressed kernel
1726 image will be placed. If AUTO_ZRELADDR is selected, the address
1727 will be determined at run-time by masking the current IP with
1728 0xf8000000. This assumes the zImage being placed in the first 128MB
1729 from start of memory.
1733 menu "CPU Power Management"
1737 source "drivers/cpufreq/Kconfig"
1740 tristate "CPUfreq driver for i.MX CPUs"
1741 depends on ARCH_MXC && CPU_FREQ
1743 This enables the CPUfreq driver for i.MX CPUs.
1745 config CPU_FREQ_SA1100
1748 config CPU_FREQ_SA1110
1751 config CPU_FREQ_INTEGRATOR
1752 tristate "CPUfreq driver for ARM Integrator CPUs"
1753 depends on ARCH_INTEGRATOR && CPU_FREQ
1756 This enables the CPUfreq driver for ARM Integrator CPUs.
1758 For details, take a look at <file:Documentation/cpu-freq>.
1764 depends on CPU_FREQ && ARCH_PXA && PXA25x
1766 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1768 config CPU_FREQ_S3C64XX
1769 bool "CPUfreq support for Samsung S3C64XX CPUs"
1770 depends on CPU_FREQ && CPU_S3C6410
1775 Internal configuration node for common cpufreq on Samsung SoC
1777 config CPU_FREQ_S3C24XX
1778 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1779 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1782 This enables the CPUfreq driver for the Samsung S3C24XX family
1785 For details, take a look at <file:Documentation/cpu-freq>.
1789 config CPU_FREQ_S3C24XX_PLL
1790 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1791 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1793 Compile in support for changing the PLL frequency from the
1794 S3C24XX series CPUfreq driver. The PLL takes time to settle
1795 after a frequency change, so by default it is not enabled.
1797 This also means that the PLL tables for the selected CPU(s) will
1798 be built which may increase the size of the kernel image.
1800 config CPU_FREQ_S3C24XX_DEBUG
1801 bool "Debug CPUfreq Samsung driver core"
1802 depends on CPU_FREQ_S3C24XX
1804 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1806 config CPU_FREQ_S3C24XX_IODEBUG
1807 bool "Debug CPUfreq Samsung driver IO timing"
1808 depends on CPU_FREQ_S3C24XX
1810 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1812 config CPU_FREQ_S3C24XX_DEBUGFS
1813 bool "Export debugfs for CPUFreq"
1814 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1816 Export status information via debugfs.
1820 source "drivers/cpuidle/Kconfig"
1824 menu "Floating point emulation"
1826 comment "At least one emulation must be selected"
1829 bool "NWFPE math emulation"
1830 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1832 Say Y to include the NWFPE floating point emulator in the kernel.
1833 This is necessary to run most binaries. Linux does not currently
1834 support floating point hardware so you need to say Y here even if
1835 your machine has an FPA or floating point co-processor podule.
1837 You may say N here if you are going to load the Acorn FPEmulator
1838 early in the bootup.
1841 bool "Support extended precision"
1842 depends on FPE_NWFPE
1844 Say Y to include 80-bit support in the kernel floating-point
1845 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1846 Note that gcc does not generate 80-bit operations by default,
1847 so in most cases this option only enlarges the size of the
1848 floating point emulator without any good reason.
1850 You almost surely want to say N here.
1853 bool "FastFPE math emulation (EXPERIMENTAL)"
1854 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1856 Say Y here to include the FAST floating point emulator in the kernel.
1857 This is an experimental much faster emulator which now also has full
1858 precision for the mantissa. It does not support any exceptions.
1859 It is very simple, and approximately 3-6 times faster than NWFPE.
1861 It should be sufficient for most programs. It may be not suitable
1862 for scientific calculations, but you have to check this for yourself.
1863 If you do not feel you need a faster FP emulation you should better
1867 bool "VFP-format floating point maths"
1868 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1870 Say Y to include VFP support code in the kernel. This is needed
1871 if your hardware includes a VFP unit.
1873 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1874 release notes and additional status information.
1876 Say N if your target does not have VFP hardware.
1884 bool "Advanced SIMD (NEON) Extension support"
1885 depends on VFPv3 && CPU_V7
1887 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1892 menu "Userspace binary formats"
1894 source "fs/Kconfig.binfmt"
1897 tristate "RISC OS personality"
1900 Say Y here to include the kernel code necessary if you want to run
1901 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1902 experimental; if this sounds frightening, say N and sleep in peace.
1903 You can also say M here to compile this support as a module (which
1904 will be called arthur).
1908 menu "Power management options"
1910 source "kernel/power/Kconfig"
1912 config ARCH_SUSPEND_POSSIBLE
1917 source "net/Kconfig"
1919 source "drivers/Kconfig"
1923 source "arch/arm/Kconfig.debug"
1925 source "security/Kconfig"
1927 source "crypto/Kconfig"
1929 source "lib/Kconfig"