2 * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
4 * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
13 #include "am33xx.dtsi"
16 model = "CompuLab CM-T335";
17 compatible = "compulab,cm-t335", "ti,am33xx";
20 device_type = "memory";
21 reg = <0x80000000 0x8000000>; /* 128 MB */
25 compatible = "gpio-leds";
26 pinctrl-names = "default";
27 pinctrl-0 = <&gpio_led_pins>;
29 label = "cm_t335:green";
30 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; /* gpio2_0 */
31 linux,default-trigger = "heartbeat";
35 /* regulator for mmc */
36 vmmc_fixed: fixedregulator@0 {
37 compatible = "regulator-fixed";
38 regulator-name = "vmmc_fixed";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
44 compatible = "pwm-backlight";
45 pwms = <&ecap0 0 50000 0>;
46 brightness-levels = <0 51 53 56 62 75 101 152 255>;
47 default-brightness-level = <8>;
52 pinctrl-names = "default";
55 i2c0_pins: pinmux_i2c0_pins {
56 pinctrl-single,pins = <
57 /* i2c0_sda.i2c0_sda */
58 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
59 /* i2c0_scl.i2c0_scl */
60 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
64 i2c1_pins: pinmux_i2c1_pins {
65 pinctrl-single,pins = <
66 /* uart0_ctsn.i2c1_sda */
67 AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE2)
68 /* uart0_rtsn.i2c1_scl */
69 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2)
73 gpio_led_pins: pinmux_gpio_led_pins {
74 pinctrl-single,pins = <
75 /* gpmc_csn3.gpio2_0 */
76 AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE7)
80 nandflash_pins: pinmux_nandflash_pins {
81 pinctrl-single,pins = <
82 /* gpmc_ad0.gpmc_ad0 */
83 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)
84 /* gpmc_ad1.gpmc_ad1 */
85 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)
86 /* gpmc_ad2.gpmc_ad2 */
87 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)
88 /* gpmc_ad3.gpmc_ad3 */
89 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)
90 /* gpmc_ad4.gpmc_ad4 */
91 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)
92 /* gpmc_ad5.gpmc_ad5 */
93 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)
94 /* gpmc_ad6.gpmc_ad6 */
95 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)
96 /* gpmc_ad7.gpmc_ad7 */
97 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)
98 /* gpmc_wait0.gpmc_wait0 */
99 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)
100 /* gpmc_wpn.gpio0_30 */
101 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)
102 /* gpmc_csn0.gpmc_csn0 */
103 AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
104 /* gpmc_advn_ale.gpmc_advn_ale */
105 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
106 /* gpmc_oen_ren.gpmc_oen_ren */
107 AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
108 /* gpmc_wen.gpmc_wen */
109 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
110 /* gpmc_ben0_cle.gpmc_ben0_cle */
111 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
115 uart0_pins: pinmux_uart0_pins {
116 pinctrl-single,pins = <
117 /* uart0_rxd.uart0_rxd */
118 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
119 /* uart0_txd.uart0_txd */
120 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
124 ecap0_pins: pinmux_ecap0_pins {
125 pinctrl-single,pins = <
126 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
127 AM33XX_IOPAD(0x964, 0x0)
131 cpsw_default: cpsw_default {
132 pinctrl-single,pins = <
134 /* mii1_tx_en.rgmii1_tctl */
135 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
136 /* mii1_rxdv.rgmii1_rctl */
137 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)
138 /* mii1_txd3.rgmii1_td3 */
139 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
140 /* mii1_txd2.rgmii1_td2 */
141 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
142 /* mii1_txd1.rgmii1_td1 */
143 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
144 /* mii1_txd0.rgmii1_td0 */
145 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
146 /* mii1_txclk.rgmii1_tclk */
147 AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
148 /* mii1_rxclk.rgmii1_rclk */
149 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)
150 /* mii1_rxd3.rgmii1_rd3 */
151 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)
152 /* mii1_rxd2.rgmii1_rd2 */
153 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)
154 /* mii1_rxd1.rgmii1_rd1 */
155 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)
156 /* mii1_rxd0.rgmii1_rd0 */
157 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)
161 cpsw_sleep: cpsw_sleep {
162 pinctrl-single,pins = <
163 /* Slave 1 reset value */
164 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
165 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
166 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
167 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
168 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
169 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
170 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
171 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
172 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
173 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
174 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
175 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
179 davinci_mdio_default: davinci_mdio_default {
180 pinctrl-single,pins = <
181 /* mdio_data.mdio_data */
182 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
183 /* mdio_clk.mdio_clk */
184 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
188 davinci_mdio_sleep: davinci_mdio_sleep {
189 pinctrl-single,pins = <
190 /* MDIO reset value */
191 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
192 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
196 mmc1_pins: pinmux_mmc1_pins {
197 pinctrl-single,pins = <
198 /* mmc0_dat3.mmc0_dat3 */
199 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
200 /* mmc0_dat2.mmc0_dat2 */
201 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
202 /* mmc0_dat1.mmc0_dat1 */
203 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
204 /* mmc0_dat0.mmc0_dat0 */
205 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
206 /* mmc0_clk.mmc0_clk */
207 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
208 /* mmc0_cmd.mmc0_cmd */
209 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
215 pinctrl-names = "default";
216 pinctrl-0 = <&uart0_pins>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&i2c0_pins>;
226 clock-frequency = <400000>;
227 /* CM-T335 board EEPROM */
229 compatible = "atmel,24c02";
233 /* Real Time Clock */
235 compatible = "emmicro,em3027";
263 ecap0: ecap@48300100 {
265 pinctrl-names = "default";
266 pinctrl-0 = <&ecap0_pins>;
272 pinctrl-names = "default";
273 pinctrl-0 = <&nandflash_pins>;
274 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
276 reg = <0 0 0>; /* CS0, offset 0 */
277 ti,nand-ecc-opt = "bch8";
279 nand-bus-width = <8>;
280 gpmc,device-width = <1>;
281 gpmc,sync-clk-ps = <0>;
283 gpmc,cs-rd-off-ns = <44>;
284 gpmc,cs-wr-off-ns = <44>;
285 gpmc,adv-on-ns = <6>;
286 gpmc,adv-rd-off-ns = <34>;
287 gpmc,adv-wr-off-ns = <44>;
289 gpmc,we-off-ns = <40>;
291 gpmc,oe-off-ns = <54>;
292 gpmc,access-ns = <64>;
293 gpmc,rd-cycle-ns = <82>;
294 gpmc,wr-cycle-ns = <82>;
295 gpmc,wait-on-read = "true";
296 gpmc,wait-on-write = "true";
297 gpmc,bus-turnaround-ns = <0>;
298 gpmc,cycle2cycle-delay-ns = <0>;
299 gpmc,clk-activation-ns = <0>;
300 gpmc,wait-monitoring-ns = <0>;
301 gpmc,wr-access-ns = <40>;
302 gpmc,wr-data-mux-bus-ns = <0>;
303 /* MTD partition table */
304 #address-cells = <1>;
308 reg = <0x00000000 0x00200000>;
312 reg = <0x00200000 0x00100000>;
315 label = "uboot environment";
316 reg = <0x00300000 0x00100000>;
320 reg = <0x00400000 0x00100000>;
324 reg = <0x00500000 0x00400000>;
328 reg = <0x00900000 0x00600000>;
332 reg = <0x00F00000 0>;
342 pinctrl-names = "default", "sleep";
343 pinctrl-0 = <&cpsw_default>;
344 pinctrl-1 = <&cpsw_sleep>;
350 pinctrl-names = "default", "sleep";
351 pinctrl-0 = <&davinci_mdio_default>;
352 pinctrl-1 = <&davinci_mdio_sleep>;
357 phy_id = <&davinci_mdio>, <0>;
358 phy-mode = "rgmii-txid";
363 vmmc-supply = <&vmmc_fixed>;
365 pinctrl-names = "default";
366 pinctrl-0 = <&mmc1_pins>;