2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include "am33xx.dtsi"
13 model = "TI AM335x EVM";
14 compatible = "ti,am335x-evm", "ti,am33xx";
18 cpu0-supply = <&vdd1_reg>;
23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */
27 vbat: fixedregulator@0 {
28 compatible = "regulator-fixed";
29 regulator-name = "vbat";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
35 lis3_reg: fixedregulator@1 {
36 compatible = "regulator-fixed";
37 regulator-name = "lis3_reg";
41 matrix_keypad: matrix_keypad@0 {
42 compatible = "gpio-matrix-keypad";
43 debounce-delay-ms = <5>;
44 col-scan-delay-us = <2>;
46 row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
47 &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
48 &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
50 col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
51 &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
53 linux,keymap = <0x0000008b /* MENU */
56 0x0001006a /* RIGHT */
57 0x0101001c /* ENTER */
58 0x0201006c>; /* DOWN */
61 gpio_keys: volume_keys@0 {
62 compatible = "gpio-keys";
70 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
75 label = "volume-down";
77 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
83 compatible = "pwm-backlight";
84 pwms = <&ecap0 0 50000 0>;
85 brightness-levels = <0 51 53 56 62 75 101 152 255>;
86 default-brightness-level = <8>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
94 matrix_keypad_s0: matrix_keypad_s0 {
95 pinctrl-single,pins = <
96 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
97 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
98 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
99 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
100 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
104 volume_keys_s0: volume_keys_s0 {
105 pinctrl-single,pins = <
106 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
107 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
111 i2c0_pins: pinmux_i2c0_pins {
112 pinctrl-single,pins = <
113 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
114 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
118 i2c1_pins: pinmux_i2c1_pins {
119 pinctrl-single,pins = <
120 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
121 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
125 uart0_pins: pinmux_uart0_pins {
126 pinctrl-single,pins = <
127 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
128 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
132 clkout2_pin: pinmux_clkout2_pin {
133 pinctrl-single,pins = <
134 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
138 nandflash_pins_s0: nandflash_pins_s0 {
139 pinctrl-single,pins = <
140 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
141 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
142 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
143 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
144 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
145 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
146 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
147 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
148 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
149 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
150 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
151 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
152 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
153 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
154 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
158 ecap0_pins: backlight_pins {
159 pinctrl-single,pins = <
160 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
164 cpsw_default: cpsw_default {
165 pinctrl-single,pins = <
167 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
168 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
169 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
170 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
171 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
172 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
173 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
174 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
175 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
176 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
177 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
178 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
182 cpsw_sleep: cpsw_sleep {
183 pinctrl-single,pins = <
184 /* Slave 1 reset value */
185 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
186 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
187 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
188 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
189 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
190 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
191 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
192 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
193 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
194 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
195 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
196 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
200 davinci_mdio_default: davinci_mdio_default {
201 pinctrl-single,pins = <
203 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
204 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
208 davinci_mdio_sleep: davinci_mdio_sleep {
209 pinctrl-single,pins = <
210 /* MDIO reset value */
211 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
212 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
218 pinctrl-names = "default";
219 pinctrl-0 = <&uart0_pins>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&i2c0_pins>;
229 clock-frequency = <400000>;
260 dma-controller@07402000 {
266 pinctrl-names = "default";
267 pinctrl-0 = <&i2c1_pins>;
270 clock-frequency = <100000>;
272 lis331dlh: lis331dlh@18 {
273 compatible = "st,lis331dlh", "st,lis3lv02d";
275 Vdd-supply = <&lis3_reg>;
276 Vdd_IO-supply = <&lis3_reg>;
281 st,click-thresh-x = <10>;
282 st,click-thresh-y = <10>;
283 st,click-thresh-z = <10>;
292 st,min-limit-x = <120>;
293 st,min-limit-y = <120>;
294 st,min-limit-z = <140>;
295 st,max-limit-x = <550>;
296 st,max-limit-y = <550>;
297 st,max-limit-z = <750>;
300 tsl2550: tsl2550@39 {
301 compatible = "taos,tsl2550";
306 compatible = "ti,tmp275";
318 ecap0: ecap@48300100 {
320 pinctrl-names = "default";
321 pinctrl-0 = <&ecap0_pins>;
327 pinctrl-names = "default";
328 pinctrl-0 = <&nandflash_pins_s0>;
329 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
331 reg = <0 0 0>; /* CS0, offset 0 */
332 nand-bus-width = <8>;
333 ti,nand-ecc-opt = "bch8";
334 gpmc,device-nand = "true";
335 gpmc,device-width = <1>;
336 gpmc,sync-clk-ps = <0>;
338 gpmc,cs-rd-off-ns = <44>;
339 gpmc,cs-wr-off-ns = <44>;
340 gpmc,adv-on-ns = <6>;
341 gpmc,adv-rd-off-ns = <34>;
342 gpmc,adv-wr-off-ns = <44>;
344 gpmc,we-off-ns = <40>;
346 gpmc,oe-off-ns = <54>;
347 gpmc,access-ns = <64>;
348 gpmc,rd-cycle-ns = <82>;
349 gpmc,wr-cycle-ns = <82>;
350 gpmc,wait-on-read = "true";
351 gpmc,wait-on-write = "true";
352 gpmc,bus-turnaround-ns = <0>;
353 gpmc,cycle2cycle-delay-ns = <0>;
354 gpmc,clk-activation-ns = <0>;
355 gpmc,wait-monitoring-ns = <0>;
356 gpmc,wr-access-ns = <40>;
357 gpmc,wr-data-mux-bus-ns = <0>;
359 #address-cells = <1>;
363 /* MTD partition table */
366 reg = <0x00000000 0x000020000>;
371 reg = <0x00020000 0x00020000>;
376 reg = <0x00040000 0x00020000>;
381 reg = <0x00060000 0x00020000>;
386 reg = <0x00080000 0x001e0000>;
390 label = "environment";
391 reg = <0x00260000 0x00020000>;
396 reg = <0x00280000 0x00500000>;
400 label = "File-System";
401 reg = <0x00780000 0x0F880000>;
406 #include "tps65910.dtsi"
409 vcc1-supply = <&vbat>;
410 vcc2-supply = <&vbat>;
411 vcc3-supply = <&vbat>;
412 vcc4-supply = <&vbat>;
413 vcc5-supply = <&vbat>;
414 vcc6-supply = <&vbat>;
415 vcc7-supply = <&vbat>;
416 vccio-supply = <&vbat>;
419 vrtc_reg: regulator@0 {
423 vio_reg: regulator@1 {
427 vdd1_reg: regulator@2 {
428 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
429 regulator-name = "vdd_mpu";
430 regulator-min-microvolt = <912500>;
431 regulator-max-microvolt = <1312500>;
436 vdd2_reg: regulator@3 {
437 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
438 regulator-name = "vdd_core";
439 regulator-min-microvolt = <912500>;
440 regulator-max-microvolt = <1150000>;
445 vdd3_reg: regulator@4 {
449 vdig1_reg: regulator@5 {
453 vdig2_reg: regulator@6 {
457 vpll_reg: regulator@7 {
461 vdac_reg: regulator@8 {
465 vaux1_reg: regulator@9 {
469 vaux2_reg: regulator@10 {
473 vaux33_reg: regulator@11 {
477 vmmc_reg: regulator@12 {
478 regulator-min-microvolt = <1800000>;
479 regulator-max-microvolt = <3300000>;
486 pinctrl-names = "default", "sleep";
487 pinctrl-0 = <&cpsw_default>;
488 pinctrl-1 = <&cpsw_sleep>;
492 pinctrl-names = "default", "sleep";
493 pinctrl-0 = <&davinci_mdio_default>;
494 pinctrl-1 = <&davinci_mdio_sleep>;
498 phy_id = <&davinci_mdio>, <0>;
499 phy-mode = "rgmii-txid";
503 phy_id = <&davinci_mdio>, <1>;
504 phy-mode = "rgmii-txid";
511 ti,x-plate-resistance = <200>;
512 ti,coordiante-readouts = <5>;
513 ti,wire-config = <0x00 0x11 0x22 0x33>;
517 ti,adc-channels = <4 5 6 7>;
523 vmmc-supply = <&vmmc_reg>;