arch/arm/boot/dts/am335x-evm.dts

   1 /*
   2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8 /dts-v1/;
   9
  10 #include "am33xx.dtsi"
  11
  12 / {
  13         model = "TI AM335x EVM";
  14         compatible = "ti,am335x-evm", "ti,am33xx";
  15
  16         cpus {
  17                 cpu@0 {
  18                         cpu0-supply = <&vdd1_reg>;
  19                 };
  20         };
  21
  22         memory {
  23                 device_type = "memory";
  24                 reg = <0x80000000 0x10000000>; /* 256 MB */
  25         };
  26
  27         am33xx_pinmux: pinmux@44e10800 {
  28                 pinctrl-names = "default";
  29                 pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
  30
  31                 matrix_keypad_s0: matrix_keypad_s0 {
  32                         pinctrl-single,pins = <
  33                                 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a5.gpio1_21 */
  34                                 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a6.gpio1_22 */
  35                                 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a9.gpio1_25 */
  36                                 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a10.gpio1_26 */
  37                                 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)   /* gpmc_a11.gpio1_27 */
  38                         >;
  39                 };
  40
  41                 volume_keys_s0: volume_keys_s0 {
  42                         pinctrl-single,pins = <
  43                                 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* spi0_sclk.gpio0_2 */
  44                                 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* spi0_d0.gpio0_3 */
  45                         >;
  46                 };
  47
  48                 i2c0_pins: pinmux_i2c0_pins {
  49                         pinctrl-single,pins = <
  50                                 0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
  51                                 0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
  52                         >;
  53                 };
  54
  55                 i2c1_pins: pinmux_i2c1_pins {
  56                         pinctrl-single,pins = <
  57                                 0x158 (PIN_INPUT_PULLUP | MUX_MODE2)    /* spi0_d1.i2c1_sda */
  58                                 0x15c (PIN_INPUT_PULLUP | MUX_MODE2)    /* spi0_cs0.i2c1_scl */
  59                         >;
  60                 };
  61
  62                 uart0_pins: pinmux_uart0_pins {
  63                         pinctrl-single,pins = <
  64                                 0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
  65                                 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  66                         >;
  67                 };
  68
  69                 clkout2_pin: pinmux_clkout2_pin {
  70                         pinctrl-single,pins = <
  71                                 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
  72                         >;
  73                 };
  74
  75                 nandflash_pins_s0: nandflash_pins_s0 {
  76                         pinctrl-single,pins = <
  77                                 0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
  78                                 0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
  79                                 0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
  80                                 0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
  81                                 0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
  82                                 0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
  83                                 0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
  84                                 0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
  85                                 0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
  86                                 0x74 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_wpn.gpio0_30 */
  87                                 0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0  */
  88                                 0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
  89                                 0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
  90                                 0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
  91                                 0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
  92                         >;
  93                 };
  94
  95                 ecap0_pins: backlight_pins {
  96                         pinctrl-single,pins = <
  97                                 0x164 0x0       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
  98                         >;
  99                 };
 100
 101                 cpsw_default: cpsw_default {
 102                         pinctrl-single,pins = <
 103                                 /* Slave 1 */
 104                                 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
 105                                 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rctl */
 106                                 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
 107                                 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
 108                                 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
 109                                 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
 110                                 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
 111                                 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rgmii1_rclk */
 112                                 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd3.rgmii1_rd3 */
 113                                 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd2.rgmii1_rd2 */
 114                                 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd1 */
 115                                 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd0 */
 116                         >;
 117                 };
 118
 119                 cpsw_sleep: cpsw_sleep {
 120                         pinctrl-single,pins = <
 121                                 /* Slave 1 reset value */
 122                                 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 123                                 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 124                                 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 125                                 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 126                                 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 127                                 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 128                                 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 129                                 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 130                                 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 131                                 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 132                                 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 133                                 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 134                         >;
 135                 };
 136
 137                 davinci_mdio_default: davinci_mdio_default {
 138                         pinctrl-single,pins = <
 139                                 /* MDIO */
 140                                 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
 141                                 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
 142                         >;
 143                 };
 144
 145                 davinci_mdio_sleep: davinci_mdio_sleep {
 146                         pinctrl-single,pins = <
 147                                 /* MDIO reset value */
 148                                 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 149                                 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 150                         >;
 151                 };
 152         };
 153
 154         ocp {
 155                 uart0: serial@44e09000 {
 156                         pinctrl-names = "default";
 157                         pinctrl-0 = <&uart0_pins>;
 158
 159                         status = "okay";
 160                 };
 161
 162                 i2c0: i2c@44e0b000 {
 163                         pinctrl-names = "default";
 164                         pinctrl-0 = <&i2c0_pins>;
 165
 166                         status = "okay";
 167                         clock-frequency = <400000>;
 168
 169                         tps: tps@2d {
 170                                 reg = <0x2d>;
 171                         };
 172                 };
 173
 174                 musb: usb@47400000 {
 175                         status = "okay";
 176
 177                         control@44e10000 {
 178                                 status = "okay";
 179                         };
 180
 181                         usb-phy@47401300 {
 182                                 status = "okay";
 183                         };
 184
 185                         usb-phy@47401b00 {
 186                                 status = "okay";
 187                         };
 188
 189                         usb@47401000 {
 190                                 status = "okay";
 191                         };
 192
 193                         usb@47401800 {
 194                                 status = "okay";
 195                         };
 196
 197                         dma-controller@07402000  {
 198                                 status = "okay";
 199                         };
 200                 };
 201
 202                 i2c1: i2c@4802a000 {
 203                         pinctrl-names = "default";
 204                         pinctrl-0 = <&i2c1_pins>;
 205
 206                         status = "okay";
 207                         clock-frequency = <100000>;
 208
 209                         lis331dlh: lis331dlh@18 {
 210                                 compatible = "st,lis331dlh", "st,lis3lv02d";
 211                                 reg = <0x18>;
 212                                 Vdd-supply = <&lis3_reg>;
 213                                 Vdd_IO-supply = <&lis3_reg>;
 214
 215                                 st,click-single-x;
 216                                 st,click-single-y;
 217                                 st,click-single-z;
 218                                 st,click-thresh-x = <10>;
 219                                 st,click-thresh-y = <10>;
 220                                 st,click-thresh-z = <10>;
 221                                 st,irq1-click;
 222                                 st,irq2-click;
 223                                 st,wakeup-x-lo;
 224                                 st,wakeup-x-hi;
 225                                 st,wakeup-y-lo;
 226                                 st,wakeup-y-hi;
 227                                 st,wakeup-z-lo;
 228                                 st,wakeup-z-hi;
 229                                 st,min-limit-x = <120>;
 230                                 st,min-limit-y = <120>;
 231                                 st,min-limit-z = <140>;
 232                                 st,max-limit-x = <550>;
 233                                 st,max-limit-y = <550>;
 234                                 st,max-limit-z = <750>;
 235                         };
 236
 237                         tsl2550: tsl2550@39 {
 238                                 compatible = "taos,tsl2550";
 239                                 reg = <0x39>;
 240                         };
 241
 242                         tmp275: tmp275@48 {
 243                                 compatible = "ti,tmp275";
 244                                 reg = <0x48>;
 245                         };
 246                 };
 247
 248                 elm: elm@48080000 {
 249                         status = "okay";
 250                 };
 251
 252                 epwmss0: epwmss@48300000 {
 253                         status = "okay";
 254
 255                         ecap0: ecap@48300100 {
 256                                 status = "okay";
 257                                 pinctrl-names = "default";
 258                                 pinctrl-0 = <&ecap0_pins>;
 259                         };
 260                 };
 261
 262                 gpmc: gpmc@50000000 {
 263                         status = "okay";
 264                         pinctrl-names = "default";
 265                         pinctrl-0 = <&nandflash_pins_s0>;
 266                         ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
 267                         nand@0,0 {
 268                                 reg = <0 0 0>; /* CS0, offset 0 */
 269                                 nand-bus-width = <8>;
 270                                 ti,nand-ecc-opt = "bch8";
 271                                 gpmc,device-nand = "true";
 272                                 gpmc,device-width = <1>;
 273                                 gpmc,sync-clk-ps = <0>;
 274                                 gpmc,cs-on-ns = <0>;
 275                                 gpmc,cs-rd-off-ns = <44>;
 276                                 gpmc,cs-wr-off-ns = <44>;
 277                                 gpmc,adv-on-ns = <6>;
 278                                 gpmc,adv-rd-off-ns = <34>;
 279                                 gpmc,adv-wr-off-ns = <44>;
 280                                 gpmc,we-on-ns = <0>;
 281                                 gpmc,we-off-ns = <40>;
 282                                 gpmc,oe-on-ns = <0>;
 283                                 gpmc,oe-off-ns = <54>;
 284                                 gpmc,access-ns = <64>;
 285                                 gpmc,rd-cycle-ns = <82>;
 286                                 gpmc,wr-cycle-ns = <82>;
 287                                 gpmc,wait-on-read = "true";
 288                                 gpmc,wait-on-write = "true";
 289                                 gpmc,bus-turnaround-ns = <0>;
 290                                 gpmc,cycle2cycle-delay-ns = <0>;
 291                                 gpmc,clk-activation-ns = <0>;
 292                                 gpmc,wait-monitoring-ns = <0>;
 293                                 gpmc,wr-access-ns = <40>;
 294                                 gpmc,wr-data-mux-bus-ns = <0>;
 295
 296                                 #address-cells = <1>;
 297                                 #size-cells = <1>;
 298                                 elm_id = <&elm>;
 299
 300                                 /* MTD partition table */
 301                                 partition@0 {
 302                                         label = "SPL1";
 303                                         reg = <0x00000000 0x000020000>;
 304                                 };
 305
 306                                 partition@1 {
 307                                         label = "SPL2";
 308                                         reg = <0x00020000 0x00020000>;
 309                                 };
 310
 311                                 partition@2 {
 312                                         label = "SPL3";
 313                                         reg = <0x00040000 0x00020000>;
 314                                 };
 315
 316                                 partition@3 {
 317                                         label = "SPL4";
 318                                         reg = <0x00060000 0x00020000>;
 319                                 };
 320
 321                                 partition@4 {
 322                                         label = "U-boot";
 323                                         reg = <0x00080000 0x001e0000>;
 324                                 };
 325
 326                                 partition@5 {
 327                                         label = "environment";
 328                                         reg = <0x00260000 0x00020000>;
 329                                 };
 330
 331                                 partition@6 {
 332                                         label = "Kernel";
 333                                         reg = <0x00280000 0x00500000>;
 334                                 };
 335
 336                                 partition@7 {
 337                                         label = "File-System";
 338                                         reg = <0x00780000 0x0F880000>;
 339                                 };
 340                         };
 341                 };
 342         };
 343
 344         vbat: fixedregulator@0 {
 345                 compatible = "regulator-fixed";
 346                 regulator-name = "vbat";
 347                 regulator-min-microvolt = <5000000>;
 348                 regulator-max-microvolt = <5000000>;
 349                 regulator-boot-on;
 350         };
 351
 352         lis3_reg: fixedregulator@1 {
 353                 compatible = "regulator-fixed";
 354                 regulator-name = "lis3_reg";
 355                 regulator-boot-on;
 356         };
 357
 358         matrix_keypad: matrix_keypad@0 {
 359                 compatible = "gpio-matrix-keypad";
 360                 debounce-delay-ms = <5>;
 361                 col-scan-delay-us = <2>;
 362
 363                 row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH         /* Bank1, pin25 */
 364                              &gpio1 26 GPIO_ACTIVE_HIGH         /* Bank1, pin26 */
 365                              &gpio1 27 GPIO_ACTIVE_HIGH>;       /* Bank1, pin27 */
 366
 367                 col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH         /* Bank1, pin21 */
 368                              &gpio1 22 GPIO_ACTIVE_HIGH>;       /* Bank1, pin22 */
 369
 370                 linux,keymap = <0x0000008b      /* MENU */
 371                                 0x0100009e      /* BACK */
 372                                 0x02000069      /* LEFT */
 373                                 0x0001006a      /* RIGHT */
 374                                 0x0101001c      /* ENTER */
 375                                 0x0201006c>;    /* DOWN */
 376         };
 377
 378         gpio_keys: volume_keys@0 {
 379                 compatible = "gpio-keys";
 380                 #address-cells = <1>;
 381                 #size-cells = <0>;
 382                 autorepeat;
 383
 384                 switch@9 {
 385                         label = "volume-up";
 386                         linux,code = <115>;
 387                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 388                         gpio-key,wakeup;
 389                 };
 390
 391                 switch@10 {
 392                         label = "volume-down";
 393                         linux,code = <114>;
 394                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
 395                         gpio-key,wakeup;
 396                 };
 397         };
 398
 399         backlight {
 400                 compatible = "pwm-backlight";
 401                 pwms = <&ecap0 0 50000 0>;
 402                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
 403                 default-brightness-level = <8>;
 404         };
 405 };
 406
 407 #include "tps65910.dtsi"
 408
 409 &tps {
 410         vcc1-supply = <&vbat>;
 411         vcc2-supply = <&vbat>;
 412         vcc3-supply = <&vbat>;
 413         vcc4-supply = <&vbat>;
 414         vcc5-supply = <&vbat>;
 415         vcc6-supply = <&vbat>;
 416         vcc7-supply = <&vbat>;
 417         vccio-supply = <&vbat>;
 418
 419         regulators {
 420                 vrtc_reg: regulator@0 {
 421                         regulator-always-on;
 422                 };
 423
 424                 vio_reg: regulator@1 {
 425                         regulator-always-on;
 426                 };
 427
 428                 vdd1_reg: regulator@2 {
 429                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 430                         regulator-name = "vdd_mpu";
 431                         regulator-min-microvolt = <912500>;
 432                         regulator-max-microvolt = <1312500>;
 433                         regulator-boot-on;
 434                         regulator-always-on;
 435                 };
 436
 437                 vdd2_reg: regulator@3 {
 438                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 439                         regulator-name = "vdd_core";
 440                         regulator-min-microvolt = <912500>;
 441                         regulator-max-microvolt = <1150000>;
 442                         regulator-boot-on;
 443                         regulator-always-on;
 444                 };
 445
 446                 vdd3_reg: regulator@4 {
 447                         regulator-always-on;
 448                 };
 449
 450                 vdig1_reg: regulator@5 {
 451                         regulator-always-on;
 452                 };
 453
 454                 vdig2_reg: regulator@6 {
 455                         regulator-always-on;
 456                 };
 457
 458                 vpll_reg: regulator@7 {
 459                         regulator-always-on;
 460                 };
 461
 462                 vdac_reg: regulator@8 {
 463                         regulator-always-on;
 464                 };
 465
 466                 vaux1_reg: regulator@9 {
 467                         regulator-always-on;
 468                 };
 469
 470                 vaux2_reg: regulator@10 {
 471                         regulator-always-on;
 472                 };
 473
 474                 vaux33_reg: regulator@11 {
 475                         regulator-always-on;
 476                 };
 477
 478                 vmmc_reg: regulator@12 {
 479                         regulator-always-on;
 480                 };
 481         };
 482 };
 483
 484 &mac {
 485         pinctrl-names = "default", "sleep";
 486         pinctrl-0 = <&cpsw_default>;
 487         pinctrl-1 = <&cpsw_sleep>;
 488 };
 489
 490 &davinci_mdio {
 491         pinctrl-names = "default", "sleep";
 492         pinctrl-0 = <&davinci_mdio_default>;
 493         pinctrl-1 = <&davinci_mdio_sleep>;
 494 };
 495
 496 &cpsw_emac0 {
 497         phy_id = <&davinci_mdio>, <0>;
 498         phy-mode = "rgmii-txid";
 499 };
 500
 501 &cpsw_emac1 {
 502         phy_id = <&davinci_mdio>, <1>;
 503         phy-mode = "rgmii-txid";
 504 };
 505
 506 &tscadc {
 507         status = "okay";
 508         tsc {
 509                 ti,wires = <4>;
 510                 ti,x-plate-resistance = <200>;
 511                 ti,coordiante-readouts = <5>;
 512                 ti,wire-config = <0x00 0x11 0x22 0x33>;
 513         };
 514
 515         adc {
 516                 ti,adc-channels = <4 5 6 7>;
 517         };
 518 };