2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
11 * http://www.ti.com/tool/tmdssk3358
16 #include "am33xx.dtsi"
17 #include <dt-bindings/pwm/pwm.h>
20 model = "TI AM335x EVM-SK";
21 compatible = "ti,am335x-evmsk", "ti,am33xx";
25 cpu0-supply = <&vdd1_reg>;
30 device_type = "memory";
31 reg = <0x80000000 0x10000000>; /* 256 MB */
34 vbat: fixedregulator@0 {
35 compatible = "regulator-fixed";
36 regulator-name = "vbat";
37 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <5000000>;
42 lis3_reg: fixedregulator@1 {
43 compatible = "regulator-fixed";
44 regulator-name = "lis3_reg";
49 pinctrl-names = "default";
50 pinctrl-0 = <&user_leds_s0>;
52 compatible = "gpio-leds";
55 label = "evmsk:green:usr0";
56 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
57 default-state = "off";
61 label = "evmsk:green:usr1";
62 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
63 default-state = "off";
67 label = "evmsk:green:mmc0";
68 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
69 linux,default-trigger = "mmc0";
70 default-state = "off";
74 label = "evmsk:green:heartbeat";
75 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
76 linux,default-trigger = "heartbeat";
77 default-state = "off";
81 gpio_buttons: gpio_buttons@0 {
82 compatible = "gpio-keys";
89 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
95 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
100 linux,code = <0x102>;
101 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
107 linux,code = <0x103>;
108 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
113 compatible = "pwm-backlight";
114 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
115 brightness-levels = <0 58 61 66 75 90 125 170 255>;
116 default-brightness-level = <8>;
120 compatible = "ti,da830-evm-audio";
121 ti,model = "AM335x-EVMSK";
122 ti,audio-codec = <&tlv320aic3106>;
123 ti,mcasp-controller = <&mcasp1>;
124 ti,codec-clock-rate = <24576000>;
126 "Headphone Jack", "HPLOUT",
127 "Headphone Jack", "HPROUT";
132 pinctrl-names = "default";
133 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
135 user_leds_s0: user_leds_s0 {
136 pinctrl-single,pins = <
137 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
138 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
139 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
140 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
144 gpio_keys_s0: gpio_keys_s0 {
145 pinctrl-single,pins = <
146 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
147 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
148 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
149 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
153 i2c0_pins: pinmux_i2c0_pins {
154 pinctrl-single,pins = <
155 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
156 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
160 uart0_pins: pinmux_uart0_pins {
161 pinctrl-single,pins = <
162 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
163 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
167 clkout2_pin: pinmux_clkout2_pin {
168 pinctrl-single,pins = <
169 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
173 ecap2_pins: backlight_pins {
174 pinctrl-single,pins = <
175 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
179 cpsw_default: cpsw_default {
180 pinctrl-single,pins = <
182 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
183 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
184 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
185 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
186 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
187 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
188 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
189 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
190 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
191 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
192 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
193 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
196 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
197 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
198 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
199 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
200 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
201 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
202 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
203 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
204 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
205 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
206 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
207 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
211 cpsw_sleep: cpsw_sleep {
212 pinctrl-single,pins = <
213 /* Slave 1 reset value */
214 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
215 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
216 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
217 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
218 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
219 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
220 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
221 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
222 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
223 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
224 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
225 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
227 /* Slave 2 reset value*/
228 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
229 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
230 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
231 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
232 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
233 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
234 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
235 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
236 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
237 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
238 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
239 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
243 davinci_mdio_default: davinci_mdio_default {
244 pinctrl-single,pins = <
246 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
247 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
251 davinci_mdio_sleep: davinci_mdio_sleep {
252 pinctrl-single,pins = <
253 /* MDIO reset value */
254 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
255 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
259 mcasp1_pins: mcasp1_pins {
260 pinctrl-single,pins = <
261 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
262 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
263 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
264 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
270 pinctrl-names = "default";
271 pinctrl-0 = <&uart0_pins>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&i2c0_pins>;
281 clock-frequency = <400000>;
287 lis331dlh: lis331dlh@18 {
288 compatible = "st,lis331dlh", "st,lis3lv02d";
290 Vdd-supply = <&lis3_reg>;
291 Vdd_IO-supply = <&lis3_reg>;
296 st,click-thresh-x = <10>;
297 st,click-thresh-y = <10>;
298 st,click-thresh-z = <10>;
307 st,min-limit-x = <120>;
308 st,min-limit-y = <120>;
309 st,min-limit-z = <140>;
310 st,max-limit-x = <550>;
311 st,max-limit-y = <550>;
312 st,max-limit-z = <750>;
315 tlv320aic3106: tlv320aic3106@1b {
316 compatible = "ti,tlv320aic3106";
321 AVDD-supply = <&vaux2_reg>;
322 IOVDD-supply = <&vaux2_reg>;
323 DRVDD-supply = <&vaux2_reg>;
324 DVDD-supply = <&vbat>;
347 ecap2: ecap@48304100 {
349 pinctrl-names = "default";
350 pinctrl-0 = <&ecap2_pins>;
354 #include "tps65910.dtsi"
357 vcc1-supply = <&vbat>;
358 vcc2-supply = <&vbat>;
359 vcc3-supply = <&vbat>;
360 vcc4-supply = <&vbat>;
361 vcc5-supply = <&vbat>;
362 vcc6-supply = <&vbat>;
363 vcc7-supply = <&vbat>;
364 vccio-supply = <&vbat>;
367 vrtc_reg: regulator@0 {
371 vio_reg: regulator@1 {
375 vdd1_reg: regulator@2 {
376 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
377 regulator-name = "vdd_mpu";
378 regulator-min-microvolt = <912500>;
379 regulator-max-microvolt = <1312500>;
384 vdd2_reg: regulator@3 {
385 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
386 regulator-name = "vdd_core";
387 regulator-min-microvolt = <912500>;
388 regulator-max-microvolt = <1150000>;
393 vdd3_reg: regulator@4 {
397 vdig1_reg: regulator@5 {
401 vdig2_reg: regulator@6 {
405 vpll_reg: regulator@7 {
409 vdac_reg: regulator@8 {
413 vaux1_reg: regulator@9 {
417 vaux2_reg: regulator@10 {
421 vaux33_reg: regulator@11 {
425 vmmc_reg: regulator@12 {
426 regulator-min-microvolt = <1800000>;
427 regulator-max-microvolt = <3300000>;
434 pinctrl-names = "default", "sleep";
435 pinctrl-0 = <&cpsw_default>;
436 pinctrl-1 = <&cpsw_sleep>;
440 pinctrl-names = "default", "sleep";
441 pinctrl-0 = <&davinci_mdio_default>;
442 pinctrl-1 = <&davinci_mdio_sleep>;
446 phy_id = <&davinci_mdio>, <0>;
447 phy-mode = "rgmii-txid";
451 phy_id = <&davinci_mdio>, <1>;
452 phy-mode = "rgmii-txid";
457 vmmc-supply = <&vmmc_reg>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&mcasp1_pins>;
479 op-mode = <0>; /* MCASP_IIS_MODE */
482 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
493 ti,x-plate-resistance = <200>;
494 ti,coordinate-readouts = <5>;
495 ti,wire-config = <0x00 0x11 0x22 0x33>;