2 * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include "am33xx.dtsi"
13 model = "Toby Churchill SL50 Series";
14 compatible = "tcl,am335x-sl50", "ti,am33xx";
18 cpu0-supply = <&dcdc2_reg>;
27 compatible = "gpio-leds";
28 pinctrl-names = "default";
29 pinctrl-0 = <&led_pins>;
32 label = "sl50:green:usr0";
33 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
34 default-state = "off";
38 label = "sl50:red:usr1";
39 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
40 default-state = "off";
44 label = "sl50:green:usr2";
45 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
46 default-state = "off";
50 label = "sl50:red:usr3";
51 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
52 default-state = "off";
57 compatible = "pwm-backlight";
58 pwms = <&ehrpwm1 0 500000 0>;
59 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
60 default-brightness-level = <6>;
64 compatible = "pwm-backlight";
65 pwms = <&ehrpwm1 1 500000 0>;
66 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
67 default-brightness-level = <6>;
71 compatible = "simple-bus";
75 /* audio external oscillator */
76 tlv320aic3x_mclk: oscillator@0 {
77 compatible = "fixed-clock";
79 clock-frequency = <24576000>; /* 24.576MHz */
84 compatible = "ti,da830-evm-audio";
85 ti,model = "AM335x-SL50";
86 ti,audio-codec = <&audio_codec>;
87 ti,mcasp-controller = <&mcasp0>;
89 clocks = <&tlv320aic3x_mclk>;
93 "Headphone Jack", "HPLOUT",
94 "Headphone Jack", "HPROUT",
99 emmc_pwrseq: pwrseq@0 {
100 compatible = "mmc-pwrseq-emmc";
101 pinctrl-names = "default";
102 pinctrl-0 = <&emmc_pwrseq_pins>;
103 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
106 vmmcsd_fixed: fixedregulator@0 {
107 compatible = "regulator-fixed";
108 regulator-name = "vmmcsd_fixed";
109 regulator-min-microvolt = <3300000>;
110 regulator-max-microvolt = <3300000>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&lwb_pins>;
118 led_pins: pinmux_led_pins {
119 pinctrl-single,pins = <
120 AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */
121 AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* gpmc_a6.gpio1_22 */
122 AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23 */
123 AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* gpmc_a8.gpio1_24 */
127 uart0_pins: pinmux_uart0_pins {
128 pinctrl-single,pins = <
129 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
130 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
134 uart4_pins: pinmux_uart4_pins {
135 pinctrl-single,pins = <
136 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd */
137 AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */
141 i2c0_pins: pinmux_i2c0_pins {
142 pinctrl-single,pins = <
143 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
144 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
148 i2c1_pins: pinmux_i2c1_pins {
149 pinctrl-single,pins = <
150 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
151 AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txdi2c1_scl */
155 i2c2_pins: pinmux_i2c2_pins {
156 pinctrl-single,pins = <
157 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
158 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
162 cpsw_default: cpsw_default {
163 pinctrl-single,pins = <
165 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
166 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
167 AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
168 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
169 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
170 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
171 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
172 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
173 AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
174 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
175 AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
176 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
177 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
181 cpsw_sleep: cpsw_sleep {
182 pinctrl-single,pins = <
183 /* Slave 1 reset value */
184 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
185 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
186 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
187 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
188 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
189 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
190 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
191 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
192 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
193 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
194 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
195 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
196 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
200 davinci_mdio_default: davinci_mdio_default {
201 pinctrl-single,pins = <
203 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
204 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
208 davinci_mdio_sleep: davinci_mdio_sleep {
209 pinctrl-single,pins = <
210 /* MDIO reset value */
211 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
212 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
216 mmc1_pins: pinmux_mmc1_pins {
217 pinctrl-single,pins = <
218 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
222 emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {
223 pinctrl-single,pins = <
224 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 */
228 emmc_pins: pinmux_emmc_pins {
229 pinctrl-single,pins = <
230 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
231 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
232 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
233 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
234 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
235 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
236 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
237 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
238 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
239 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
243 audio_pins: pinmux_audio_pins {
244 pinctrl-single,pins = <
245 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
246 AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
247 AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
248 AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
249 AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */
253 ehrpwm1_pins: pinmux_ehrpwm1a_pins {
254 pinctrl-single,pins = <
255 AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6) /* gpmc_a2.ehrpwm1a */
256 AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.ehrpwm1b */
260 lwb_pins: pinmux_lwb_pins {
261 pinctrl-single,pins = <
262 AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19 */
263 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* nKbdOnC - gpmc_ad10.gpio0_26 */
264 AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
265 AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
266 AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* nDispReset - gpmc_ad14.gpio1_14 */
267 AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
268 /* AVR Programming - SPI Bus (bit bang) - Screen and Keyboard */
269 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMOSI spi0_d0.gpio0_3 */
270 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMISO spi0_d1.gpio0_4 */
271 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattSCLK spi0_clk.gpio0_2 */
272 /* PDI Bus - Battery system */
273 AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
274 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
281 pinctrl-names = "default";
282 pinctrl-0 = <&i2c0_pins>;
284 clock-frequency = <400000>;
291 compatible = "at,24c256";
298 pinctrl-names = "default";
299 pinctrl-0 = <&i2c1_pins>;
304 pinctrl-names = "default";
305 pinctrl-0 = <&i2c2_pins>;
307 clock-frequency = <400000>;
309 audio_codec: tlv320aic3106@1b {
311 compatible = "ti,tlv320aic3106";
314 AVDD-supply = <&ldo4_reg>;
315 IOVDD-supply = <&ldo4_reg>;
316 DRVDD-supply = <&ldo4_reg>;
317 DVDD-supply = <&ldo3_reg>;
339 dr_mode = "peripheral";
353 pinctrl-names = "default";
354 pinctrl-0 = <&mmc1_pins>;
356 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
357 vmmc-supply = <&vmmcsd_fixed>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&emmc_pins>;
365 vmmc-supply = <&vmmcsd_fixed>;
366 mmc-pwrseq = <&emmc_pwrseq>;
371 pinctrl-names = "default";
372 pinctrl-0 = <&audio_pins>;
374 op-mode = <0>; /* MCASP_ISS_MODE */
388 pinctrl-names = "default";
389 pinctrl-0 = <&uart0_pins>;
394 pinctrl-names = "default";
395 pinctrl-0 = <&uart4_pins>;
398 #include "tps65217.dtsi"
401 ti,pmic-shutdown-controller;
403 interrupt-parent = <&intc>;
404 interrupts = <7>; /* NNMI */
407 dcdc1_reg: regulator@0 {
409 regulator-min-microvolt = <1500000>;
410 regulator-max-microvolt = <1500000>;
414 dcdc2_reg: regulator@1 {
415 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
416 regulator-name = "vdd_mpu";
417 regulator-min-microvolt = <925000>;
418 regulator-max-microvolt = <1325000>;
423 dcdc3_reg: regulator@2 {
424 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
425 regulator-name = "vdd_core";
426 regulator-min-microvolt = <925000>;
427 regulator-max-microvolt = <1150000>;
432 ldo1_reg: regulator@3 {
433 /* VRTC / VIO / VDDS*/
435 regulator-min-microvolt = <1800000>;
436 regulator-max-microvolt = <1800000>;
439 ldo2_reg: regulator@4 {
442 regulator-min-microvolt = <3300000>;
443 regulator-max-microvolt = <3300000>;
446 ldo3_reg: regulator@5 {
448 regulator-min-microvolt = <1800000>;
449 regulator-max-microvolt = <1800000>;
453 ldo4_reg: regulator@6 {
455 regulator-min-microvolt = <3300000>;
456 regulator-max-microvolt = <3300000>;
463 phy_id = <&davinci_mdio>, <0>;
468 phy_id = <&davinci_mdio>, <1>;
474 pinctrl-names = "default", "sleep";
475 pinctrl-0 = <&cpsw_default>;
476 pinctrl-1 = <&cpsw_sleep>;
481 pinctrl-names = "default", "sleep";
482 pinctrl-0 = <&davinci_mdio_default>;
483 pinctrl-1 = <&davinci_mdio_sleep>;
500 pinctrl-names = "default";
501 pinctrl-0 = <&ehrpwm1_pins>;