arch/arm/boot/dts/am33xx.dtsi

   1 /*
   2  * Device Tree Source for AM33XX SoC
   3  *
   4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /include/ "skeleton.dtsi"
  12
  13 / {
  14         compatible = "ti,am33xx";
  15         interrupt-parent = <&intc>;
  16
  17         aliases {
  18                 serial0 = &uart1;
  19                 serial1 = &uart2;
  20                 serial2 = &uart3;
  21                 serial3 = &uart4;
  22                 serial4 = &uart5;
  23                 serial5 = &uart6;
  24         };
  25
  26         cpus {
  27                 cpu@0 {
  28                         compatible = "arm,cortex-a8";
  29
  30                         /*
  31                          * To consider voltage drop between PMIC and SoC,
  32                          * tolerance value is reduced to 2% from 4% and
  33                          * voltage value is increased as a precaution.
  34                          */
  35                         operating-points = <
  36                                 /* kHz    uV */
  37                                 720000  1285000
  38                                 600000  1225000
  39                                 500000  1125000
  40                                 275000  1125000
  41                         >;
  42                         voltage-tolerance = <2>; /* 2 percentage */
  43                         clock-latency = <300000>; /* From omap-cpufreq driver */
  44                 };
  45         };
  46
  47         /*
  48          * The soc node represents the soc top level view. It is uses for IPs
  49          * that are not memory mapped in the MPU view or for the MPU itself.
  50          */
  51         soc {
  52                 compatible = "ti,omap-infra";
  53                 mpu {
  54                         compatible = "ti,omap3-mpu";
  55                         ti,hwmods = "mpu";
  56                 };
  57         };
  58
  59         am33xx_pinmux: pinmux@44e10800 {
  60                 compatible = "pinctrl-single";
  61                 reg = <0x44e10800 0x0238>;
  62                 #address-cells = <1>;
  63                 #size-cells = <0>;
  64                 pinctrl-single,register-width = <32>;
  65                 pinctrl-single,function-mask = <0x7f>;
  66         };
  67
  68         /*
  69          * XXX: Use a flat representation of the AM33XX interconnect.
  70          * The real AM33XX interconnect network is quite complex.Since
  71          * that will not bring real advantage to represent that in DT
  72          * for the moment, just use a fake OCP bus entry to represent
  73          * the whole bus hierarchy.
  74          */
  75         ocp {
  76                 compatible = "simple-bus";
  77                 #address-cells = <1>;
  78                 #size-cells = <1>;
  79                 ranges;
  80                 ti,hwmods = "l3_main";
  81
  82                 intc: interrupt-controller@48200000 {
  83                         compatible = "ti,omap2-intc";
  84                         interrupt-controller;
  85                         #interrupt-cells = <1>;
  86                         ti,intc-size = <128>;
  87                         reg = <0x48200000 0x1000>;
  88                 };
  89
  90                 edma: edma@49000000 {
  91                         compatible = "ti,edma3";
  92                         ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  93                         reg =   <0x49000000 0x10000>,
  94                                 <0x44e10f90 0x10>;
  95                         interrupt-parent = <&intc>;
  96                         interrupts = <12 13 14>;
  97                         #dma-cells = <1>;
  98                         dma-channels = <64>;
  99                         ti,edma-regions = <4>;
 100                         ti,edma-slots = <256>;
 101                         ti,edma-queue-tc-map = <0 0
 102                                                 1 1
 103                                                 2 2>;
 104                         ti,edma-queue-priority-map = <0 0
 105                                                       1 1
 106                                                       2 2>;
 107                         ti,edma-default-queue = <0>;
 108                 };
 109
 110                 gpio1: gpio@44e07000 {
 111                         compatible = "ti,omap4-gpio";
 112                         ti,hwmods = "gpio1";
 113                         gpio-controller;
 114                         #gpio-cells = <2>;
 115                         interrupt-controller;
 116                         #interrupt-cells = <1>;
 117                         reg = <0x44e07000 0x1000>;
 118                         interrupts = <96>;
 119                 };
 120
 121                 gpio2: gpio@4804c000 {
 122                         compatible = "ti,omap4-gpio";
 123                         ti,hwmods = "gpio2";
 124                         gpio-controller;
 125                         #gpio-cells = <2>;
 126                         interrupt-controller;
 127                         #interrupt-cells = <1>;
 128                         reg = <0x4804c000 0x1000>;
 129                         interrupts = <98>;
 130                 };
 131
 132                 gpio3: gpio@481ac000 {
 133                         compatible = "ti,omap4-gpio";
 134                         ti,hwmods = "gpio3";
 135                         gpio-controller;
 136                         #gpio-cells = <2>;
 137                         interrupt-controller;
 138                         #interrupt-cells = <1>;
 139                         reg = <0x481ac000 0x1000>;
 140                         interrupts = <32>;
 141                 };
 142
 143                 gpio4: gpio@481ae000 {
 144                         compatible = "ti,omap4-gpio";
 145                         ti,hwmods = "gpio4";
 146                         gpio-controller;
 147                         #gpio-cells = <2>;
 148                         interrupt-controller;
 149                         #interrupt-cells = <1>;
 150                         reg = <0x481ae000 0x1000>;
 151                         interrupts = <62>;
 152                 };
 153
 154                 uart1: serial@44e09000 {
 155                         compatible = "ti,omap3-uart";
 156                         ti,hwmods = "uart1";
 157                         clock-frequency = <48000000>;
 158                         reg = <0x44e09000 0x2000>;
 159                         interrupts = <72>;
 160                         status = "disabled";
 161                 };
 162
 163                 uart2: serial@48022000 {
 164                         compatible = "ti,omap3-uart";
 165                         ti,hwmods = "uart2";
 166                         clock-frequency = <48000000>;
 167                         reg = <0x48022000 0x2000>;
 168                         interrupts = <73>;
 169                         status = "disabled";
 170                 };
 171
 172                 uart3: serial@48024000 {
 173                         compatible = "ti,omap3-uart";
 174                         ti,hwmods = "uart3";
 175                         clock-frequency = <48000000>;
 176                         reg = <0x48024000 0x2000>;
 177                         interrupts = <74>;
 178                         status = "disabled";
 179                 };
 180
 181                 uart4: serial@481a6000 {
 182                         compatible = "ti,omap3-uart";
 183                         ti,hwmods = "uart4";
 184                         clock-frequency = <48000000>;
 185                         reg = <0x481a6000 0x2000>;
 186                         interrupts = <44>;
 187                         status = "disabled";
 188                 };
 189
 190                 uart5: serial@481a8000 {
 191                         compatible = "ti,omap3-uart";
 192                         ti,hwmods = "uart5";
 193                         clock-frequency = <48000000>;
 194                         reg = <0x481a8000 0x2000>;
 195                         interrupts = <45>;
 196                         status = "disabled";
 197                 };
 198
 199                 uart6: serial@481aa000 {
 200                         compatible = "ti,omap3-uart";
 201                         ti,hwmods = "uart6";
 202                         clock-frequency = <48000000>;
 203                         reg = <0x481aa000 0x2000>;
 204                         interrupts = <46>;
 205                         status = "disabled";
 206                 };
 207
 208                 i2c1: i2c@44e0b000 {
 209                         compatible = "ti,omap4-i2c";
 210                         #address-cells = <1>;
 211                         #size-cells = <0>;
 212                         ti,hwmods = "i2c1";
 213                         reg = <0x44e0b000 0x1000>;
 214                         interrupts = <70>;
 215                         status = "disabled";
 216                 };
 217
 218                 i2c2: i2c@4802a000 {
 219                         compatible = "ti,omap4-i2c";
 220                         #address-cells = <1>;
 221                         #size-cells = <0>;
 222                         ti,hwmods = "i2c2";
 223                         reg = <0x4802a000 0x1000>;
 224                         interrupts = <71>;
 225                         status = "disabled";
 226                 };
 227
 228                 i2c3: i2c@4819c000 {
 229                         compatible = "ti,omap4-i2c";
 230                         #address-cells = <1>;
 231                         #size-cells = <0>;
 232                         ti,hwmods = "i2c3";
 233                         reg = <0x4819c000 0x1000>;
 234                         interrupts = <30>;
 235                         status = "disabled";
 236                 };
 237
 238                 wdt2: wdt@44e35000 {
 239                         compatible = "ti,omap3-wdt";
 240                         ti,hwmods = "wd_timer2";
 241                         reg = <0x44e35000 0x1000>;
 242                         interrupts = <91>;
 243                 };
 244
 245                 dcan0: d_can@481cc000 {
 246                         compatible = "bosch,d_can";
 247                         ti,hwmods = "d_can0";
 248                         reg = <0x481cc000 0x2000>;
 249                         interrupts = <52>;
 250                         status = "disabled";
 251                 };
 252
 253                 dcan1: d_can@481d0000 {
 254                         compatible = "bosch,d_can";
 255                         ti,hwmods = "d_can1";
 256                         reg = <0x481d0000 0x2000>;
 257                         interrupts = <55>;
 258                         status = "disabled";
 259                 };
 260
 261                 timer1: timer@44e31000 {
 262                         compatible = "ti,omap2-timer";
 263                         reg = <0x44e31000 0x400>;
 264                         interrupts = <67>;
 265                         ti,hwmods = "timer1";
 266                         ti,timer-alwon;
 267                 };
 268
 269                 timer2: timer@48040000 {
 270                         compatible = "ti,omap2-timer";
 271                         reg = <0x48040000 0x400>;
 272                         interrupts = <68>;
 273                         ti,hwmods = "timer2";
 274                 };
 275
 276                 timer3: timer@48042000 {
 277                         compatible = "ti,omap2-timer";
 278                         reg = <0x48042000 0x400>;
 279                         interrupts = <69>;
 280                         ti,hwmods = "timer3";
 281                 };
 282
 283                 timer4: timer@48044000 {
 284                         compatible = "ti,omap2-timer";
 285                         reg = <0x48044000 0x400>;
 286                         interrupts = <92>;
 287                         ti,hwmods = "timer4";
 288                         ti,timer-pwm;
 289                 };
 290
 291                 timer5: timer@48046000 {
 292                         compatible = "ti,omap2-timer";
 293                         reg = <0x48046000 0x400>;
 294                         interrupts = <93>;
 295                         ti,hwmods = "timer5";
 296                         ti,timer-pwm;
 297                 };
 298
 299                 timer6: timer@48048000 {
 300                         compatible = "ti,omap2-timer";
 301                         reg = <0x48048000 0x400>;
 302                         interrupts = <94>;
 303                         ti,hwmods = "timer6";
 304                         ti,timer-pwm;
 305                 };
 306
 307                 timer7: timer@4804a000 {
 308                         compatible = "ti,omap2-timer";
 309                         reg = <0x4804a000 0x400>;
 310                         interrupts = <95>;
 311                         ti,hwmods = "timer7";
 312                         ti,timer-pwm;
 313                 };
 314
 315                 rtc@44e3e000 {
 316                         compatible = "ti,da830-rtc";
 317                         reg = <0x44e3e000 0x1000>;
 318                         interrupts = <75
 319                                       76>;
 320                         interrupt-parent = <&intc>;
 321                         ti,hwmods = "rtc";
 322                 };
 323
 324                 spi0: spi@48030000 {
 325                         compatible = "ti,omap4-mcspi";
 326                         #address-cells = <1>;
 327                         #size-cells = <0>;
 328                         reg = <0x48030000 0x400>;
 329                         interrupts = <65>;
 330                         ti,spi-num-cs = <2>;
 331                         ti,hwmods = "spi0";
 332                         dmas = <&edma 16
 333                                 &edma 17
 334                                 &edma 18
 335                                 &edma 19>;
 336                         dma-names = "tx0", "rx0", "tx1", "rx1";
 337                         status = "disabled";
 338                 };
 339
 340                 spi1: spi@481a0000 {
 341                         compatible = "ti,omap4-mcspi";
 342                         #address-cells = <1>;
 343                         #size-cells = <0>;
 344                         reg = <0x481a0000 0x400>;
 345                         interrupts = <125>;
 346                         ti,spi-num-cs = <2>;
 347                         ti,hwmods = "spi1";
 348                         dmas = <&edma 42
 349                                 &edma 43
 350                                 &edma 44
 351                                 &edma 45>;
 352                         dma-names = "tx0", "rx0", "tx1", "rx1";
 353                         status = "disabled";
 354                 };
 355
 356                 mmchs0: mmc@48060000 {
 357                         compatible = "ti,omap4-hsmmc";
 358                         reg = <0x48060200 0x400>;
 359                         interrupts = <64>;
 360                         ti,hwmods = "mmc1";
 361                         ti,needs-special-reset;
 362                         ti,needs-special-hs-handling;
 363                         max-frequency = <48000000>;
 364                         status = "disabled";
 365                 };
 366
 367                 mmchs1: mmc@481d8000 {
 368                         compatible = "ti,omap4-hsmmc";
 369                         reg = <0x481d8000 0x400>;
 370                         interrupts = <28>;
 371                         ti,hwmods = "mmc2";
 372                         ti,needs-special-reset;
 373                         ti,needs-special-hs-handling;
 374                         max-frequency = <48000000>;
 375                         status = "disabled";
 376                 };
 377
 378                 mmchs2: mmc@47810000 {
 379                         compatible = "ti,omap4-hsmmc";
 380                         reg = <0x47810000 0x400>;
 381                         interrupts = <29>;
 382                         ti,hwmods = "mmc3";
 383                         ti,needs-special-reset;
 384                         ti,needs-special-hs-handling;
 385                         max-frequency = <48000000>;
 386                         status = "disabled";
 387                 };
 388
 389                 usb@47400000 {
 390                         compatible = "ti,musb-am33xx";
 391                         reg = <0x47400000 0x1000        /* usbss */
 392                                0x47401000 0x800         /* musb instance 0 */
 393                                0x47401800 0x800>;       /* musb instance 1 */
 394                         interrupts = <17                /* usbss */
 395                                       18                /* musb instance 0 */
 396                                       19>;              /* musb instance 1 */
 397                         multipoint = <1>;
 398                         num-eps = <16>;
 399                         ram-bits = <12>;
 400                         port0-mode = <3>;
 401                         port1-mode = <3>;
 402                         power = <250>;
 403                         ti,hwmods = "usb_otg_hs";
 404                 };
 405
 406                 gpmc: gpmc@50000000 {
 407                         compatible = "ti,am3352-gpmc";
 408                         ti,hwmods = "gpmc";
 409                         reg = <0x50000000 0x2000>;
 410                         interrupts = <100>;
 411
 412                         gpmc,num-cs = <8>;
 413                         gpmc,num-waitpins = <2>;
 414                         #address-cells = <2>;
 415                         #size-cells = <1>;
 416                         ranges = <0 0 0x08000000 0x10000000>; /* CS0 @addr 0x8000000, size 0x10000000 */
 417                 };
 418
 419                 elm: elm@0 {
 420                         compatible = "ti,am3352-elm";
 421                         reg = <0x48080000 0x2000>;
 422                         interrupts = <4>;
 423                 };
 424
 425                 mac: ethernet@4a100000 {
 426                         compatible = "ti,cpsw";
 427                         ti,hwmods = "cpgmac0";
 428                         cpdma_channels = <8>;
 429                         ale_entries = <1024>;
 430                         bd_ram_size = <0x2000>;
 431                         no_bd_ram = <0>;
 432                         rx_descs = <64>;
 433                         mac_control = <0x20>;
 434                         slaves = <2>;
 435                         active_slave = <0>;
 436                         cpts_clock_mult = <0x80000000>;
 437                         cpts_clock_shift = <29>;
 438                         reg = <0x4a100000 0x800
 439                                0x4a101200 0x100>;
 440                         #address-cells = <1>;
 441                         #size-cells = <1>;
 442                         interrupt-parent = <&intc>;
 443                         /*
 444                          * c0_rx_thresh_pend
 445                          * c0_rx_pend
 446                          * c0_tx_pend
 447                          * c0_misc_pend
 448                          */
 449                         interrupts = <40 41 42 43>;
 450                         ranges;
 451
 452                         davinci_mdio: mdio@4a101000 {
 453                                 compatible = "ti,davinci_mdio";
 454                                 #address-cells = <1>;
 455                                 #size-cells = <0>;
 456                                 ti,hwmods = "davinci_mdio";
 457                                 bus_freq = <1000000>;
 458                                 reg = <0x4a101000 0x100>;
 459                         };
 460
 461                         cpsw_emac0: slave@4a100200 {
 462                                 /* Filled in by U-Boot */
 463                                 mac-address = [ 00 00 00 00 00 00 ];
 464                         };
 465
 466                         cpsw_emac1: slave@4a100300 {
 467                                 /* Filled in by U-Boot */
 468                                 mac-address = [ 00 00 00 00 00 00 ];
 469                         };
 470                 };
 471
 472                 ocmcram: ocmcram@40300000 {
 473                         compatible = "ti,am3352-ocmcram";
 474                         reg = <0x40300000 0x10000>;
 475                         ti,hwmods = "ocmcram";
 476                         ti,no_idle_on_suspend;
 477                 };
 478
 479                 wkup_m3: wkup_m3@44d00000 {
 480                         compatible = "ti,am3353-wkup-m3";
 481                         reg = <0x44d00000 0x4000        /* M3 UMEM */
 482                                0x44d80000 0x2000>;      /* M3 DMEM */
 483                         ti,hwmods = "wkup_m3";
 484                 };
 485         };
 486 };