2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>;
31 ethernet0 = &cpsw_emac0;
32 ethernet1 = &cpsw_emac1;
40 compatible = "arm,cortex-a9";
44 clocks = <&dpll_mpu_ck>;
47 clock-latency = <300000>; /* From omap-cpufreq driver */
51 gic: interrupt-controller@48241000 {
52 compatible = "arm,cortex-a9-gic";
54 #interrupt-cells = <3>;
55 reg = <0x48241000 0x1000>,
57 interrupt-parent = <&gic>;
60 wakeupgen: interrupt-controller@48281000 {
61 compatible = "ti,omap4-wugen-mpu";
63 #interrupt-cells = <3>;
64 reg = <0x48281000 0x1000>;
65 interrupt-parent = <&gic>;
69 compatible = "arm,cortex-a9-scu";
70 reg = <0x48240000 0x100>;
73 global_timer: timer@48240200 {
74 compatible = "arm,cortex-a9-global-timer";
75 reg = <0x48240200 0x100>;
76 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
77 interrupt-parent = <&gic>;
78 clocks = <&mpu_periphclk>;
81 local_timer: timer@48240600 {
82 compatible = "arm,cortex-a9-twd-timer";
83 reg = <0x48240600 0x100>;
84 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
85 interrupt-parent = <&gic>;
86 clocks = <&mpu_periphclk>;
89 l2-cache-controller@48242000 {
90 compatible = "arm,pl310-cache";
91 reg = <0x48242000 0x1000>;
97 compatible = "ti,am4372-l3-noc", "simple-bus";
101 ti,hwmods = "l3_main";
102 reg = <0x44000000 0x400000
103 0x44800000 0x400000>;
104 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
105 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
107 l4_wkup: l4_wkup@44c00000 {
108 compatible = "ti,am4-l4-wkup", "simple-bus";
109 #address-cells = <1>;
111 ranges = <0 0x44c00000 0x287000>;
113 wkup_m3: wkup_m3@100000 {
114 compatible = "ti,am4372-wkup-m3";
115 reg = <0x100000 0x4000>,
117 reg-names = "umem", "dmem";
118 ti,hwmods = "wkup_m3";
119 ti,pm-firmware = "am335x-pm-firmware.elf";
123 compatible = "ti,am4-prcm";
124 reg = <0x1f0000 0x11000>;
125 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
127 prcm_clocks: clocks {
128 #address-cells = <1>;
132 prcm_clockdomains: clockdomains {
137 compatible = "ti,am4-scm", "simple-bus";
138 reg = <0x210000 0x4000>;
139 #address-cells = <1>;
141 ranges = <0 0x210000 0x4000>;
143 am43xx_pinmux: pinmux@800 {
144 compatible = "ti,am437-padconf",
147 #address-cells = <1>;
149 #interrupt-cells = <1>;
150 interrupt-controller;
151 pinctrl-single,register-width = <32>;
152 pinctrl-single,function-mask = <0xffffffff>;
155 scm_conf: scm_conf@0 {
156 compatible = "syscon";
158 #address-cells = <1>;
162 #address-cells = <1>;
167 wkup_m3_ipc: wkup_m3_ipc@1324 {
168 compatible = "ti,am4372-wkup-m3-ipc";
170 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
171 ti,rproc = <&wkup_m3>;
172 mboxes = <&mailbox &mbox_wkupm3>;
175 edma_xbar: dma-router@f90 {
176 compatible = "ti,am335x-edma-crossbar";
180 dma-masters = <&edma>;
183 scm_clockdomains: clockdomains {
188 emif: emif@4c000000 {
189 compatible = "ti,emif-am4372";
190 reg = <0x4c000000 0x1000000>;
194 edma: edma@49000000 {
195 compatible = "ti,edma3-tpcc";
197 reg = <0x49000000 0x10000>;
198 reg-names = "edma3_cc";
199 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
200 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
201 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
202 interrupt-names = "edma3_ccint", "emda3_mperr",
207 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
210 ti,edma-memcpy-channels = <32 33>;
213 edma_tptc0: tptc@49800000 {
214 compatible = "ti,edma3-tptc";
216 reg = <0x49800000 0x100000>;
217 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
218 interrupt-names = "edma3_tcerrint";
221 edma_tptc1: tptc@49900000 {
222 compatible = "ti,edma3-tptc";
224 reg = <0x49900000 0x100000>;
225 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
226 interrupt-names = "edma3_tcerrint";
229 edma_tptc2: tptc@49a00000 {
230 compatible = "ti,edma3-tptc";
232 reg = <0x49a00000 0x100000>;
233 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
234 interrupt-names = "edma3_tcerrint";
237 uart0: serial@44e09000 {
238 compatible = "ti,am4372-uart","ti,omap2-uart";
239 reg = <0x44e09000 0x2000>;
240 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
244 uart1: serial@48022000 {
245 compatible = "ti,am4372-uart","ti,omap2-uart";
246 reg = <0x48022000 0x2000>;
247 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
252 uart2: serial@48024000 {
253 compatible = "ti,am4372-uart","ti,omap2-uart";
254 reg = <0x48024000 0x2000>;
255 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
260 uart3: serial@481a6000 {
261 compatible = "ti,am4372-uart","ti,omap2-uart";
262 reg = <0x481a6000 0x2000>;
263 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
268 uart4: serial@481a8000 {
269 compatible = "ti,am4372-uart","ti,omap2-uart";
270 reg = <0x481a8000 0x2000>;
271 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
276 uart5: serial@481aa000 {
277 compatible = "ti,am4372-uart","ti,omap2-uart";
278 reg = <0x481aa000 0x2000>;
279 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
284 mailbox: mailbox@480C8000 {
285 compatible = "ti,omap4-mailbox";
286 reg = <0x480C8000 0x200>;
287 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
288 ti,hwmods = "mailbox";
290 ti,mbox-num-users = <4>;
291 ti,mbox-num-fifos = <8>;
292 mbox_wkupm3: wkup_m3 {
294 ti,mbox-tx = <0 0 0>;
295 ti,mbox-rx = <0 0 3>;
299 timer1: timer@44e31000 {
300 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
301 reg = <0x44e31000 0x400>;
302 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
304 ti,hwmods = "timer1";
307 timer2: timer@48040000 {
308 compatible = "ti,am4372-timer","ti,am335x-timer";
309 reg = <0x48040000 0x400>;
310 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
311 ti,hwmods = "timer2";
314 timer3: timer@48042000 {
315 compatible = "ti,am4372-timer","ti,am335x-timer";
316 reg = <0x48042000 0x400>;
317 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
318 ti,hwmods = "timer3";
322 timer4: timer@48044000 {
323 compatible = "ti,am4372-timer","ti,am335x-timer";
324 reg = <0x48044000 0x400>;
325 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
327 ti,hwmods = "timer4";
331 timer5: timer@48046000 {
332 compatible = "ti,am4372-timer","ti,am335x-timer";
333 reg = <0x48046000 0x400>;
334 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
336 ti,hwmods = "timer5";
340 timer6: timer@48048000 {
341 compatible = "ti,am4372-timer","ti,am335x-timer";
342 reg = <0x48048000 0x400>;
343 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
345 ti,hwmods = "timer6";
349 timer7: timer@4804a000 {
350 compatible = "ti,am4372-timer","ti,am335x-timer";
351 reg = <0x4804a000 0x400>;
352 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
354 ti,hwmods = "timer7";
358 timer8: timer@481c1000 {
359 compatible = "ti,am4372-timer","ti,am335x-timer";
360 reg = <0x481c1000 0x400>;
361 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
362 ti,hwmods = "timer8";
366 timer9: timer@4833d000 {
367 compatible = "ti,am4372-timer","ti,am335x-timer";
368 reg = <0x4833d000 0x400>;
369 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
370 ti,hwmods = "timer9";
374 timer10: timer@4833f000 {
375 compatible = "ti,am4372-timer","ti,am335x-timer";
376 reg = <0x4833f000 0x400>;
377 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
378 ti,hwmods = "timer10";
382 timer11: timer@48341000 {
383 compatible = "ti,am4372-timer","ti,am335x-timer";
384 reg = <0x48341000 0x400>;
385 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
386 ti,hwmods = "timer11";
390 counter32k: counter@44e86000 {
391 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
392 reg = <0x44e86000 0x40>;
393 ti,hwmods = "counter_32k";
397 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
399 reg = <0x44e3e000 0x1000>;
400 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
401 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
403 clocks = <&clk_32768_ck>;
404 clock-names = "int-clk";
409 compatible = "ti,am4372-wdt","ti,omap3-wdt";
410 reg = <0x44e35000 0x1000>;
411 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
412 ti,hwmods = "wd_timer2";
415 gpio0: gpio@44e07000 {
416 compatible = "ti,am4372-gpio","ti,omap4-gpio";
417 reg = <0x44e07000 0x1000>;
418 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
421 interrupt-controller;
422 #interrupt-cells = <2>;
427 gpio1: gpio@4804c000 {
428 compatible = "ti,am4372-gpio","ti,omap4-gpio";
429 reg = <0x4804c000 0x1000>;
430 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
433 interrupt-controller;
434 #interrupt-cells = <2>;
439 gpio2: gpio@481ac000 {
440 compatible = "ti,am4372-gpio","ti,omap4-gpio";
441 reg = <0x481ac000 0x1000>;
442 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
445 interrupt-controller;
446 #interrupt-cells = <2>;
451 gpio3: gpio@481ae000 {
452 compatible = "ti,am4372-gpio","ti,omap4-gpio";
453 reg = <0x481ae000 0x1000>;
454 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
457 interrupt-controller;
458 #interrupt-cells = <2>;
463 gpio4: gpio@48320000 {
464 compatible = "ti,am4372-gpio","ti,omap4-gpio";
465 reg = <0x48320000 0x1000>;
466 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
469 interrupt-controller;
470 #interrupt-cells = <2>;
475 gpio5: gpio@48322000 {
476 compatible = "ti,am4372-gpio","ti,omap4-gpio";
477 reg = <0x48322000 0x1000>;
478 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
481 interrupt-controller;
482 #interrupt-cells = <2>;
487 hwspinlock: spinlock@480ca000 {
488 compatible = "ti,omap4-hwspinlock";
489 reg = <0x480ca000 0x1000>;
490 ti,hwmods = "spinlock";
495 compatible = "ti,am4372-i2c","ti,omap4-i2c";
496 reg = <0x44e0b000 0x1000>;
497 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
499 #address-cells = <1>;
505 compatible = "ti,am4372-i2c","ti,omap4-i2c";
506 reg = <0x4802a000 0x1000>;
507 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
509 #address-cells = <1>;
515 compatible = "ti,am4372-i2c","ti,omap4-i2c";
516 reg = <0x4819c000 0x1000>;
517 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
519 #address-cells = <1>;
525 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
526 reg = <0x48030000 0x400>;
527 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
529 #address-cells = <1>;
535 compatible = "ti,omap4-hsmmc";
536 reg = <0x48060000 0x1000>;
539 ti,needs-special-reset;
542 dma-names = "tx", "rx";
543 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
548 compatible = "ti,omap4-hsmmc";
549 reg = <0x481d8000 0x1000>;
551 ti,needs-special-reset;
554 dma-names = "tx", "rx";
555 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
560 compatible = "ti,omap4-hsmmc";
561 reg = <0x47810000 0x1000>;
563 ti,needs-special-reset;
564 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
569 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
570 reg = <0x481a0000 0x400>;
571 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
573 #address-cells = <1>;
579 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
580 reg = <0x481a2000 0x400>;
581 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
583 #address-cells = <1>;
589 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
590 reg = <0x481a4000 0x400>;
591 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
593 #address-cells = <1>;
599 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
600 reg = <0x48345000 0x400>;
601 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
603 #address-cells = <1>;
608 mac: ethernet@4a100000 {
609 compatible = "ti,am4372-cpsw","ti,cpsw";
610 reg = <0x4a100000 0x800
612 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
613 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
614 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
615 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
616 #address-cells = <1>;
618 ti,hwmods = "cpgmac0";
619 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
620 <&dpll_clksel_mac_clk>;
621 clock-names = "fck", "cpts", "50mclk";
622 assigned-clocks = <&dpll_clksel_mac_clk>;
623 assigned-clock-rates = <50000000>;
625 cpdma_channels = <8>;
626 ale_entries = <1024>;
627 bd_ram_size = <0x2000>;
630 mac_control = <0x20>;
633 cpts_clock_mult = <0x80000000>;
634 cpts_clock_shift = <29>;
636 syscon = <&scm_conf>;
638 davinci_mdio: mdio@4a101000 {
639 compatible = "ti,am4372-mdio","ti,davinci_mdio";
640 reg = <0x4a101000 0x100>;
641 #address-cells = <1>;
643 ti,hwmods = "davinci_mdio";
644 bus_freq = <1000000>;
648 cpsw_emac0: slave@4a100200 {
649 /* Filled in by U-Boot */
650 mac-address = [ 00 00 00 00 00 00 ];
653 cpsw_emac1: slave@4a100300 {
654 /* Filled in by U-Boot */
655 mac-address = [ 00 00 00 00 00 00 ];
658 phy_sel: cpsw-phy-sel@44e10650 {
659 compatible = "ti,am43xx-cpsw-phy-sel";
660 reg= <0x44e10650 0x4>;
661 reg-names = "gmii-sel";
665 epwmss0: epwmss@48300000 {
666 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
667 reg = <0x48300000 0x10>;
668 #address-cells = <1>;
671 ti,hwmods = "epwmss0";
674 ecap0: ecap@48300100 {
675 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
677 reg = <0x48300100 0x80>;
682 ehrpwm0: ehrpwm@48300200 {
683 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
685 reg = <0x48300200 0x80>;
686 ti,hwmods = "ehrpwm0";
691 epwmss1: epwmss@48302000 {
692 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
693 reg = <0x48302000 0x10>;
694 #address-cells = <1>;
697 ti,hwmods = "epwmss1";
700 ecap1: ecap@48302100 {
701 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
703 reg = <0x48302100 0x80>;
708 ehrpwm1: ehrpwm@48302200 {
709 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
711 reg = <0x48302200 0x80>;
712 ti,hwmods = "ehrpwm1";
717 epwmss2: epwmss@48304000 {
718 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
719 reg = <0x48304000 0x10>;
720 #address-cells = <1>;
723 ti,hwmods = "epwmss2";
726 ecap2: ecap@48304100 {
727 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
729 reg = <0x48304100 0x80>;
734 ehrpwm2: ehrpwm@48304200 {
735 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
737 reg = <0x48304200 0x80>;
738 ti,hwmods = "ehrpwm2";
743 epwmss3: epwmss@48306000 {
744 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
745 reg = <0x48306000 0x10>;
746 #address-cells = <1>;
749 ti,hwmods = "epwmss3";
752 ehrpwm3: ehrpwm@48306200 {
753 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
755 reg = <0x48306200 0x80>;
756 ti,hwmods = "ehrpwm3";
761 epwmss4: epwmss@48308000 {
762 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
763 reg = <0x48308000 0x10>;
764 #address-cells = <1>;
767 ti,hwmods = "epwmss4";
770 ehrpwm4: ehrpwm@48308200 {
771 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
773 reg = <0x48308200 0x80>;
774 ti,hwmods = "ehrpwm4";
779 epwmss5: epwmss@4830a000 {
780 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
781 reg = <0x4830a000 0x10>;
782 #address-cells = <1>;
785 ti,hwmods = "epwmss5";
788 ehrpwm5: ehrpwm@4830a200 {
789 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
791 reg = <0x4830a200 0x80>;
792 ti,hwmods = "ehrpwm5";
797 tscadc: tscadc@44e0d000 {
798 compatible = "ti,am3359-tscadc";
799 reg = <0x44e0d000 0x1000>;
800 ti,hwmods = "adc_tsc";
801 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
802 clocks = <&adc_tsc_fck>;
807 compatible = "ti,am3359-tsc";
811 #io-channel-cells = <1>;
812 compatible = "ti,am3359-adc";
817 sham: sham@53100000 {
818 compatible = "ti,omap5-sham";
820 reg = <0x53100000 0x300>;
823 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
827 compatible = "ti,omap4-aes";
829 reg = <0x53501000 0xa0>;
830 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
833 dma-names = "tx", "rx";
837 compatible = "ti,omap4-des";
839 reg = <0x53701000 0xa0>;
840 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
843 dma-names = "tx", "rx";
846 mcasp0: mcasp@48038000 {
847 compatible = "ti,am33xx-mcasp-audio";
848 ti,hwmods = "mcasp0";
849 reg = <0x48038000 0x2000>,
850 <0x46000000 0x400000>;
851 reg-names = "mpu", "dat";
852 interrupts = <80>, <81>;
853 interrupt-names = "tx", "rx";
857 dma-names = "tx", "rx";
860 mcasp1: mcasp@4803C000 {
861 compatible = "ti,am33xx-mcasp-audio";
862 ti,hwmods = "mcasp1";
863 reg = <0x4803C000 0x2000>,
864 <0x46400000 0x400000>;
865 reg-names = "mpu", "dat";
866 interrupts = <82>, <83>;
867 interrupt-names = "tx", "rx";
871 dma-names = "tx", "rx";
875 compatible = "ti,am3352-elm";
876 reg = <0x48080000 0x2000>;
877 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
879 clocks = <&l4ls_gclk>;
884 gpmc: gpmc@50000000 {
885 compatible = "ti,am3352-gpmc";
889 clocks = <&l3s_gclk>;
891 reg = <0x50000000 0x2000>;
892 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
894 gpmc,num-waitpins = <2>;
895 #address-cells = <2>;
897 interrupt-controller;
898 #interrupt-cells = <2>;
902 ocp2scp0: ocp2scp@483a8000 {
903 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
904 #address-cells = <1>;
907 ti,hwmods = "ocp2scp0";
909 usb2_phy1: phy@483a8000 {
910 compatible = "ti,am437x-usb2";
911 reg = <0x483a8000 0x8000>;
912 syscon-phy-power = <&scm_conf 0x620>;
913 clocks = <&usb_phy0_always_on_clk32k>,
914 <&usb_otg_ss0_refclk960m>;
915 clock-names = "wkupclk", "refclk";
921 ocp2scp1: ocp2scp@483e8000 {
922 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
923 #address-cells = <1>;
926 ti,hwmods = "ocp2scp1";
928 usb2_phy2: phy@483e8000 {
929 compatible = "ti,am437x-usb2";
930 reg = <0x483e8000 0x8000>;
931 syscon-phy-power = <&scm_conf 0x628>;
932 clocks = <&usb_phy1_always_on_clk32k>,
933 <&usb_otg_ss1_refclk960m>;
934 clock-names = "wkupclk", "refclk";
940 dwc3_1: omap_dwc3@48380000 {
941 compatible = "ti,am437x-dwc3";
942 ti,hwmods = "usb_otg_ss0";
943 reg = <0x48380000 0x10000>;
944 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
945 #address-cells = <1>;
951 compatible = "synopsys,dwc3";
952 reg = <0x48390000 0x10000>;
953 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
954 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
955 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
956 interrupt-names = "peripheral",
960 phy-names = "usb2-phy";
961 maximum-speed = "high-speed";
964 snps,dis_u3_susphy_quirk;
965 snps,dis_u2_susphy_quirk;
969 dwc3_2: omap_dwc3@483c0000 {
970 compatible = "ti,am437x-dwc3";
971 ti,hwmods = "usb_otg_ss1";
972 reg = <0x483c0000 0x10000>;
973 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
974 #address-cells = <1>;
980 compatible = "synopsys,dwc3";
981 reg = <0x483d0000 0x10000>;
982 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
983 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
984 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
985 interrupt-names = "peripheral",
989 phy-names = "usb2-phy";
990 maximum-speed = "high-speed";
993 snps,dis_u3_susphy_quirk;
994 snps,dis_u2_susphy_quirk;
998 qspi: qspi@47900000 {
999 compatible = "ti,am4372-qspi";
1000 reg = <0x47900000 0x100>,
1001 <0x30000000 0x4000000>;
1002 reg-names = "qspi_base", "qspi_mmap";
1003 #address-cells = <1>;
1006 interrupts = <0 138 0x4>;
1008 status = "disabled";
1012 compatible = "ti,am4372-hdq";
1013 reg = <0x48347000 0x1000>;
1014 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
1015 clocks = <&func_12m_clk>;
1016 clock-names = "fck";
1017 ti,hwmods = "hdq1w";
1018 status = "disabled";
1022 compatible = "ti,omap3-dss";
1023 reg = <0x4832a000 0x200>;
1024 status = "disabled";
1025 ti,hwmods = "dss_core";
1026 clocks = <&disp_clk>;
1027 clock-names = "fck";
1028 #address-cells = <1>;
1032 dispc: dispc@4832a400 {
1033 compatible = "ti,omap3-dispc";
1034 reg = <0x4832a400 0x400>;
1035 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1036 ti,hwmods = "dss_dispc";
1037 clocks = <&disp_clk>;
1038 clock-names = "fck";
1041 rfbi: rfbi@4832a800 {
1042 compatible = "ti,omap3-rfbi";
1043 reg = <0x4832a800 0x100>;
1044 ti,hwmods = "dss_rfbi";
1045 clocks = <&disp_clk>;
1046 clock-names = "fck";
1047 status = "disabled";
1051 ocmcram: ocmcram@40300000 {
1052 compatible = "mmio-sram";
1053 reg = <0x40300000 0x40000>; /* 256k */
1056 dcan0: can@481cc000 {
1057 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1058 ti,hwmods = "d_can0";
1059 clocks = <&dcan0_fck>;
1060 clock-names = "fck";
1061 reg = <0x481cc000 0x2000>;
1062 syscon-raminit = <&scm_conf 0x644 0>;
1063 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1064 status = "disabled";
1067 dcan1: can@481d0000 {
1068 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1069 ti,hwmods = "d_can1";
1070 clocks = <&dcan1_fck>;
1071 clock-names = "fck";
1072 reg = <0x481d0000 0x2000>;
1073 syscon-raminit = <&scm_conf 0x644 1>;
1074 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1075 status = "disabled";
1078 vpfe0: vpfe@48326000 {
1079 compatible = "ti,am437x-vpfe";
1080 reg = <0x48326000 0x2000>;
1081 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1082 ti,hwmods = "vpfe0";
1083 status = "disabled";
1086 vpfe1: vpfe@48328000 {
1087 compatible = "ti,am437x-vpfe";
1088 reg = <0x48328000 0x2000>;
1089 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1090 ti,hwmods = "vpfe1";
1091 status = "disabled";
1096 /include/ "am43xx-clocks.dtsi"