2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>;
31 ethernet0 = &cpsw_emac0;
32 ethernet1 = &cpsw_emac1;
39 compatible = "arm,cortex-a9";
43 clocks = <&dpll_mpu_ck>;
46 clock-latency = <300000>; /* From omap-cpufreq driver */
50 gic: interrupt-controller@48241000 {
51 compatible = "arm,cortex-a9-gic";
53 #interrupt-cells = <3>;
54 reg = <0x48241000 0x1000>,
56 interrupt-parent = <&gic>;
59 wakeupgen: interrupt-controller@48281000 {
60 compatible = "ti,omap4-wugen-mpu";
62 #interrupt-cells = <3>;
63 reg = <0x48281000 0x1000>;
64 interrupt-parent = <&gic>;
68 compatible = "arm,cortex-a9-scu";
69 reg = <0x48240000 0x100>;
72 global_timer: timer@48240200 {
73 compatible = "arm,cortex-a9-global-timer";
74 reg = <0x48240200 0x100>;
75 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
76 interrupt-parent = <&gic>;
77 clocks = <&dpll_mpu_m2_ck>;
80 local_timer: timer@48240600 {
81 compatible = "arm,cortex-a9-twd-timer";
82 reg = <0x48240600 0x100>;
83 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
84 interrupt-parent = <&gic>;
85 clocks = <&dpll_mpu_m2_ck>;
88 l2-cache-controller@48242000 {
89 compatible = "arm,pl310-cache";
90 reg = <0x48242000 0x1000>;
96 compatible = "ti,am4372-l3-noc", "simple-bus";
100 ti,hwmods = "l3_main";
101 reg = <0x44000000 0x400000
102 0x44800000 0x400000>;
103 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
104 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
106 l4_wkup: l4_wkup@44c00000 {
107 compatible = "ti,am4-l4-wkup", "simple-bus";
108 #address-cells = <1>;
110 ranges = <0 0x44c00000 0x287000>;
112 wkup_m3: wkup_m3@100000 {
113 compatible = "ti,am4372-wkup-m3";
114 reg = <0x100000 0x4000>,
116 reg-names = "umem", "dmem";
117 ti,hwmods = "wkup_m3";
118 ti,pm-firmware = "am335x-pm-firmware.elf";
122 compatible = "ti,am4-prcm";
123 reg = <0x1f0000 0x11000>;
124 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
126 prcm_clocks: clocks {
127 #address-cells = <1>;
131 prcm_clockdomains: clockdomains {
136 compatible = "ti,am4-scm", "simple-bus";
137 reg = <0x210000 0x4000>;
138 #address-cells = <1>;
140 ranges = <0 0x210000 0x4000>;
142 am43xx_pinmux: pinmux@800 {
143 compatible = "ti,am437-padconf",
146 #address-cells = <1>;
148 #interrupt-cells = <1>;
149 interrupt-controller;
150 pinctrl-single,register-width = <32>;
151 pinctrl-single,function-mask = <0xffffffff>;
154 scm_conf: scm_conf@0 {
155 compatible = "syscon";
157 #address-cells = <1>;
161 #address-cells = <1>;
166 wkup_m3_ipc: wkup_m3_ipc@1324 {
167 compatible = "ti,am4372-wkup-m3-ipc";
169 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
170 ti,rproc = <&wkup_m3>;
171 mboxes = <&mailbox &mbox_wkupm3>;
174 scm_clockdomains: clockdomains {
179 emif: emif@4c000000 {
180 compatible = "ti,emif-am4372";
181 reg = <0x4c000000 0x1000000>;
185 edma: edma@49000000 {
186 compatible = "ti,edma3";
187 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
188 reg = <0x49000000 0x10000>,
190 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
192 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
196 uart0: serial@44e09000 {
197 compatible = "ti,am4372-uart","ti,omap2-uart";
198 reg = <0x44e09000 0x2000>;
199 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
203 uart1: serial@48022000 {
204 compatible = "ti,am4372-uart","ti,omap2-uart";
205 reg = <0x48022000 0x2000>;
206 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
211 uart2: serial@48024000 {
212 compatible = "ti,am4372-uart","ti,omap2-uart";
213 reg = <0x48024000 0x2000>;
214 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
219 uart3: serial@481a6000 {
220 compatible = "ti,am4372-uart","ti,omap2-uart";
221 reg = <0x481a6000 0x2000>;
222 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
227 uart4: serial@481a8000 {
228 compatible = "ti,am4372-uart","ti,omap2-uart";
229 reg = <0x481a8000 0x2000>;
230 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
235 uart5: serial@481aa000 {
236 compatible = "ti,am4372-uart","ti,omap2-uart";
237 reg = <0x481aa000 0x2000>;
238 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
243 mailbox: mailbox@480C8000 {
244 compatible = "ti,omap4-mailbox";
245 reg = <0x480C8000 0x200>;
246 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
247 ti,hwmods = "mailbox";
249 ti,mbox-num-users = <4>;
250 ti,mbox-num-fifos = <8>;
251 mbox_wkupm3: wkup_m3 {
252 ti,mbox-tx = <0 0 0>;
253 ti,mbox-rx = <0 0 3>;
257 timer1: timer@44e31000 {
258 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
259 reg = <0x44e31000 0x400>;
260 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
262 ti,hwmods = "timer1";
265 timer2: timer@48040000 {
266 compatible = "ti,am4372-timer","ti,am335x-timer";
267 reg = <0x48040000 0x400>;
268 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
269 ti,hwmods = "timer2";
272 timer3: timer@48042000 {
273 compatible = "ti,am4372-timer","ti,am335x-timer";
274 reg = <0x48042000 0x400>;
275 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
276 ti,hwmods = "timer3";
280 timer4: timer@48044000 {
281 compatible = "ti,am4372-timer","ti,am335x-timer";
282 reg = <0x48044000 0x400>;
283 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
285 ti,hwmods = "timer4";
289 timer5: timer@48046000 {
290 compatible = "ti,am4372-timer","ti,am335x-timer";
291 reg = <0x48046000 0x400>;
292 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
294 ti,hwmods = "timer5";
298 timer6: timer@48048000 {
299 compatible = "ti,am4372-timer","ti,am335x-timer";
300 reg = <0x48048000 0x400>;
301 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
303 ti,hwmods = "timer6";
307 timer7: timer@4804a000 {
308 compatible = "ti,am4372-timer","ti,am335x-timer";
309 reg = <0x4804a000 0x400>;
310 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
312 ti,hwmods = "timer7";
316 timer8: timer@481c1000 {
317 compatible = "ti,am4372-timer","ti,am335x-timer";
318 reg = <0x481c1000 0x400>;
319 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
320 ti,hwmods = "timer8";
324 timer9: timer@4833d000 {
325 compatible = "ti,am4372-timer","ti,am335x-timer";
326 reg = <0x4833d000 0x400>;
327 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
328 ti,hwmods = "timer9";
332 timer10: timer@4833f000 {
333 compatible = "ti,am4372-timer","ti,am335x-timer";
334 reg = <0x4833f000 0x400>;
335 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
336 ti,hwmods = "timer10";
340 timer11: timer@48341000 {
341 compatible = "ti,am4372-timer","ti,am335x-timer";
342 reg = <0x48341000 0x400>;
343 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
344 ti,hwmods = "timer11";
348 counter32k: counter@44e86000 {
349 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
350 reg = <0x44e86000 0x40>;
351 ti,hwmods = "counter_32k";
355 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
357 reg = <0x44e3e000 0x1000>;
358 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
365 compatible = "ti,am4372-wdt","ti,omap3-wdt";
366 reg = <0x44e35000 0x1000>;
367 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
368 ti,hwmods = "wd_timer2";
371 gpio0: gpio@44e07000 {
372 compatible = "ti,am4372-gpio","ti,omap4-gpio";
373 reg = <0x44e07000 0x1000>;
374 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
377 interrupt-controller;
378 #interrupt-cells = <2>;
383 gpio1: gpio@4804c000 {
384 compatible = "ti,am4372-gpio","ti,omap4-gpio";
385 reg = <0x4804c000 0x1000>;
386 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
389 interrupt-controller;
390 #interrupt-cells = <2>;
395 gpio2: gpio@481ac000 {
396 compatible = "ti,am4372-gpio","ti,omap4-gpio";
397 reg = <0x481ac000 0x1000>;
398 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
401 interrupt-controller;
402 #interrupt-cells = <2>;
407 gpio3: gpio@481ae000 {
408 compatible = "ti,am4372-gpio","ti,omap4-gpio";
409 reg = <0x481ae000 0x1000>;
410 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
413 interrupt-controller;
414 #interrupt-cells = <2>;
419 gpio4: gpio@48320000 {
420 compatible = "ti,am4372-gpio","ti,omap4-gpio";
421 reg = <0x48320000 0x1000>;
422 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
425 interrupt-controller;
426 #interrupt-cells = <2>;
431 gpio5: gpio@48322000 {
432 compatible = "ti,am4372-gpio","ti,omap4-gpio";
433 reg = <0x48322000 0x1000>;
434 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
437 interrupt-controller;
438 #interrupt-cells = <2>;
443 hwspinlock: spinlock@480ca000 {
444 compatible = "ti,omap4-hwspinlock";
445 reg = <0x480ca000 0x1000>;
446 ti,hwmods = "spinlock";
451 compatible = "ti,am4372-i2c","ti,omap4-i2c";
452 reg = <0x44e0b000 0x1000>;
453 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
455 #address-cells = <1>;
461 compatible = "ti,am4372-i2c","ti,omap4-i2c";
462 reg = <0x4802a000 0x1000>;
463 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
465 #address-cells = <1>;
471 compatible = "ti,am4372-i2c","ti,omap4-i2c";
472 reg = <0x4819c000 0x1000>;
473 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
475 #address-cells = <1>;
481 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
482 reg = <0x48030000 0x400>;
483 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
485 #address-cells = <1>;
491 compatible = "ti,omap4-hsmmc";
492 reg = <0x48060000 0x1000>;
495 ti,needs-special-reset;
498 dma-names = "tx", "rx";
499 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
504 compatible = "ti,omap4-hsmmc";
505 reg = <0x481d8000 0x1000>;
507 ti,needs-special-reset;
510 dma-names = "tx", "rx";
511 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
516 compatible = "ti,omap4-hsmmc";
517 reg = <0x47810000 0x1000>;
519 ti,needs-special-reset;
520 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
525 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
526 reg = <0x481a0000 0x400>;
527 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
529 #address-cells = <1>;
535 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
536 reg = <0x481a2000 0x400>;
537 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
539 #address-cells = <1>;
545 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
546 reg = <0x481a4000 0x400>;
547 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
549 #address-cells = <1>;
555 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
556 reg = <0x48345000 0x400>;
557 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
559 #address-cells = <1>;
564 mac: ethernet@4a100000 {
565 compatible = "ti,am4372-cpsw","ti,cpsw";
566 reg = <0x4a100000 0x800
568 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
569 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
570 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
571 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
572 #address-cells = <1>;
574 ti,hwmods = "cpgmac0";
575 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
576 <&dpll_clksel_mac_clk>;
577 clock-names = "fck", "cpts", "50mclk";
578 assigned-clocks = <&dpll_clksel_mac_clk>;
579 assigned-clock-rates = <50000000>;
581 cpdma_channels = <8>;
582 ale_entries = <1024>;
583 bd_ram_size = <0x2000>;
586 mac_control = <0x20>;
589 cpts_clock_mult = <0x80000000>;
590 cpts_clock_shift = <29>;
593 davinci_mdio: mdio@4a101000 {
594 compatible = "ti,am4372-mdio","ti,davinci_mdio";
595 reg = <0x4a101000 0x100>;
596 #address-cells = <1>;
598 ti,hwmods = "davinci_mdio";
599 bus_freq = <1000000>;
603 cpsw_emac0: slave@4a100200 {
604 /* Filled in by U-Boot */
605 mac-address = [ 00 00 00 00 00 00 ];
608 cpsw_emac1: slave@4a100300 {
609 /* Filled in by U-Boot */
610 mac-address = [ 00 00 00 00 00 00 ];
613 phy_sel: cpsw-phy-sel@44e10650 {
614 compatible = "ti,am43xx-cpsw-phy-sel";
615 reg= <0x44e10650 0x4>;
616 reg-names = "gmii-sel";
620 epwmss0: epwmss@48300000 {
621 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
622 reg = <0x48300000 0x10>;
623 #address-cells = <1>;
626 ti,hwmods = "epwmss0";
629 ecap0: ecap@48300100 {
630 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
632 reg = <0x48300100 0x80>;
637 ehrpwm0: ehrpwm@48300200 {
638 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
640 reg = <0x48300200 0x80>;
641 ti,hwmods = "ehrpwm0";
646 epwmss1: epwmss@48302000 {
647 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
648 reg = <0x48302000 0x10>;
649 #address-cells = <1>;
652 ti,hwmods = "epwmss1";
655 ecap1: ecap@48302100 {
656 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
658 reg = <0x48302100 0x80>;
663 ehrpwm1: ehrpwm@48302200 {
664 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
666 reg = <0x48302200 0x80>;
667 ti,hwmods = "ehrpwm1";
672 epwmss2: epwmss@48304000 {
673 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
674 reg = <0x48304000 0x10>;
675 #address-cells = <1>;
678 ti,hwmods = "epwmss2";
681 ecap2: ecap@48304100 {
682 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
684 reg = <0x48304100 0x80>;
689 ehrpwm2: ehrpwm@48304200 {
690 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
692 reg = <0x48304200 0x80>;
693 ti,hwmods = "ehrpwm2";
698 epwmss3: epwmss@48306000 {
699 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
700 reg = <0x48306000 0x10>;
701 #address-cells = <1>;
704 ti,hwmods = "epwmss3";
707 ehrpwm3: ehrpwm@48306200 {
708 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
710 reg = <0x48306200 0x80>;
711 ti,hwmods = "ehrpwm3";
716 epwmss4: epwmss@48308000 {
717 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
718 reg = <0x48308000 0x10>;
719 #address-cells = <1>;
722 ti,hwmods = "epwmss4";
725 ehrpwm4: ehrpwm@48308200 {
726 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
728 reg = <0x48308200 0x80>;
729 ti,hwmods = "ehrpwm4";
734 epwmss5: epwmss@4830a000 {
735 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
736 reg = <0x4830a000 0x10>;
737 #address-cells = <1>;
740 ti,hwmods = "epwmss5";
743 ehrpwm5: ehrpwm@4830a200 {
744 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
746 reg = <0x4830a200 0x80>;
747 ti,hwmods = "ehrpwm5";
752 tscadc: tscadc@44e0d000 {
753 compatible = "ti,am3359-tscadc";
754 reg = <0x44e0d000 0x1000>;
755 ti,hwmods = "adc_tsc";
756 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
757 clocks = <&adc_tsc_fck>;
762 compatible = "ti,am3359-tsc";
766 #io-channel-cells = <1>;
767 compatible = "ti,am3359-adc";
772 sham: sham@53100000 {
773 compatible = "ti,omap5-sham";
775 reg = <0x53100000 0x300>;
778 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
782 compatible = "ti,omap4-aes";
784 reg = <0x53501000 0xa0>;
785 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
788 dma-names = "tx", "rx";
792 compatible = "ti,omap4-des";
794 reg = <0x53701000 0xa0>;
795 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
798 dma-names = "tx", "rx";
801 mcasp0: mcasp@48038000 {
802 compatible = "ti,am33xx-mcasp-audio";
803 ti,hwmods = "mcasp0";
804 reg = <0x48038000 0x2000>,
805 <0x46000000 0x400000>;
806 reg-names = "mpu", "dat";
807 interrupts = <80>, <81>;
808 interrupt-names = "tx", "rx";
812 dma-names = "tx", "rx";
815 mcasp1: mcasp@4803C000 {
816 compatible = "ti,am33xx-mcasp-audio";
817 ti,hwmods = "mcasp1";
818 reg = <0x4803C000 0x2000>,
819 <0x46400000 0x400000>;
820 reg-names = "mpu", "dat";
821 interrupts = <82>, <83>;
822 interrupt-names = "tx", "rx";
826 dma-names = "tx", "rx";
830 compatible = "ti,am3352-elm";
831 reg = <0x48080000 0x2000>;
832 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
834 clocks = <&l4ls_gclk>;
839 gpmc: gpmc@50000000 {
840 compatible = "ti,am3352-gpmc";
842 clocks = <&l3s_gclk>;
844 reg = <0x50000000 0x2000>;
845 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
847 gpmc,num-waitpins = <2>;
848 #address-cells = <2>;
853 am43xx_control_usb2phy1: control-phy@44e10620 {
854 compatible = "ti,control-phy-usb2-am437";
855 reg = <0x44e10620 0x4>;
859 am43xx_control_usb2phy2: control-phy@0x44e10628 {
860 compatible = "ti,control-phy-usb2-am437";
861 reg = <0x44e10628 0x4>;
865 ocp2scp0: ocp2scp@483a8000 {
866 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
867 #address-cells = <1>;
870 ti,hwmods = "ocp2scp0";
872 usb2_phy1: phy@483a8000 {
873 compatible = "ti,am437x-usb2";
874 reg = <0x483a8000 0x8000>;
875 ctrl-module = <&am43xx_control_usb2phy1>;
876 clocks = <&usb_phy0_always_on_clk32k>,
877 <&usb_otg_ss0_refclk960m>;
878 clock-names = "wkupclk", "refclk";
884 ocp2scp1: ocp2scp@483e8000 {
885 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
886 #address-cells = <1>;
889 ti,hwmods = "ocp2scp1";
891 usb2_phy2: phy@483e8000 {
892 compatible = "ti,am437x-usb2";
893 reg = <0x483e8000 0x8000>;
894 ctrl-module = <&am43xx_control_usb2phy2>;
895 clocks = <&usb_phy1_always_on_clk32k>,
896 <&usb_otg_ss1_refclk960m>;
897 clock-names = "wkupclk", "refclk";
903 dwc3_1: omap_dwc3@48380000 {
904 compatible = "ti,am437x-dwc3";
905 ti,hwmods = "usb_otg_ss0";
906 reg = <0x48380000 0x10000>;
907 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
908 #address-cells = <1>;
914 compatible = "synopsys,dwc3";
915 reg = <0x48390000 0x10000>;
916 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
917 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
918 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
919 interrupt-names = "peripheral",
923 phy-names = "usb2-phy";
924 maximum-speed = "high-speed";
927 snps,dis_u3_susphy_quirk;
928 snps,dis_u2_susphy_quirk;
932 dwc3_2: omap_dwc3@483c0000 {
933 compatible = "ti,am437x-dwc3";
934 ti,hwmods = "usb_otg_ss1";
935 reg = <0x483c0000 0x10000>;
936 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
937 #address-cells = <1>;
943 compatible = "synopsys,dwc3";
944 reg = <0x483d0000 0x10000>;
945 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
946 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
947 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
948 interrupt-names = "peripheral",
952 phy-names = "usb2-phy";
953 maximum-speed = "high-speed";
956 snps,dis_u3_susphy_quirk;
957 snps,dis_u2_susphy_quirk;
961 qspi: qspi@47900000 {
962 compatible = "ti,am4372-qspi";
963 reg = <0x47900000 0x100>;
964 #address-cells = <1>;
967 interrupts = <0 138 0x4>;
973 compatible = "ti,am4372-hdq";
974 reg = <0x48347000 0x1000>;
975 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
976 clocks = <&func_12m_clk>;
983 compatible = "ti,omap3-dss";
984 reg = <0x4832a000 0x200>;
986 ti,hwmods = "dss_core";
987 clocks = <&disp_clk>;
989 #address-cells = <1>;
993 dispc: dispc@4832a400 {
994 compatible = "ti,omap3-dispc";
995 reg = <0x4832a400 0x400>;
996 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
997 ti,hwmods = "dss_dispc";
998 clocks = <&disp_clk>;
1002 rfbi: rfbi@4832a800 {
1003 compatible = "ti,omap3-rfbi";
1004 reg = <0x4832a800 0x100>;
1005 ti,hwmods = "dss_rfbi";
1006 clocks = <&disp_clk>;
1007 clock-names = "fck";
1008 status = "disabled";
1012 ocmcram: ocmcram@40300000 {
1013 compatible = "mmio-sram";
1014 reg = <0x40300000 0x40000>; /* 256k */
1017 dcan0: can@481cc000 {
1018 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1019 ti,hwmods = "d_can0";
1020 clocks = <&dcan0_fck>;
1021 clock-names = "fck";
1022 reg = <0x481cc000 0x2000>;
1023 syscon-raminit = <&scm_conf 0x644 0>;
1024 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1025 status = "disabled";
1028 dcan1: can@481d0000 {
1029 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1030 ti,hwmods = "d_can1";
1031 clocks = <&dcan1_fck>;
1032 clock-names = "fck";
1033 reg = <0x481d0000 0x2000>;
1034 syscon-raminit = <&scm_conf 0x644 1>;
1035 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1036 status = "disabled";
1039 vpfe0: vpfe@48326000 {
1040 compatible = "ti,am437x-vpfe";
1041 reg = <0x48326000 0x2000>;
1042 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1043 ti,hwmods = "vpfe0";
1044 status = "disabled";
1047 vpfe1: vpfe@48328000 {
1048 compatible = "ti,am437x-vpfe";
1049 reg = <0x48328000 0x2000>;
1050 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1051 ti,hwmods = "vpfe1";
1052 status = "disabled";
1057 /include/ "am43xx-clocks.dtsi"