2 * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
4 * Copyright (C) 2012 Marvell
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Ben Dooks <ben.dooks@codethink.co.uk>
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
15 * This file contains the definitions that are common to the Armada
16 * 370 and Armada XP SoC.
19 /include/ "skeleton64.dtsi"
22 model = "Marvell Armada 370 and XP SoC";
23 compatible = "marvell,armada-370-xp";
29 compatible = "marvell,sheeva-v7";
38 compatible = "simple-bus";
39 interrupt-parent = <&mpic>;
40 ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
41 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
44 compatible = "simple-bus";
49 mpic: interrupt-controller@20000 {
50 compatible = "marvell,mpic";
51 #interrupt-cells = <1>;
56 coherency-fabric@20200 {
57 compatible = "marvell,coherency-fabric";
58 reg = <0x20200 0xb0>, <0x21810 0x1c>;
62 compatible = "snps,dw-apb-uart";
63 reg = <0x12000 0x100>;
70 compatible = "snps,dw-apb-uart";
71 reg = <0x12100 0x100>;
79 compatible = "marvell,armada-370-xp-timer";
80 reg = <0x20300 0x30>, <0x21040 0x30>;
81 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
82 clocks = <&coreclk 2>;
86 compatible = "marvell,orion-sata";
87 reg = <0xa0000 0x2400>;
89 clocks = <&gateclk 15>, <&gateclk 30>;
90 clock-names = "0", "1";
97 compatible = "marvell,orion-mdio";
102 compatible = "marvell,armada-370-neta";
103 reg = <0x70000 0x2500>;
105 clocks = <&gateclk 4>;
110 compatible = "marvell,armada-370-neta";
111 reg = <0x74000 0x2500>;
113 clocks = <&gateclk 3>;
118 compatible = "marvell,mv64xxx-i2c";
119 reg = <0x11000 0x20>;
120 #address-cells = <1>;
124 clocks = <&coreclk 0>;
129 compatible = "marvell,mv64xxx-i2c";
130 reg = <0x11100 0x20>;
131 #address-cells = <1>;
135 clocks = <&coreclk 0>;
140 compatible = "marvell,orion-rtc";
141 reg = <0x10300 0x20>;
146 compatible = "marvell,orion-sdio";
147 reg = <0xd4000 0x200>;
149 clocks = <&gateclk 17>;
158 compatible = "marvell,orion-ehci";
159 reg = <0x50000 0x500>;
165 compatible = "marvell,orion-ehci";
166 reg = <0x51000 0x500>;
172 compatible = "marvell,orion-spi";
173 reg = <0x10600 0x28>;
174 #address-cells = <1>;
178 clocks = <&coreclk 0>;
183 compatible = "marvell,orion-spi";
184 reg = <0x10680 0x28>;
185 #address-cells = <1>;
189 clocks = <&coreclk 0>;
193 devbus-bootcs@10400 {
194 compatible = "marvell,mvebu-devbus";
196 #address-cells = <1>;
198 clocks = <&coreclk 0>;
203 compatible = "marvell,mvebu-devbus";
205 #address-cells = <1>;
207 clocks = <&coreclk 0>;
212 compatible = "marvell,mvebu-devbus";
214 #address-cells = <1>;
216 clocks = <&coreclk 0>;
221 compatible = "marvell,mvebu-devbus";
223 #address-cells = <1>;
225 clocks = <&coreclk 0>;
230 compatible = "marvell,mvebu-devbus";
232 #address-cells = <1>;
234 clocks = <&coreclk 0>;