2 * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
4 * Copyright (C) 2012 Marvell
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Ben Dooks <ben.dooks@codethink.co.uk>
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
15 * This file contains the definitions that are common to the Armada
16 * 370 and Armada XP SoC.
19 /include/ "skeleton64.dtsi"
22 model = "Marvell Armada 370 and XP SoC";
23 compatible = "marvell,armada-370-xp";
27 compatible = "marvell,sheeva-v7";
34 compatible = "simple-bus";
35 interrupt-parent = <&mpic>;
36 ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
37 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
40 compatible = "simple-bus";
45 mpic: interrupt-controller@20000 {
46 compatible = "marvell,mpic";
47 #interrupt-cells = <1>;
52 coherency-fabric@20200 {
53 compatible = "marvell,coherency-fabric";
54 reg = <0x20200 0xb0>, <0x21810 0x1c>;
58 compatible = "snps,dw-apb-uart";
59 reg = <0x12000 0x100>;
66 compatible = "snps,dw-apb-uart";
67 reg = <0x12100 0x100>;
75 compatible = "marvell,armada-370-xp-timer";
76 reg = <0x20300 0x30>, <0x21040 0x30>;
77 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
78 clocks = <&coreclk 2>;
82 compatible = "marvell,orion-sata";
83 reg = <0xa0000 0x2400>;
85 clocks = <&gateclk 15>, <&gateclk 30>;
86 clock-names = "0", "1";
93 compatible = "marvell,orion-mdio";
98 compatible = "marvell,armada-370-neta";
99 reg = <0x70000 0x2500>;
101 clocks = <&gateclk 4>;
106 compatible = "marvell,armada-370-neta";
107 reg = <0x74000 0x2500>;
109 clocks = <&gateclk 3>;
114 compatible = "marvell,mv64xxx-i2c";
115 reg = <0x11000 0x20>;
116 #address-cells = <1>;
120 clocks = <&coreclk 0>;
125 compatible = "marvell,mv64xxx-i2c";
126 reg = <0x11100 0x20>;
127 #address-cells = <1>;
131 clocks = <&coreclk 0>;
136 compatible = "marvell,orion-rtc";
137 reg = <0x10300 0x20>;
142 compatible = "marvell,orion-sdio";
143 reg = <0xd4000 0x200>;
145 clocks = <&gateclk 17>;
150 compatible = "marvell,orion-ehci";
151 reg = <0x50000 0x500>;
157 compatible = "marvell,orion-ehci";
158 reg = <0x51000 0x500>;
164 compatible = "marvell,orion-spi";
165 reg = <0x10600 0x28>;
166 #address-cells = <1>;
170 clocks = <&coreclk 0>;
175 compatible = "marvell,orion-spi";
176 reg = <0x10680 0x28>;
177 #address-cells = <1>;
181 clocks = <&coreclk 0>;
185 devbus-bootcs@10400 {
186 compatible = "marvell,mvebu-devbus";
188 #address-cells = <1>;
190 clocks = <&coreclk 0>;
195 compatible = "marvell,mvebu-devbus";
197 #address-cells = <1>;
199 clocks = <&coreclk 0>;
204 compatible = "marvell,mvebu-devbus";
206 #address-cells = <1>;
208 clocks = <&coreclk 0>;
213 compatible = "marvell,mvebu-devbus";
215 #address-cells = <1>;
217 clocks = <&coreclk 0>;
222 compatible = "marvell,mvebu-devbus";
224 #address-cells = <1>;
226 clocks = <&coreclk 0>;