arch/arm/boot/dts/armada-388-clearfog.dts

   1 /*
   2  * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
   3  *
   4  *  Copyright (C) 2015 Russell King
   5  *
   6  * This board is in development; the contents of this file work with
   7  * the A1 rev 2.0 of the board, which does not represent final
   8  * production board.  Things will change, don't expect this file to
   9  * remain compatible info the future.
  10  *
  11  * This file is dual-licensed: you can use it either under the terms
  12  * of the GPL or the X11 license, at your option. Note that this dual
  13  * licensing only applies to this file, and not this project as a
  14  * whole.
  15  *
  16  *  a) This file is free software; you can redistribute it and/or
  17  *     modify it under the terms of the GNU General Public License
  18  *     version 2 as published by the Free Software Foundation.
  19  *
  20  *     This file is distributed in the hope that it will be useful,
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively,
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use,
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 /dts-v1/;
  50 #include "armada-388-clearfog.dtsi"
  51
  52 / {
  53         model = "SolidRun Clearfog A1";
  54         compatible = "solidrun,clearfog-a1", "marvell,armada388",
  55                 "marvell,armada385", "marvell,armada380";
  56
  57         soc {
  58                 internal-regs {
  59                         usb3@f0000 {
  60                                 /* CON2, nearest CPU, USB2 only. */
  61                                 status = "okay";
  62                         };
  63                 };
  64
  65                 pcie-controller {
  66                         pcie@3,0 {
  67                                 /* Port 2, Lane 0. CON2, nearest CPU. */
  68                                 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
  69                                 status = "okay";
  70                         };
  71                 };
  72         };
  73
  74         dsa@0 {
  75                 compatible = "marvell,dsa";
  76                 dsa,ethernet = <&eth1>;
  77                 dsa,mii-bus = <&mdio>;
  78                 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
  79                 pinctrl-names = "default";
  80                 #address-cells = <2>;
  81                 #size-cells = <0>;
  82
  83                 switch@0 {
  84                         #address-cells = <1>;
  85                         #size-cells = <0>;
  86                         reg = <4 0>;
  87
  88                         port@0 {
  89                                 reg = <0>;
  90                                 label = "lan5";
  91                         };
  92
  93                         port@1 {
  94                                 reg = <1>;
  95                                 label = "lan4";
  96                         };
  97
  98                         port@2 {
  99                                 reg = <2>;
 100                                 label = "lan3";
 101                         };
 102
 103                         port@3 {
 104                                 reg = <3>;
 105                                 label = "lan2";
 106                         };
 107
 108                         port@4 {
 109                                 reg = <4>;
 110                                 label = "lan1";
 111                         };
 112
 113                         port@5 {
 114                                 reg = <5>;
 115                                 label = "cpu";
 116                         };
 117
 118                         port@6 {
 119                                 /* 88E1512 external phy */
 120                                 reg = <6>;
 121                                 label = "lan6";
 122                                 fixed-link {
 123                                         speed = <1000>;
 124                                         full-duplex;
 125                                 };
 126                         };
 127                 };
 128         };
 129 };
 130
 131 &eth1 {
 132         /* ethernet@30000 */
 133         fixed-link {
 134                 speed = <1000>;
 135                 full-duplex;
 136         };
 137 };
 138
 139 &expander0 {
 140         /*
 141          * PCA9655 GPIO expander:
 142          *  0-CON3 CLKREQ#
 143          *  1-CON3 PERST#
 144          *  2-CON2 PERST#
 145          *  3-CON3 W_DISABLE
 146          *  4-CON2 CLKREQ#
 147          *  5-USB3 overcurrent
 148          *  6-USB3 power
 149          *  7-CON2 W_DISABLE
 150          *  8-JP4 P1
 151          *  9-JP4 P4
 152          * 10-JP4 P5
 153          * 11-m.2 DEVSLP
 154          * 12-SFP_LOS
 155          * 13-SFP_TX_FAULT
 156          * 14-SFP_TX_DISABLE
 157          * 15-SFP_MOD_DEF0
 158          */
 159         pcie2_0_clkreq {
 160                 gpio-hog;
 161                 gpios = <4 GPIO_ACTIVE_LOW>;
 162                 input;
 163                 line-name = "pcie2.0-clkreq";
 164         };
 165         pcie2_0_w_disable {
 166                 gpio-hog;
 167                 gpios = <7 GPIO_ACTIVE_LOW>;
 168                 output-low;
 169                 line-name = "pcie2.0-w-disable";
 170         };
 171 };
 172
 173 &pinctrl {
 174         clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
 175                 marvell,pins = "mpp46";
 176                 marvell,function = "ref";
 177         };
 178         clearfog_dsa0_pins: clearfog-dsa0-pins {
 179                 marvell,pins = "mpp23", "mpp41";
 180                 marvell,function = "gpio";
 181         };
 182         clearfog_spi1_cs_pins: spi1-cs-pins {
 183                 marvell,pins = "mpp55";
 184                 marvell,function = "spi1";
 185         };
 186 };
 187
 188 &spi1 {
 189         /*
 190          * Add SPI CS pins for clearfog:
 191          * CS0: W25Q32 (not populated on uSOM)
 192          * CS1:
 193          * CS2: mikrobus
 194          */
 195         pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
 196 };