arch/arm/boot/dts/armada-388-clearfog.dtsi

   1 /*
   2  * Device Tree include file for SolidRun Clearfog 88F6828 based boards
   3  *
   4  *  Copyright (C) 2015 Russell King
   5  *
   6  * This board is in development; the contents of this file work with
   7  * the A1 rev 2.0 of the board, which does not represent final
   8  * production board.  Things will change, don't expect this file to
   9  * remain compatible info the future.
  10  *
  11  * This file is dual-licensed: you can use it either under the terms
  12  * of the GPL or the X11 license, at your option. Note that this dual
  13  * licensing only applies to this file, and not this project as a
  14  * whole.
  15  *
  16  *  a) This file is free software; you can redistribute it and/or
  17  *     modify it under the terms of the GNU General Public License
  18  *     version 2 as published by the Free Software Foundation.
  19  *
  20  *     This file is distributed in the hope that it will be useful
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 #include "armada-388.dtsi"
  50 #include "armada-38x-solidrun-microsom.dtsi"
  51
  52 / {
  53         aliases {
  54                 /* So that mvebu u-boot can update the MAC addresses */
  55                 ethernet1 = &eth0;
  56                 ethernet2 = &eth1;
  57                 ethernet3 = &eth2;
  58         };
  59
  60         chosen {
  61                 stdout-path = "serial0:115200n8";
  62         };
  63
  64         reg_3p3v: regulator-3p3v {
  65                 compatible = "regulator-fixed";
  66                 regulator-name = "3P3V";
  67                 regulator-min-microvolt = <3300000>;
  68                 regulator-max-microvolt = <3300000>;
  69                 regulator-always-on;
  70         };
  71
  72         soc {
  73                 internal-regs {
  74                         ethernet@30000 {
  75                                 phy-mode = "sgmii";
  76                                 buffer-manager = <&bm>;
  77                                 bm,pool-long = <2>;
  78                                 bm,pool-short = <1>;
  79                                 status = "okay";
  80
  81                                 fixed-link {
  82                                         speed = <1000>;
  83                                         full-duplex;
  84                                 };
  85                         };
  86
  87                         ethernet@34000 {
  88                                 phy-mode = "sgmii";
  89                                 buffer-manager = <&bm>;
  90                                 bm,pool-long = <3>;
  91                                 bm,pool-short = <1>;
  92                                 status = "okay";
  93
  94                                 fixed-link {
  95                                         speed = <1000>;
  96                                         full-duplex;
  97                                 };
  98                         };
  99
 100                         i2c@11000 {
 101                                 /* Is there anything on this? */
 102                                 clock-frequency = <100000>;
 103                                 pinctrl-0 = <&i2c0_pins>;
 104                                 pinctrl-names = "default";
 105                                 status = "okay";
 106
 107                                 /*
 108                                  * PCA9655 GPIO expander, up to 1MHz clock.
 109                                  *  0-CON3 CLKREQ#
 110                                  *  1-CON3 PERST#
 111                                  *  2-CON2 PERST#
 112                                  *  3-CON3 W_DISABLE
 113                                  *  4-CON2 CLKREQ#
 114                                  *  5-USB3 overcurrent
 115                                  *  6-USB3 power
 116                                  *  7-CON2 W_DISABLE
 117                                  *  8-JP4 P1
 118                                  *  9-JP4 P4
 119                                  * 10-JP4 P5
 120                                  * 11-m.2 DEVSLP
 121                                  * 12-SFP_LOS
 122                                  * 13-SFP_TX_FAULT
 123                                  * 14-SFP_TX_DISABLE
 124                                  * 15-SFP_MOD_DEF0
 125                                  */
 126                                 expander0: gpio-expander@20 {
 127                                         /*
 128                                          * This is how it should be:
 129                                          * compatible = "onnn,pca9655",
 130                                          *       "nxp,pca9555";
 131                                          * but you can't do this because of
 132                                          * the way I2C works.
 133                                          */
 134                                         compatible = "nxp,pca9555";
 135                                         gpio-controller;
 136                                         #gpio-cells = <2>;
 137                                         reg = <0x20>;
 138
 139                                         pcie1_0_clkreq {
 140                                                 gpio-hog;
 141                                                 gpios = <0 GPIO_ACTIVE_LOW>;
 142                                                 input;
 143                                                 line-name = "pcie1.0-clkreq";
 144                                         };
 145                                         pcie1_0_w_disable {
 146                                                 gpio-hog;
 147                                                 gpios = <3 GPIO_ACTIVE_LOW>;
 148                                                 output-low;
 149                                                 line-name = "pcie1.0-w-disable";
 150                                         };
 151                                         pcie2_0_clkreq {
 152                                                 gpio-hog;
 153                                                 gpios = <4 GPIO_ACTIVE_LOW>;
 154                                                 input;
 155                                                 line-name = "pcie2.0-clkreq";
 156                                         };
 157                                         pcie2_0_w_disable {
 158                                                 gpio-hog;
 159                                                 gpios = <7 GPIO_ACTIVE_LOW>;
 160                                                 output-low;
 161                                                 line-name = "pcie2.0-w-disable";
 162                                         };
 163                                         usb3_ilimit {
 164                                                 gpio-hog;
 165                                                 gpios = <5 GPIO_ACTIVE_LOW>;
 166                                                 input;
 167                                                 line-name = "usb3-current-limit";
 168                                         };
 169                                         usb3_power {
 170                                                 gpio-hog;
 171                                                 gpios = <6 GPIO_ACTIVE_HIGH>;
 172                                                 output-high;
 173                                                 line-name = "usb3-power";
 174                                         };
 175                                         m2_devslp {
 176                                                 gpio-hog;
 177                                                 gpios = <11 GPIO_ACTIVE_HIGH>;
 178                                                 output-low;
 179                                                 line-name = "m.2 devslp";
 180                                         };
 181                                         sfp_los {
 182                                                 /* SFP loss of signal */
 183                                                 gpio-hog;
 184                                                 gpios = <12 GPIO_ACTIVE_HIGH>;
 185                                                 input;
 186                                                 line-name = "sfp-los";
 187                                         };
 188                                         sfp_tx_fault {
 189                                                 /* SFP laser fault */
 190                                                 gpio-hog;
 191                                                 gpios = <13 GPIO_ACTIVE_HIGH>;
 192                                                 input;
 193                                                 line-name = "sfp-tx-fault";
 194                                         };
 195                                         sfp_tx_disable {
 196                                                 /* SFP transmit disable */
 197                                                 gpio-hog;
 198                                                 gpios = <14 GPIO_ACTIVE_HIGH>;
 199                                                 output-low;
 200                                                 line-name = "sfp-tx-disable";
 201                                         };
 202                                         sfp_mod_def0 {
 203                                                 /* SFP module present */
 204                                                 gpio-hog;
 205                                                 gpios = <15 GPIO_ACTIVE_LOW>;
 206                                                 input;
 207                                                 line-name = "sfp-mod-def0";
 208                                         };
 209                                 };
 210
 211                                 /* The MCP3021 is 100kHz clock only */
 212                                 mikrobus_adc: mcp3021@4c {
 213                                         compatible = "microchip,mcp3021";
 214                                         reg = <0x4c>;
 215                                 };
 216
 217                                 /* Also something at 0x64 */
 218                         };
 219
 220                         i2c@11100 {
 221                                 /*
 222                                  * Routed to SFP, mikrobus, and PCIe.
 223                                  * SFP limits this to 100kHz, and requires
 224                                  *  an AT24C01A/02/04 with address pins tied
 225                                  *  low, which takes addresses 0x50 and 0x51.
 226                                  * Mikrobus doesn't specify beyond an I2C
 227                                  *  bus being present.
 228                                  * PCIe uses ARP to assign addresses, or
 229                                  *  0x63-0x64.
 230                                  */
 231                                 clock-frequency = <100000>;
 232                                 pinctrl-0 = <&clearfog_i2c1_pins>;
 233                                 pinctrl-names = "default";
 234                                 status = "okay";
 235                         };
 236
 237                         pinctrl@18000 {
 238                                 clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
 239                                         marvell,pins = "mpp46";
 240                                         marvell,function = "ref";
 241                                 };
 242                                 clearfog_dsa0_pins: clearfog-dsa0-pins {
 243                                         marvell,pins = "mpp23", "mpp41";
 244                                         marvell,function = "gpio";
 245                                 };
 246                                 clearfog_i2c1_pins: i2c1-pins {
 247                                         /* SFP, PCIe, mSATA, mikrobus */
 248                                         marvell,pins = "mpp26", "mpp27";
 249                                         marvell,function = "i2c1";
 250                                 };
 251                                 clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
 252                                         marvell,pins = "mpp20";
 253                                         marvell,function = "gpio";
 254                                 };
 255                                 clearfog_spi1_cs_pins: spi1-cs-pins {
 256                                         marvell,pins = "mpp55";
 257                                         marvell,function = "spi1";
 258                                 };
 259                                 mikro_pins: mikro-pins {
 260                                         /* int: mpp22 rst: mpp29 */
 261                                         marvell,pins = "mpp22", "mpp29";
 262                                         marvell,function = "gpio";
 263                                 };
 264                                 mikro_spi_pins: mikro-spi-pins {
 265                                         marvell,pins = "mpp43";
 266                                         marvell,function = "spi1";
 267                                 };
 268                                 mikro_uart_pins: mikro-uart-pins {
 269                                         marvell,pins = "mpp24", "mpp25";
 270                                         marvell,function = "ua1";
 271                                 };
 272                                 rear_button_pins: rear-button-pins {
 273                                         marvell,pins = "mpp34";
 274                                         marvell,function = "gpio";
 275                                 };
 276                         };
 277
 278                         sata@a8000 {
 279                                 /* pinctrl? */
 280                                 status = "okay";
 281                         };
 282
 283                         sata@e0000 {
 284                                 /* pinctrl? */
 285                                 status = "okay";
 286                         };
 287
 288                         sdhci@d8000 {
 289                                 bus-width = <4>;
 290                                 cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
 291                                 no-1-8-v;
 292                                 pinctrl-0 = <&microsom_sdhci_pins
 293                                              &clearfog_sdhci_cd_pins>;
 294                                 pinctrl-names = "default";
 295                                 status = "okay";
 296                                 vmmc = <&reg_3p3v>;
 297                                 wp-inverted;
 298                         };
 299
 300                         serial@12100 {
 301                                 /* mikrobus uart */
 302                                 pinctrl-0 = <&mikro_uart_pins>;
 303                                 pinctrl-names = "default";
 304                                 status = "okay";
 305                         };
 306
 307                         usb@58000 {
 308                                 /* CON3, nearest  power. */
 309                                 status = "okay";
 310                         };
 311
 312                         usb3@f0000 {
 313                                 /* CON2, nearest CPU, USB2 only. */
 314                                 status = "okay";
 315                         };
 316
 317                         usb3@f8000 {
 318                                 /* CON7 */
 319                                 status = "okay";
 320                         };
 321                 };
 322
 323                 pcie-controller {
 324                         status = "okay";
 325                         /*
 326                          * The two PCIe units are accessible through
 327                          * the mini-PCIe connectors on the board.
 328                          */
 329                         pcie@2,0 {
 330                                 /* Port 1, Lane 0. CON3, nearest power. */
 331                                 reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
 332                                 status = "okay";
 333                         };
 334                         pcie@3,0 {
 335                                 /* Port 2, Lane 0. CON2, nearest CPU. */
 336                                 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
 337                                 status = "okay";
 338                         };
 339                 };
 340         };
 341
 342         dsa@0 {
 343                 compatible = "marvell,dsa";
 344                 dsa,ethernet = <&eth1>;
 345                 dsa,mii-bus = <&mdio>;
 346                 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
 347                 pinctrl-names = "default";
 348                 #address-cells = <2>;
 349                 #size-cells = <0>;
 350
 351                 switch@0 {
 352                         #address-cells = <1>;
 353                         #size-cells = <0>;
 354                         reg = <4 0>;
 355
 356                         port@0 {
 357                                 reg = <0>;
 358                                 label = "lan5";
 359                         };
 360
 361                         port@1 {
 362                                 reg = <1>;
 363                                 label = "lan4";
 364                         };
 365
 366                         port@2 {
 367                                 reg = <2>;
 368                                 label = "lan3";
 369                         };
 370
 371                         port@3 {
 372                                 reg = <3>;
 373                                 label = "lan2";
 374                         };
 375
 376                         port@4 {
 377                                 reg = <4>;
 378                                 label = "lan1";
 379                         };
 380
 381                         port@5 {
 382                                 reg = <5>;
 383                                 label = "cpu";
 384                         };
 385
 386                         port@6 {
 387                                 /* 88E1512 external phy */
 388                                 reg = <6>;
 389                                 label = "lan6";
 390                                 fixed-link {
 391                                         speed = <1000>;
 392                                         full-duplex;
 393                                 };
 394                         };
 395                 };
 396         };
 397
 398         gpio-keys {
 399                 compatible = "gpio-keys";
 400                 pinctrl-0 = <&rear_button_pins>;
 401                 pinctrl-names = "default";
 402
 403                 button_0 {
 404                         /* The rear SW3 button */
 405                         label = "Rear Button";
 406                         gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 407                         linux,can-disable;
 408                         linux,code = <BTN_0>;
 409                 };
 410         };
 411 };
 412
 413 &spi1 {
 414         /*
 415          * Add SPI CS pins for clearfog:
 416          * CS0: W25Q32 (not populated on uSOM)
 417          * CS1:
 418          * CS2: mikrobus
 419          */
 420         pinctrl-0 = <&spi1_pins
 421                      &clearfog_spi1_cs_pins
 422                      &mikro_spi_pins>;
 423         pinctrl-names = "default";
 424         status = "okay";
 425 };