arch/arm/boot/dts/armada-388-clearfog.dtsi

   1 /*
   2  * Device Tree include file for SolidRun Clearfog 88F6828 based boards
   3  *
   4  *  Copyright (C) 2015 Russell King
   5  *
   6  * This board is in development; the contents of this file work with
   7  * the A1 rev 2.0 of the board, which does not represent final
   8  * production board.  Things will change, don't expect this file to
   9  * remain compatible info the future.
  10  *
  11  * This file is dual-licensed: you can use it either under the terms
  12  * of the GPL or the X11 license, at your option. Note that this dual
  13  * licensing only applies to this file, and not this project as a
  14  * whole.
  15  *
  16  *  a) This file is free software; you can redistribute it and/or
  17  *     modify it under the terms of the GNU General Public License
  18  *     version 2 as published by the Free Software Foundation.
  19  *
  20  *     This file is distributed in the hope that it will be useful
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 #include "armada-388.dtsi"
  50 #include "armada-38x-solidrun-microsom.dtsi"
  51
  52 / {
  53         aliases {
  54                 /* So that mvebu u-boot can update the MAC addresses */
  55                 ethernet1 = &eth0;
  56                 ethernet2 = &eth1;
  57                 ethernet3 = &eth2;
  58         };
  59
  60         chosen {
  61                 stdout-path = "serial0:115200n8";
  62         };
  63
  64         reg_3p3v: regulator-3p3v {
  65                 compatible = "regulator-fixed";
  66                 regulator-name = "3P3V";
  67                 regulator-min-microvolt = <3300000>;
  68                 regulator-max-microvolt = <3300000>;
  69                 regulator-always-on;
  70         };
  71
  72         soc {
  73                 internal-regs {
  74                         sata@a8000 {
  75                                 /* pinctrl? */
  76                                 status = "okay";
  77                         };
  78
  79                         sata@e0000 {
  80                                 /* pinctrl? */
  81                                 status = "okay";
  82                         };
  83
  84                         sdhci@d8000 {
  85                                 bus-width = <4>;
  86                                 cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
  87                                 no-1-8-v;
  88                                 pinctrl-0 = <&microsom_sdhci_pins
  89                                              &clearfog_sdhci_cd_pins>;
  90                                 pinctrl-names = "default";
  91                                 status = "okay";
  92                                 vmmc = <&reg_3p3v>;
  93                                 wp-inverted;
  94                         };
  95
  96                         serial@12100 {
  97                                 /* mikrobus uart */
  98                                 pinctrl-0 = <&mikro_uart_pins>;
  99                                 pinctrl-names = "default";
 100                                 status = "okay";
 101                         };
 102
 103                         usb@58000 {
 104                                 /* CON3, nearest  power. */
 105                                 status = "okay";
 106                         };
 107
 108                         usb3@f8000 {
 109                                 /* CON7 */
 110                                 status = "okay";
 111                         };
 112                 };
 113
 114                 pcie-controller {
 115                         status = "okay";
 116                         /*
 117                          * The two PCIe units are accessible through
 118                          * the mini-PCIe connectors on the board.
 119                          */
 120                         pcie@2,0 {
 121                                 /* Port 1, Lane 0. CON3, nearest power. */
 122                                 reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
 123                                 status = "okay";
 124                         };
 125                 };
 126         };
 127 };
 128
 129 &eth1 {
 130         /* ethernet@30000 */
 131         bm,pool-long = <2>;
 132         bm,pool-short = <1>;
 133         buffer-manager = <&bm>;
 134         phy-mode = "sgmii";
 135         status = "okay";
 136 };
 137
 138 &eth2 {
 139         /* ethernet@34000 */
 140         bm,pool-long = <3>;
 141         bm,pool-short = <1>;
 142         buffer-manager = <&bm>;
 143         phy-mode = "sgmii";
 144         status = "okay";
 145
 146         fixed-link {
 147                 speed = <1000>;
 148                 full-duplex;
 149         };
 150 };
 151
 152 &i2c0 {
 153         /* Is there anything on this? */
 154         clock-frequency = <100000>;
 155         pinctrl-0 = <&i2c0_pins>;
 156         pinctrl-names = "default";
 157         status = "okay";
 158
 159         /*
 160          * PCA9655 GPIO expander, up to 1MHz clock.
 161          *  0-CON3 CLKREQ#
 162          *  1-CON3 PERST#
 163          *  2-
 164          *  3-CON3 W_DISABLE
 165          *  4-
 166          *  5-USB3 overcurrent
 167          *  6-USB3 power
 168          *  7-
 169          *  8-JP4 P1
 170          *  9-JP4 P4
 171          * 10-JP4 P5
 172          * 11-m.2 DEVSLP
 173          * 12-SFP_LOS
 174          * 13-SFP_TX_FAULT
 175          * 14-SFP_TX_DISABLE
 176          * 15-SFP_MOD_DEF0
 177          */
 178         expander0: gpio-expander@20 {
 179                 /*
 180                  * This is how it should be:
 181                  * compatible = "onnn,pca9655", "nxp,pca9555";
 182                  * but you can't do this because of the way I2C works.
 183                  */
 184                 compatible = "nxp,pca9555";
 185                 gpio-controller;
 186                 #gpio-cells = <2>;
 187                 reg = <0x20>;
 188
 189                 pcie1_0_clkreq {
 190                         gpio-hog;
 191                         gpios = <0 GPIO_ACTIVE_LOW>;
 192                         input;
 193                         line-name = "pcie1.0-clkreq";
 194                 };
 195                 pcie1_0_w_disable {
 196                         gpio-hog;
 197                         gpios = <3 GPIO_ACTIVE_LOW>;
 198                         output-low;
 199                         line-name = "pcie1.0-w-disable";
 200                 };
 201                 usb3_ilimit {
 202                         gpio-hog;
 203                         gpios = <5 GPIO_ACTIVE_LOW>;
 204                         input;
 205                         line-name = "usb3-current-limit";
 206                 };
 207                 usb3_power {
 208                         gpio-hog;
 209                         gpios = <6 GPIO_ACTIVE_HIGH>;
 210                         output-high;
 211                         line-name = "usb3-power";
 212                 };
 213                 m2_devslp {
 214                         gpio-hog;
 215                         gpios = <11 GPIO_ACTIVE_HIGH>;
 216                         output-low;
 217                         line-name = "m.2 devslp";
 218                 };
 219                 sfp_los {
 220                         /* SFP loss of signal */
 221                         gpio-hog;
 222                         gpios = <12 GPIO_ACTIVE_HIGH>;
 223                         input;
 224                         line-name = "sfp-los";
 225                 };
 226                 sfp_tx_fault {
 227                         /* SFP laser fault */
 228                         gpio-hog;
 229                         gpios = <13 GPIO_ACTIVE_HIGH>;
 230                         input;
 231                         line-name = "sfp-tx-fault";
 232                 };
 233                 sfp_tx_disable {
 234                         /* SFP transmit disable */
 235                         gpio-hog;
 236                         gpios = <14 GPIO_ACTIVE_HIGH>;
 237                         output-low;
 238                         line-name = "sfp-tx-disable";
 239                 };
 240                 sfp_mod_def0 {
 241                         /* SFP module present */
 242                         gpio-hog;
 243                         gpios = <15 GPIO_ACTIVE_LOW>;
 244                         input;
 245                         line-name = "sfp-mod-def0";
 246                 };
 247         };
 248
 249         /* The MCP3021 is 100kHz clock only */
 250         mikrobus_adc: mcp3021@4c {
 251                 compatible = "microchip,mcp3021";
 252                 reg = <0x4c>;
 253         };
 254
 255         /* Also something at 0x64 */
 256 };
 257
 258 &i2c1 {
 259         /*
 260          * Routed to SFP, mikrobus, and PCIe.
 261          * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
 262          *  address pins tied low, which takes addresses 0x50 and 0x51.
 263          * Mikrobus doesn't specify beyond an I2C bus being present.
 264          * PCIe uses ARP to assign addresses, or 0x63-0x64.
 265          */
 266         clock-frequency = <100000>;
 267         pinctrl-0 = <&clearfog_i2c1_pins>;
 268         pinctrl-names = "default";
 269         status = "okay";
 270 };
 271
 272 &pinctrl {
 273         clearfog_i2c1_pins: i2c1-pins {
 274                 /* SFP, PCIe, mSATA, mikrobus */
 275                 marvell,pins = "mpp26", "mpp27";
 276                 marvell,function = "i2c1";
 277         };
 278         clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
 279                 marvell,pins = "mpp20";
 280                 marvell,function = "gpio";
 281         };
 282         mikro_pins: mikro-pins {
 283                 /* int: mpp22 rst: mpp29 */
 284                 marvell,pins = "mpp22", "mpp29";
 285                 marvell,function = "gpio";
 286         };
 287         mikro_spi_pins: mikro-spi-pins {
 288                 marvell,pins = "mpp43";
 289                 marvell,function = "spi1";
 290         };
 291         mikro_uart_pins: mikro-uart-pins {
 292                 marvell,pins = "mpp24", "mpp25";
 293                 marvell,function = "ua1";
 294         };
 295 };
 296
 297 &spi1 {
 298         /*
 299          * Add SPI CS pins for clearfog:
 300          * CS0: W25Q32 (not populated on uSOM)
 301          * CS1: PIC microcontroller (Pro models)
 302          * CS2: mikrobus
 303          */
 304         pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
 305         pinctrl-names = "default";
 306         status = "okay";
 307 };