2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
19 model = "Atmel AT91SAM9G45 family SoC";
20 compatible = "atmel,at91sam9g45";
21 interrupt-parent = <&aic>;
47 compatible = "arm,arm926ej-s";
53 reg = <0x70000000 0x10000000>;
57 compatible = "simple-bus";
63 compatible = "simple-bus";
68 aic: interrupt-controller@fffff000 {
69 #interrupt-cells = <3>;
70 compatible = "atmel,at91rm9200-aic";
72 reg = <0xfffff000 0x200>;
73 atmel,external-irqs = <31>;
76 ramc0: ramc@ffffe400 {
77 compatible = "atmel,at91sam9g45-ddramc";
78 reg = <0xffffe400 0x200
83 compatible = "atmel,at91rm9200-pmc";
84 reg = <0xfffffc00 0x100>;
88 compatible = "atmel,at91sam9g45-rstc";
89 reg = <0xfffffd00 0x10>;
93 compatible = "atmel,at91sam9260-pit";
94 reg = <0xfffffd30 0xf>;
95 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
100 compatible = "atmel,at91sam9rl-shdwc";
101 reg = <0xfffffd10 0x10>;
104 tcb0: timer@fff7c000 {
105 compatible = "atmel,at91rm9200-tcb";
106 reg = <0xfff7c000 0x100>;
107 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
110 tcb1: timer@fffd4000 {
111 compatible = "atmel,at91rm9200-tcb";
112 reg = <0xfffd4000 0x100>;
113 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
116 dma: dma-controller@ffffec00 {
117 compatible = "atmel,at91sam9g45-dma";
118 reg = <0xffffec00 0x200>;
119 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
124 #address-cells = <1>;
126 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
127 ranges = <0xfffff200 0xfffff200 0xa00>;
131 0xffffffff 0xffc003ff /* pioA */
132 0xffffffff 0x800f8f00 /* pioB */
133 0xffffffff 0x00000e00 /* pioC */
134 0xffffffff 0xff0c1381 /* pioD */
135 0xffffffff 0x81ffff81 /* pioE */
138 /* shared pinctrl settings */
140 pinctrl_dbgu: dbgu-0 {
142 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
143 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
148 pinctrl_i2c0: i2c0-0 {
150 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
151 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
156 pinctrl_i2c1: i2c1-0 {
158 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
159 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
164 pinctrl_usart0: usart0-0 {
166 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
167 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
170 pinctrl_usart0_rts: usart0_rts-0 {
172 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
175 pinctrl_usart0_cts: usart0_cts-0 {
177 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
182 pinctrl_usart1: usart1-0 {
184 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
185 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
188 pinctrl_usart1_rts: usart1_rts-0 {
190 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
193 pinctrl_usart1_cts: usart1_cts-0 {
195 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
200 pinctrl_usart2: usart2-0 {
202 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
203 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
206 pinctrl_usart2_rts: usart2_rts-0 {
208 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
211 pinctrl_usart2_cts: usart2_cts-0 {
213 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
218 pinctrl_usart3: usart3-0 {
220 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
221 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
224 pinctrl_usart3_rts: usart3_rts-0 {
226 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
229 pinctrl_usart3_cts: usart3_cts-0 {
231 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
236 pinctrl_nand: nand-0 {
238 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
239 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
244 pinctrl_macb_rmii: macb_rmii-0 {
246 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
247 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
248 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
249 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
250 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
251 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
252 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
253 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
254 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
255 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
258 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
260 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
261 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
262 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
263 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
264 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
265 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
266 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
267 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
272 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
274 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
275 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
276 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
279 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
281 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
282 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
283 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
286 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
288 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
289 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
290 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
291 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
296 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
298 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
299 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
300 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
303 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
305 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
306 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
307 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
310 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
312 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
313 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
314 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
315 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
320 pinctrl_ssc0_tx: ssc0_tx-0 {
322 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
323 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
324 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
327 pinctrl_ssc0_rx: ssc0_rx-0 {
329 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
330 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
331 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
336 pinctrl_ssc1_tx: ssc1_tx-0 {
338 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
339 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
340 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
343 pinctrl_ssc1_rx: ssc1_rx-0 {
345 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
346 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
347 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
352 pinctrl_spi0: spi0-0 {
354 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
355 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
356 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
361 pinctrl_spi1: spi1-0 {
363 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
364 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
365 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
370 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
371 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
374 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
375 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
378 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
379 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
382 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
383 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
386 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
387 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
390 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
391 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
394 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
395 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
398 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
399 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
402 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
403 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
408 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
409 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
412 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
413 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
416 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
417 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
420 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
421 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
424 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
425 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
428 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
429 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
432 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
433 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
436 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
437 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
440 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
441 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
448 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
449 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
450 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
451 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
452 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
453 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
454 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
455 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
456 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
457 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
458 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
459 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
460 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
461 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
462 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
463 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
464 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
465 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
466 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
467 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
468 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
469 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
470 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
471 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
472 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
473 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
474 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
475 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
476 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
477 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
481 pioA: gpio@fffff200 {
482 compatible = "atmel,at91rm9200-gpio";
483 reg = <0xfffff200 0x200>;
484 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
487 interrupt-controller;
488 #interrupt-cells = <2>;
491 pioB: gpio@fffff400 {
492 compatible = "atmel,at91rm9200-gpio";
493 reg = <0xfffff400 0x200>;
494 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
497 interrupt-controller;
498 #interrupt-cells = <2>;
501 pioC: gpio@fffff600 {
502 compatible = "atmel,at91rm9200-gpio";
503 reg = <0xfffff600 0x200>;
504 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
507 interrupt-controller;
508 #interrupt-cells = <2>;
511 pioD: gpio@fffff800 {
512 compatible = "atmel,at91rm9200-gpio";
513 reg = <0xfffff800 0x200>;
514 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
517 interrupt-controller;
518 #interrupt-cells = <2>;
521 pioE: gpio@fffffa00 {
522 compatible = "atmel,at91rm9200-gpio";
523 reg = <0xfffffa00 0x200>;
524 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
527 interrupt-controller;
528 #interrupt-cells = <2>;
532 dbgu: serial@ffffee00 {
533 compatible = "atmel,at91sam9260-usart";
534 reg = <0xffffee00 0x200>;
535 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_dbgu>;
541 usart0: serial@fff8c000 {
542 compatible = "atmel,at91sam9260-usart";
543 reg = <0xfff8c000 0x200>;
544 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
547 pinctrl-names = "default";
548 pinctrl-0 = <&pinctrl_usart0>;
552 usart1: serial@fff90000 {
553 compatible = "atmel,at91sam9260-usart";
554 reg = <0xfff90000 0x200>;
555 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usart1>;
563 usart2: serial@fff94000 {
564 compatible = "atmel,at91sam9260-usart";
565 reg = <0xfff94000 0x200>;
566 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
569 pinctrl-names = "default";
570 pinctrl-0 = <&pinctrl_usart2>;
574 usart3: serial@fff98000 {
575 compatible = "atmel,at91sam9260-usart";
576 reg = <0xfff98000 0x200>;
577 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_usart3>;
585 macb0: ethernet@fffbc000 {
586 compatible = "cdns,at32ap7000-macb", "cdns,macb";
587 reg = <0xfffbc000 0x100>;
588 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
589 pinctrl-names = "default";
590 pinctrl-0 = <&pinctrl_macb_rmii>;
595 compatible = "atmel,at91sam9g10-i2c";
596 reg = <0xfff84000 0x100>;
597 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
598 pinctrl-names = "default";
599 pinctrl-0 = <&pinctrl_i2c0>;
600 #address-cells = <1>;
606 compatible = "atmel,at91sam9g10-i2c";
607 reg = <0xfff88000 0x100>;
608 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_i2c1>;
611 #address-cells = <1>;
617 compatible = "atmel,at91sam9g45-ssc";
618 reg = <0xfff9c000 0x4000>;
619 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
626 compatible = "atmel,at91sam9g45-ssc";
627 reg = <0xfffa0000 0x4000>;
628 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
629 pinctrl-names = "default";
630 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
635 compatible = "atmel,at91sam9260-adc";
636 reg = <0xfffb0000 0x100>;
637 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
638 atmel,adc-use-external-triggers;
639 atmel,adc-channels-used = <0xff>;
640 atmel,adc-vref = <3300>;
641 atmel,adc-num-channels = <8>;
642 atmel,adc-startup-time = <40>;
643 atmel,adc-channel-base = <0x30>;
644 atmel,adc-drdy-mask = <0x10000>;
645 atmel,adc-status-register = <0x1c>;
646 atmel,adc-trigger-register = <0x08>;
647 atmel,adc-res = <8 10>;
648 atmel,adc-res-names = "lowres", "highres";
649 atmel,adc-use-res = "highres";
652 trigger-name = "external-rising";
653 trigger-value = <0x1>;
657 trigger-name = "external-falling";
658 trigger-value = <0x2>;
663 trigger-name = "external-any";
664 trigger-value = <0x3>;
669 trigger-name = "continuous";
670 trigger-value = <0x6>;
675 compatible = "atmel,at91sam9rl-pwm";
676 reg = <0xfffb8000 0x300>;
677 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
683 compatible = "atmel,hsmci";
684 reg = <0xfff80000 0x600>;
685 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
686 pinctrl-names = "default";
687 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
689 #address-cells = <1>;
695 compatible = "atmel,hsmci";
696 reg = <0xfffd0000 0x600>;
697 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
698 pinctrl-names = "default";
699 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
701 #address-cells = <1>;
707 compatible = "atmel,at91sam9260-wdt";
708 reg = <0xfffffd40 0x10>;
709 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
710 atmel,watchdog-type = "hardware";
711 atmel,reset-type = "all";
718 #address-cells = <1>;
720 compatible = "atmel,at91rm9200-spi";
721 reg = <0xfffa4000 0x200>;
722 interrupts = <14 4 3>;
723 pinctrl-names = "default";
724 pinctrl-0 = <&pinctrl_spi0>;
729 #address-cells = <1>;
731 compatible = "atmel,at91rm9200-spi";
732 reg = <0xfffa8000 0x200>;
733 interrupts = <15 4 3>;
734 pinctrl-names = "default";
735 pinctrl-0 = <&pinctrl_spi1>;
739 usb2: gadget@fff78000 {
740 #address-cells = <1>;
742 compatible = "atmel,at91sam9rl-udc";
743 reg = <0x00600000 0x80000
745 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
750 atmel,fifo-size = <64>;
751 atmel,nb-banks = <1>;
756 atmel,fifo-size = <1024>;
757 atmel,nb-banks = <2>;
764 atmel,fifo-size = <1024>;
765 atmel,nb-banks = <2>;
772 atmel,fifo-size = <1024>;
773 atmel,nb-banks = <3>;
779 atmel,fifo-size = <1024>;
780 atmel,nb-banks = <3>;
786 atmel,fifo-size = <1024>;
787 atmel,nb-banks = <3>;
794 atmel,fifo-size = <1024>;
795 atmel,nb-banks = <3>;
803 compatible = "atmel,at91sam9g45-lcdc";
804 reg = <0x00500000 0x1000>;
805 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
806 pinctrl-names = "default";
807 pinctrl-0 = <&pinctrl_fb>;
811 nand0: nand@40000000 {
812 compatible = "atmel,at91rm9200-nand";
813 #address-cells = <1>;
815 reg = <0x40000000 0x10000000
818 atmel,nand-addr-offset = <21>;
819 atmel,nand-cmd-offset = <22>;
820 pinctrl-names = "default";
821 pinctrl-0 = <&pinctrl_nand>;
822 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
823 &pioC 14 GPIO_ACTIVE_HIGH
829 usb0: ohci@00700000 {
830 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
831 reg = <0x00700000 0x100000>;
832 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
836 usb1: ehci@00800000 {
837 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
838 reg = <0x00800000 0x100000>;
839 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
845 compatible = "i2c-gpio";
846 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
847 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
849 i2c-gpio,sda-open-drain;
850 i2c-gpio,scl-open-drain;
851 i2c-gpio,delay-us = <5>; /* ~100 kHz */
852 #address-cells = <1>;