2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
39 compatible = "arm,arm926ejs";
44 reg = <0x70000000 0x10000000>;
48 compatible = "simple-bus";
54 compatible = "simple-bus";
59 aic: interrupt-controller@fffff000 {
60 #interrupt-cells = <3>;
61 compatible = "atmel,at91rm9200-aic";
63 reg = <0xfffff000 0x200>;
64 atmel,external-irqs = <31>;
67 ramc0: ramc@ffffe400 {
68 compatible = "atmel,at91sam9g45-ddramc";
69 reg = <0xffffe400 0x200
74 compatible = "atmel,at91rm9200-pmc";
75 reg = <0xfffffc00 0x100>;
79 compatible = "atmel,at91sam9g45-rstc";
80 reg = <0xfffffd00 0x10>;
84 compatible = "atmel,at91sam9260-pit";
85 reg = <0xfffffd30 0xf>;
91 compatible = "atmel,at91sam9rl-shdwc";
92 reg = <0xfffffd10 0x10>;
95 tcb0: timer@fff7c000 {
96 compatible = "atmel,at91rm9200-tcb";
97 reg = <0xfff7c000 0x100>;
98 interrupts = <18 4 0>;
101 tcb1: timer@fffd4000 {
102 compatible = "atmel,at91rm9200-tcb";
103 reg = <0xfffd4000 0x100>;
104 interrupts = <18 4 0>;
107 dma: dma-controller@ffffec00 {
108 compatible = "atmel,at91sam9g45-dma";
109 reg = <0xffffec00 0x200>;
110 interrupts = <21 4 0>;
114 #address-cells = <1>;
116 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
117 ranges = <0xfffff200 0xfffff200 0xa00>;
121 0xffffffff 0xffc003ff /* pioA */
122 0xffffffff 0x800f8f00 /* pioB */
123 0xffffffff 0x00000e00 /* pioC */
124 0xffffffff 0xff0c1381 /* pioD */
125 0xffffffff 0x81ffff81 /* pioE */
128 /* shared pinctrl settings */
130 pinctrl_dbgu: dbgu-0 {
132 <1 12 0x1 0x0 /* PB12 periph A */
133 1 13 0x1 0x0>; /* PB13 periph A */
138 pinctrl_usart0: usart0-0 {
140 <1 19 0x1 0x1 /* PB19 periph A with pullup */
141 1 18 0x1 0x0>; /* PB18 periph A */
144 pinctrl_usart0_rts: usart0_rts-0 {
146 <1 17 0x2 0x0>; /* PB17 periph B */
149 pinctrl_usart0_cts: usart0_cts-0 {
151 <1 15 0x2 0x0>; /* PB15 periph B */
156 pinctrl_usart1: usart1-0 {
158 <1 4 0x1 0x1 /* PB4 periph A with pullup */
159 1 5 0x1 0x0>; /* PB5 periph A */
162 pinctrl_usart1_rts: usart1_rts-0 {
164 <3 16 0x1 0x0>; /* PD16 periph A */
167 pinctrl_usart1_cts: usart1_cts-0 {
169 <3 17 0x1 0x0>; /* PD17 periph A */
174 pinctrl_usart2: usart2-0 {
176 <1 6 0x1 0x1 /* PB6 periph A with pullup */
177 1 7 0x1 0x0>; /* PB7 periph A */
180 pinctrl_usart2_rts: usart2_rts-0 {
182 <2 9 0x2 0x0>; /* PC9 periph B */
185 pinctrl_usart2_cts: usart2_cts-0 {
187 <2 11 0x2 0x0>; /* PC11 periph B */
192 pinctrl_usart3: usart3-0 {
194 <1 8 0x1 0x1 /* PB9 periph A with pullup */
195 1 9 0x1 0x0>; /* PB8 periph A */
198 pinctrl_usart3_rts: usart3_rts-0 {
200 <0 23 0x2 0x0>; /* PA23 periph B */
203 pinctrl_usart3_cts: usart3_cts-0 {
205 <0 24 0x2 0x0>; /* PA24 periph B */
210 pinctrl_nand: nand-0 {
212 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
213 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
218 pinctrl_macb_rmii: macb_rmii-0 {
220 <0 10 0x1 0x0 /* PA10 periph A */
221 0 11 0x1 0x0 /* PA11 periph A */
222 0 12 0x1 0x0 /* PA12 periph A */
223 0 13 0x1 0x0 /* PA13 periph A */
224 0 14 0x1 0x0 /* PA14 periph A */
225 0 15 0x1 0x0 /* PA15 periph A */
226 0 16 0x1 0x0 /* PA16 periph A */
227 0 17 0x1 0x0 /* PA17 periph A */
228 0 18 0x1 0x0 /* PA18 periph A */
229 0 19 0x1 0x0>; /* PA19 periph A */
232 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
234 <0 6 0x2 0x0 /* PA6 periph B */
235 0 7 0x2 0x0 /* PA7 periph B */
236 0 8 0x2 0x0 /* PA8 periph B */
237 0 9 0x2 0x0 /* PA9 periph B */
238 0 27 0x2 0x0 /* PA27 periph B */
239 0 28 0x2 0x0 /* PA28 periph B */
240 0 29 0x2 0x0 /* PA29 periph B */
241 0 30 0x2 0x0>; /* PA30 periph B */
246 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
248 <0 0 0x1 0x0 /* PA0 periph A */
249 0 1 0x1 0x1 /* PA1 periph A with pullup */
250 0 2 0x1 0x1>; /* PA2 periph A with pullup */
253 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
255 <0 3 0x1 0x1 /* PA3 periph A with pullup */
256 0 4 0x1 0x1 /* PA4 periph A with pullup */
257 0 5 0x1 0x1>; /* PA5 periph A with pullup */
260 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
262 <0 6 0x1 0x1 /* PA6 periph A with pullup */
263 0 7 0x1 0x1 /* PA7 periph A with pullup */
264 0 8 0x1 0x1 /* PA8 periph A with pullup */
265 0 9 0x1 0x1>; /* PA9 periph A with pullup */
270 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
272 <0 31 0x1 0x0 /* PA31 periph A */
273 0 22 0x1 0x1 /* PA22 periph A with pullup */
274 0 23 0x1 0x1>; /* PA23 periph A with pullup */
277 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
279 <0 24 0x1 0x1 /* PA24 periph A with pullup */
280 0 25 0x1 0x1 /* PA25 periph A with pullup */
281 0 26 0x1 0x1>; /* PA26 periph A with pullup */
284 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
286 <0 27 0x1 0x1 /* PA27 periph A with pullup */
287 0 28 0x1 0x1 /* PA28 periph A with pullup */
288 0 29 0x1 0x1 /* PA29 periph A with pullup */
289 0 20 0x1 0x1>; /* PA30 periph A with pullup */
294 pinctrl_ssc0_tx: ssc0_tx-0 {
296 <3 0 0x1 0x0 /* PD0 periph A */
297 3 1 0x1 0x0 /* PD1 periph A */
298 3 2 0x1 0x0>; /* PD2 periph A */
301 pinctrl_ssc0_rx: ssc0_rx-0 {
303 <3 3 0x1 0x0 /* PD3 periph A */
304 3 4 0x1 0x0 /* PD4 periph A */
305 3 5 0x1 0x0>; /* PD5 periph A */
310 pinctrl_ssc1_tx: ssc1_tx-0 {
312 <3 10 0x1 0x0 /* PD10 periph A */
313 3 11 0x1 0x0 /* PD11 periph A */
314 3 12 0x1 0x0>; /* PD12 periph A */
317 pinctrl_ssc1_rx: ssc1_rx-0 {
319 <3 13 0x1 0x0 /* PD13 periph A */
320 3 14 0x1 0x0 /* PD14 periph A */
321 3 15 0x1 0x0>; /* PD15 periph A */
326 pinctrl_spi0: spi0-0 {
328 <1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */
329 1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */
330 1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */
335 pinctrl_spi1: spi1-0 {
337 <1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */
338 1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */
339 1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
343 pioA: gpio@fffff200 {
344 compatible = "atmel,at91rm9200-gpio";
345 reg = <0xfffff200 0x200>;
346 interrupts = <2 4 1>;
349 interrupt-controller;
350 #interrupt-cells = <2>;
353 pioB: gpio@fffff400 {
354 compatible = "atmel,at91rm9200-gpio";
355 reg = <0xfffff400 0x200>;
356 interrupts = <3 4 1>;
359 interrupt-controller;
360 #interrupt-cells = <2>;
363 pioC: gpio@fffff600 {
364 compatible = "atmel,at91rm9200-gpio";
365 reg = <0xfffff600 0x200>;
366 interrupts = <4 4 1>;
369 interrupt-controller;
370 #interrupt-cells = <2>;
373 pioD: gpio@fffff800 {
374 compatible = "atmel,at91rm9200-gpio";
375 reg = <0xfffff800 0x200>;
376 interrupts = <5 4 1>;
379 interrupt-controller;
380 #interrupt-cells = <2>;
383 pioE: gpio@fffffa00 {
384 compatible = "atmel,at91rm9200-gpio";
385 reg = <0xfffffa00 0x200>;
386 interrupts = <5 4 1>;
389 interrupt-controller;
390 #interrupt-cells = <2>;
394 dbgu: serial@ffffee00 {
395 compatible = "atmel,at91sam9260-usart";
396 reg = <0xffffee00 0x200>;
397 interrupts = <1 4 7>;
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_dbgu>;
403 usart0: serial@fff8c000 {
404 compatible = "atmel,at91sam9260-usart";
405 reg = <0xfff8c000 0x200>;
406 interrupts = <7 4 5>;
409 pinctrl-names = "default";
410 pinctrl-0 = <&pinctrl_usart0>;
414 usart1: serial@fff90000 {
415 compatible = "atmel,at91sam9260-usart";
416 reg = <0xfff90000 0x200>;
417 interrupts = <8 4 5>;
420 pinctrl-names = "default";
421 pinctrl-0 = <&pinctrl_usart1>;
425 usart2: serial@fff94000 {
426 compatible = "atmel,at91sam9260-usart";
427 reg = <0xfff94000 0x200>;
428 interrupts = <9 4 5>;
431 pinctrl-names = "default";
432 pinctrl-0 = <&pinctrl_usart2>;
436 usart3: serial@fff98000 {
437 compatible = "atmel,at91sam9260-usart";
438 reg = <0xfff98000 0x200>;
439 interrupts = <10 4 5>;
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_usart3>;
447 macb0: ethernet@fffbc000 {
448 compatible = "cdns,at32ap7000-macb", "cdns,macb";
449 reg = <0xfffbc000 0x100>;
450 interrupts = <25 4 3>;
451 pinctrl-names = "default";
452 pinctrl-0 = <&pinctrl_macb_rmii>;
457 compatible = "atmel,at91sam9g10-i2c";
458 reg = <0xfff84000 0x100>;
459 interrupts = <12 4 6>;
460 #address-cells = <1>;
466 compatible = "atmel,at91sam9g10-i2c";
467 reg = <0xfff88000 0x100>;
468 interrupts = <13 4 6>;
469 #address-cells = <1>;
475 compatible = "atmel,at91sam9g45-ssc";
476 reg = <0xfff9c000 0x4000>;
477 interrupts = <16 4 5>;
478 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
484 compatible = "atmel,at91sam9g45-ssc";
485 reg = <0xfffa0000 0x4000>;
486 interrupts = <17 4 5>;
487 pinctrl-names = "default";
488 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
493 compatible = "atmel,at91sam9260-adc";
494 reg = <0xfffb0000 0x100>;
495 interrupts = <20 4 0>;
496 atmel,adc-use-external-triggers;
497 atmel,adc-channels-used = <0xff>;
498 atmel,adc-vref = <3300>;
499 atmel,adc-num-channels = <8>;
500 atmel,adc-startup-time = <40>;
501 atmel,adc-channel-base = <0x30>;
502 atmel,adc-drdy-mask = <0x10000>;
503 atmel,adc-status-register = <0x1c>;
504 atmel,adc-trigger-register = <0x08>;
505 atmel,adc-res = <8 10>;
506 atmel,adc-res-names = "lowres", "highres";
507 atmel,adc-use-res = "highres";
510 trigger-name = "external-rising";
511 trigger-value = <0x1>;
515 trigger-name = "external-falling";
516 trigger-value = <0x2>;
521 trigger-name = "external-any";
522 trigger-value = <0x3>;
527 trigger-name = "continuous";
528 trigger-value = <0x6>;
533 compatible = "atmel,hsmci";
534 reg = <0xfff80000 0x600>;
535 interrupts = <11 4 0>;
536 #address-cells = <1>;
542 compatible = "atmel,hsmci";
543 reg = <0xfffd0000 0x600>;
544 interrupts = <29 4 0>;
545 #address-cells = <1>;
551 compatible = "atmel,at91sam9260-wdt";
552 reg = <0xfffffd40 0x10>;
557 #address-cells = <1>;
559 compatible = "atmel,at91rm9200-spi";
560 reg = <0xfffa4000 0x200>;
561 interrupts = <14 4 3>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_spi0>;
568 #address-cells = <1>;
570 compatible = "atmel,at91rm9200-spi";
571 reg = <0xfffa8000 0x200>;
572 interrupts = <15 4 3>;
573 pinctrl-names = "default";
574 pinctrl-0 = <&pinctrl_spi1>;
579 nand0: nand@40000000 {
580 compatible = "atmel,at91rm9200-nand";
581 #address-cells = <1>;
583 reg = <0x40000000 0x10000000
586 atmel,nand-addr-offset = <21>;
587 atmel,nand-cmd-offset = <22>;
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_nand>;
597 usb0: ohci@00700000 {
598 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
599 reg = <0x00700000 0x100000>;
600 interrupts = <22 4 2>;
604 usb1: ehci@00800000 {
605 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
606 reg = <0x00800000 0x100000>;
607 interrupts = <22 4 2>;
613 compatible = "i2c-gpio";
614 gpios = <&pioA 20 0 /* sda */
617 i2c-gpio,sda-open-drain;
618 i2c-gpio,scl-open-drain;
619 i2c-gpio,delay-us = <5>; /* ~100 kHz */
620 #address-cells = <1>;