2 * DTS file for CSR SiRFatlas6 SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,atlas6";
14 interrupt-parent = <&intc>;
22 d-cache-line-size = <32>;
23 i-cache-line-size = <32>;
24 d-cache-size = <32768>;
25 i-cache-size = <32768>;
27 timebase-frequency = <0>;
29 clock-frequency = <0>;
38 clock-latency = <150000>;
43 compatible = "simple-bus";
46 ranges = <0x40000000 0x40000000 0x80000000>;
48 intc: interrupt-controller@80020000 {
49 #interrupt-cells = <1>;
51 compatible = "sirf,prima2-intc";
52 reg = <0x80020000 0x1000>;
56 compatible = "simple-bus";
59 ranges = <0x88000000 0x88000000 0x40000>;
61 clks: clock-controller@88000000 {
62 compatible = "sirf,atlas6-clkc";
63 reg = <0x88000000 0x1000>;
68 reset-controller@88010000 {
69 compatible = "sirf,prima2-rstc";
70 reg = <0x88010000 0x1000>;
73 rsc-controller@88020000 {
74 compatible = "sirf,prima2-rsc";
75 reg = <0x88020000 0x1000>;
79 compatible = "sirf,prima2-cphifbg";
80 reg = <0x88030000 0x1000>;
86 compatible = "simple-bus";
89 ranges = <0x90000000 0x90000000 0x10000>;
91 memory-controller@90000000 {
92 compatible = "sirf,prima2-memc";
93 reg = <0x90000000 0x2000>;
99 compatible = "sirf,prima2-memcmon";
100 reg = <0x90002000 0x200>;
107 compatible = "simple-bus";
108 #address-cells = <1>;
110 ranges = <0x90010000 0x90010000 0x30000>;
113 compatible = "sirf,prima2-lcd";
114 reg = <0x90010000 0x20000>;
118 /* later transfer to pwm */
119 bl-gpio = <&gpio 7 0>;
120 default-panel = <&panel0>;
124 compatible = "sirf,prima2-vpp";
125 reg = <0x90020000 0x10000>;
132 compatible = "simple-bus";
133 #address-cells = <1>;
135 ranges = <0x98000000 0x98000000 0x8000000>;
138 compatible = "powervr,sgx510";
139 reg = <0x98000000 0x8000000>;
146 compatible = "simple-bus";
147 #address-cells = <1>;
149 ranges = <0xa0000000 0xa0000000 0x8000000>;
152 compatible = "sirf,atlas6-ble";
153 reg = <0xa0000000 0x2000>;
160 compatible = "simple-bus";
161 #address-cells = <1>;
163 ranges = <0xa8000000 0xa8000000 0x2000000>;
166 compatible = "sirf,prima2-dspif";
167 reg = <0xa8000000 0x10000>;
172 compatible = "sirf,prima2-gps";
173 reg = <0xa8010000 0x10000>;
179 compatible = "sirf,prima2-dsp";
180 reg = <0xa9000000 0x1000000>;
187 compatible = "simple-bus";
188 #address-cells = <1>;
190 ranges = <0xb0000000 0xb0000000 0x180000>,
191 <0x56000000 0x56000000 0x1b00000>;
194 compatible = "sirf,prima2-tick";
195 reg = <0xb0020000 0x1000>;
200 compatible = "sirf,prima2-nand";
201 reg = <0xb0030000 0x10000>;
207 compatible = "sirf,prima2-audio";
208 reg = <0xb0040000 0x10000>;
213 uart0: uart@b0050000 {
215 compatible = "sirf,prima2-uart";
216 reg = <0xb0050000 0x1000>;
220 sirf,uart-dma-rx-channel = <21>;
221 sirf,uart-dma-tx-channel = <2>;
224 uart1: uart@b0060000 {
226 compatible = "sirf,prima2-uart";
227 reg = <0xb0060000 0x1000>;
233 uart2: uart@b0070000 {
235 compatible = "sirf,prima2-uart";
236 reg = <0xb0070000 0x1000>;
240 sirf,uart-dma-rx-channel = <6>;
241 sirf,uart-dma-tx-channel = <7>;
246 compatible = "sirf,prima2-usp";
247 reg = <0xb0080000 0x10000>;
251 sirf,usp-dma-rx-channel = <17>;
252 sirf,usp-dma-tx-channel = <18>;
257 compatible = "sirf,prima2-usp";
258 reg = <0xb0090000 0x10000>;
262 sirf,usp-dma-rx-channel = <14>;
263 sirf,usp-dma-tx-channel = <15>;
266 dmac0: dma-controller@b00b0000 {
268 compatible = "sirf,prima2-dmac";
269 reg = <0xb00b0000 0x10000>;
274 dmac1: dma-controller@b0160000 {
276 compatible = "sirf,prima2-dmac";
277 reg = <0xb0160000 0x10000>;
283 compatible = "sirf,prima2-vip";
284 reg = <0xb00C0000 0x10000>;
287 sirf,vip-dma-rx-channel = <16>;
292 compatible = "sirf,prima2-spi";
293 reg = <0xb00d0000 0x10000>;
295 sirf,spi-num-chipselects = <1>;
296 cs-gpios = <&gpio 0 0>;
297 sirf,spi-dma-rx-channel = <25>;
298 sirf,spi-dma-tx-channel = <20>;
299 #address-cells = <1>;
307 compatible = "sirf,prima2-spi";
308 reg = <0xb0170000 0x10000>;
310 sirf,spi-num-chipselects = <1>;
311 sirf,spi-dma-rx-channel = <12>;
312 sirf,spi-dma-tx-channel = <13>;
313 #address-cells = <1>;
321 compatible = "sirf,prima2-i2c";
322 reg = <0xb00e0000 0x10000>;
324 #address-cells = <1>;
331 compatible = "sirf,prima2-i2c";
332 reg = <0xb00f0000 0x10000>;
334 #address-cells = <1>;
340 compatible = "sirf,prima2-tsc";
341 reg = <0xb0110000 0x10000>;
346 gpio: pinctrl@b0120000 {
348 #interrupt-cells = <2>;
349 compatible = "sirf,atlas6-pinctrl";
350 reg = <0xb0120000 0x10000>;
351 interrupts = <43 44 45 46 47>;
353 interrupt-controller;
355 lcd_16pins_a: lcd0@0 {
357 sirf,pins = "lcd_16bitsgrp";
358 sirf,function = "lcd_16bits";
361 lcd_18pins_a: lcd0@1 {
363 sirf,pins = "lcd_18bitsgrp";
364 sirf,function = "lcd_18bits";
367 lcd_24pins_a: lcd0@2 {
369 sirf,pins = "lcd_24bitsgrp";
370 sirf,function = "lcd_24bits";
373 lcdrom_pins_a: lcdrom0@0 {
375 sirf,pins = "lcdromgrp";
376 sirf,function = "lcdrom";
379 uart0_pins_a: uart0@0 {
381 sirf,pins = "uart0grp";
382 sirf,function = "uart0";
385 uart0_noflow_pins_a: uart0@1 {
387 sirf,pins = "uart0_nostreamctrlgrp";
388 sirf,function = "uart0_nostreamctrl";
391 uart1_pins_a: uart1@0 {
393 sirf,pins = "uart1grp";
394 sirf,function = "uart1";
397 uart2_pins_a: uart2@0 {
399 sirf,pins = "uart2grp";
400 sirf,function = "uart2";
403 uart2_noflow_pins_a: uart2@1 {
405 sirf,pins = "uart2_nostreamctrlgrp";
406 sirf,function = "uart2_nostreamctrl";
409 spi0_pins_a: spi0@0 {
411 sirf,pins = "spi0grp";
412 sirf,function = "spi0";
415 spi1_pins_a: spi1@0 {
417 sirf,pins = "spi1grp";
418 sirf,function = "spi1";
421 i2c0_pins_a: i2c0@0 {
423 sirf,pins = "i2c0grp";
424 sirf,function = "i2c0";
427 i2c1_pins_a: i2c1@0 {
429 sirf,pins = "i2c1grp";
430 sirf,function = "i2c1";
433 pwm0_pins_a: pwm0@0 {
435 sirf,pins = "pwm0grp";
436 sirf,function = "pwm0";
439 pwm1_pins_a: pwm1@0 {
441 sirf,pins = "pwm1grp";
442 sirf,function = "pwm1";
445 pwm2_pins_a: pwm2@0 {
447 sirf,pins = "pwm2grp";
448 sirf,function = "pwm2";
451 pwm3_pins_a: pwm3@0 {
453 sirf,pins = "pwm3grp";
454 sirf,function = "pwm3";
457 pwm4_pins_a: pwm4@0 {
459 sirf,pins = "pwm4grp";
460 sirf,function = "pwm4";
465 sirf,pins = "gpsgrp";
466 sirf,function = "gps";
471 sirf,pins = "vipgrp";
472 sirf,function = "vip";
475 sdmmc0_pins_a: sdmmc0@0 {
477 sirf,pins = "sdmmc0grp";
478 sirf,function = "sdmmc0";
481 sdmmc1_pins_a: sdmmc1@0 {
483 sirf,pins = "sdmmc1grp";
484 sirf,function = "sdmmc1";
487 sdmmc2_pins_a: sdmmc2@0 {
489 sirf,pins = "sdmmc2grp";
490 sirf,function = "sdmmc2";
493 sdmmc2_nowp_pins_a: sdmmc2_nowp@0 {
495 sirf,pins = "sdmmc2_nowpgrp";
496 sirf,function = "sdmmc2_nowp";
499 sdmmc3_pins_a: sdmmc3@0 {
501 sirf,pins = "sdmmc3grp";
502 sirf,function = "sdmmc3";
505 sdmmc5_pins_a: sdmmc5@0 {
507 sirf,pins = "sdmmc5grp";
508 sirf,function = "sdmmc5";
513 sirf,pins = "i2sgrp";
514 sirf,function = "i2s";
517 i2s_no_din_pins_a: i2s_no_din@0 {
519 sirf,pins = "i2s_no_dingrp";
520 sirf,function = "i2s_no_din";
523 i2s_6chn_pins_a: i2s_6chn@0 {
525 sirf,pins = "i2s_6chngrp";
526 sirf,function = "i2s_6chn";
529 ac97_pins_a: ac97@0 {
531 sirf,pins = "ac97grp";
532 sirf,function = "ac97";
535 nand_pins_a: nand@0 {
537 sirf,pins = "nandgrp";
538 sirf,function = "nand";
541 usp0_pins_a: usp0@0 {
543 sirf,pins = "usp0grp";
544 sirf,function = "usp0";
547 usp0_uart_nostreamctrl_pins_a: usp0@1 {
549 sirf,pins = "usp0_uart_nostreamctrl_grp";
550 sirf,function = "usp0_uart_nostreamctrl";
553 usp1_pins_a: usp1@0 {
555 sirf,pins = "usp1grp";
556 sirf,function = "usp1";
559 usp1_uart_nostreamctrl_pins_a: usp1@1 {
561 sirf,pins = "usp1_uart_nostreamctrl_grp";
562 sirf,function = "usp1_uart_nostreamctrl";
565 usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 {
567 sirf,pins = "usb0_upli_drvbusgrp";
568 sirf,function = "usb0_upli_drvbus";
571 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
573 sirf,pins = "usb1_utmi_drvbusgrp";
574 sirf,function = "usb1_utmi_drvbus";
577 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
579 sirf,pins = "usb1_dp_dngrp";
580 sirf,function = "usb1_dp_dn";
583 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
584 uart1_route_io_usb1 {
585 sirf,pins = "uart1_route_io_usb1grp";
586 sirf,function = "uart1_route_io_usb1";
589 warm_rst_pins_a: warm_rst@0 {
591 sirf,pins = "warm_rstgrp";
592 sirf,function = "warm_rst";
595 pulse_count_pins_a: pulse_count@0 {
597 sirf,pins = "pulse_countgrp";
598 sirf,function = "pulse_count";
601 cko0_pins_a: cko0@0 {
603 sirf,pins = "cko0grp";
604 sirf,function = "cko0";
607 cko1_pins_a: cko1@0 {
609 sirf,pins = "cko1grp";
610 sirf,function = "cko1";
616 compatible = "sirf,prima2-pwm";
617 reg = <0xb0130000 0x10000>;
622 compatible = "sirf,prima2-efuse";
623 reg = <0xb0140000 0x10000>;
628 compatible = "sirf,prima2-pulsec";
629 reg = <0xb0150000 0x10000>;
635 compatible = "sirf,prima2-pciiobg", "simple-bus";
636 #address-cells = <1>;
638 ranges = <0x56000000 0x56000000 0x1b00000>;
640 sd0: sdhci@56000000 {
642 compatible = "sirf,prima2-sdhc";
643 reg = <0x56000000 0x100000>;
649 sd1: sdhci@56100000 {
651 compatible = "sirf,prima2-sdhc";
652 reg = <0x56100000 0x100000>;
659 sd2: sdhci@56200000 {
661 compatible = "sirf,prima2-sdhc";
662 reg = <0x56200000 0x100000>;
669 sd3: sdhci@56300000 {
671 compatible = "sirf,prima2-sdhc";
672 reg = <0x56300000 0x100000>;
679 sd5: sdhci@56500000 {
681 compatible = "sirf,prima2-sdhc";
682 reg = <0x56500000 0x100000>;
690 compatible = "sirf,prima2-pcicp";
691 reg = <0x57900000 0x100000>;
695 rom-interface@57a00000 {
696 compatible = "sirf,prima2-romif";
697 reg = <0x57a00000 0x100000>;
703 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
704 #address-cells = <1>;
706 reg = <0x80030000 0x10000>;
709 compatible = "sirf,prima2-gpsrtc";
710 reg = <0x1000 0x1000>;
711 interrupts = <55 56 57>;
715 compatible = "sirf,prima2-sysrtc";
716 reg = <0x2000 0x1000>;
717 interrupts = <52 53 54>;
721 compatible = "sirf,prima2-minigpsrtc";
722 reg = <0x2000 0x1000>;
727 compatible = "sirf,prima2-pwrc";
728 reg = <0x3000 0x1000>;
734 compatible = "simple-bus";
735 #address-cells = <1>;
737 ranges = <0xb8000000 0xb8000000 0x40000>;
740 compatible = "chipidea,ci13611a-prima2";
741 reg = <0xb8000000 0x10000>;
747 compatible = "chipidea,ci13611a-prima2";
748 reg = <0xb8010000 0x10000>;
754 compatible = "sirf,prima2-security";
755 reg = <0xb8030000 0x10000>;