arch/arm/boot/dts/bcm283x.dtsi

   1 #include <dt-bindings/pinctrl/bcm2835.h>
   2 #include <dt-bindings/clock/bcm2835.h>
   3 #include <dt-bindings/clock/bcm2835-aux.h>
   4 #include "skeleton.dtsi"
   5
   6 /* This include file covers the common peripherals and configuration between
   7  * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
   8  * bcm2835.dtsi and bcm2836.dtsi.
   9  */
  10
  11 / {
  12         compatible = "brcm,bcm2835";
  13         model = "BCM2835";
  14         interrupt-parent = <&intc>;
  15
  16         chosen {
  17                 bootargs = "earlyprintk console=ttyAMA0";
  18         };
  19
  20         soc {
  21                 compatible = "simple-bus";
  22                 #address-cells = <1>;
  23                 #size-cells = <1>;
  24
  25                 timer@7e003000 {
  26                         compatible = "brcm,bcm2835-system-timer";
  27                         reg = <0x7e003000 0x1000>;
  28                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  29                         /* This could be a reference to BCM2835_CLOCK_TIMER,
  30                          * but we don't have the driver using the common clock
  31                          * support yet.
  32                          */
  33                         clock-frequency = <1000000>;
  34                 };
  35
  36                 dma: dma@7e007000 {
  37                         compatible = "brcm,bcm2835-dma";
  38                         reg = <0x7e007000 0xf00>;
  39                         interrupts = <1 16>,
  40                                      <1 17>,
  41                                      <1 18>,
  42                                      <1 19>,
  43                                      <1 20>,
  44                                      <1 21>,
  45                                      <1 22>,
  46                                      <1 23>,
  47                                      <1 24>,
  48                                      <1 25>,
  49                                      <1 26>,
  50                                      <1 27>,
  51                                      <1 28>;
  52
  53                         #dma-cells = <1>;
  54                         brcm,dma-channel-mask = <0x7f35>;
  55                 };
  56
  57                 intc: interrupt-controller@7e00b200 {
  58                         compatible = "brcm,bcm2835-armctrl-ic";
  59                         reg = <0x7e00b200 0x200>;
  60                         interrupt-controller;
  61                         #interrupt-cells = <2>;
  62                 };
  63
  64                 watchdog@7e100000 {
  65                         compatible = "brcm,bcm2835-pm-wdt";
  66                         reg = <0x7e100000 0x28>;
  67                 };
  68
  69                 clocks: cprman@7e101000 {
  70                         compatible = "brcm,bcm2835-cprman";
  71                         #clock-cells = <1>;
  72                         reg = <0x7e101000 0x2000>;
  73
  74                         /* CPRMAN derives everything from the platform's
  75                          * oscillator.
  76                          */
  77                         clocks = <&clk_osc>;
  78                 };
  79
  80                 rng@7e104000 {
  81                         compatible = "brcm,bcm2835-rng";
  82                         reg = <0x7e104000 0x10>;
  83                 };
  84
  85                 mailbox: mailbox@7e00b800 {
  86                         compatible = "brcm,bcm2835-mbox";
  87                         reg = <0x7e00b880 0x40>;
  88                         interrupts = <0 1>;
  89                         #mbox-cells = <0>;
  90                 };
  91
  92                 gpio: gpio@7e200000 {
  93                         compatible = "brcm,bcm2835-gpio";
  94                         reg = <0x7e200000 0xb4>;
  95                         /*
  96                          * The GPIO IP block is designed for 3 banks of GPIOs.
  97                          * Each bank has a GPIO interrupt for itself.
  98                          * There is an overall "any bank" interrupt.
  99                          * In order, these are GIC interrupts 17, 18, 19, 20.
 100                          * Since the BCM2835 only has 2 banks, the 2nd bank
 101                          * interrupt output appears to be mirrored onto the
 102                          * 3rd bank's interrupt signal.
 103                          * So, a bank0 interrupt shows up on 17, 20, and
 104                          * a bank1 interrupt shows up on 18, 19, 20!
 105                          */
 106                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
 107
 108                         gpio-controller;
 109                         #gpio-cells = <2>;
 110
 111                         interrupt-controller;
 112                         #interrupt-cells = <2>;
 113                 };
 114
 115                 uart0: serial@7e201000 {
 116                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 117                         reg = <0x7e201000 0x1000>;
 118                         interrupts = <2 25>;
 119                         clocks = <&clocks BCM2835_CLOCK_UART>,
 120                                  <&clocks BCM2835_CLOCK_VPU>;
 121                         clock-names = "uartclk", "apb_pclk";
 122                         arm,primecell-periphid = <0x00241011>;
 123                 };
 124
 125                 i2s: i2s@7e203000 {
 126                         compatible = "brcm,bcm2835-i2s";
 127                         reg = <0x7e203000 0x20>,
 128                               <0x7e101098 0x02>;
 129
 130                         dmas = <&dma 2>,
 131                                <&dma 3>;
 132                         dma-names = "tx", "rx";
 133                         status = "disabled";
 134                 };
 135
 136                 spi: spi@7e204000 {
 137                         compatible = "brcm,bcm2835-spi";
 138                         reg = <0x7e204000 0x1000>;
 139                         interrupts = <2 22>;
 140                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 141                         #address-cells = <1>;
 142                         #size-cells = <0>;
 143                         status = "disabled";
 144                 };
 145
 146                 i2c0: i2c@7e205000 {
 147                         compatible = "brcm,bcm2835-i2c";
 148                         reg = <0x7e205000 0x1000>;
 149                         interrupts = <2 21>;
 150                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 151                         #address-cells = <1>;
 152                         #size-cells = <0>;
 153                         status = "disabled";
 154                 };
 155
 156                 aux: aux@0x7e215000 {
 157                         compatible = "brcm,bcm2835-aux";
 158                         #clock-cells = <1>;
 159                         reg = <0x7e215000 0x8>;
 160                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 161                 };
 162
 163                 spi1: spi@7e215080 {
 164                         compatible = "brcm,bcm2835-aux-spi";
 165                         reg = <0x7e215080 0x40>;
 166                         interrupts = <1 29>;
 167                         clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
 168                         #address-cells = <1>;
 169                         #size-cells = <0>;
 170                         status = "disabled";
 171                 };
 172
 173                 spi2: spi@7e2150c0 {
 174                         compatible = "brcm,bcm2835-aux-spi";
 175                         reg = <0x7e2150c0 0x40>;
 176                         interrupts = <1 29>;
 177                         clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
 178                         #address-cells = <1>;
 179                         #size-cells = <0>;
 180                         status = "disabled";
 181                 };
 182
 183                 pwm: pwm@7e20c000 {
 184                         compatible = "brcm,bcm2835-pwm";
 185                         reg = <0x7e20c000 0x28>;
 186                         clocks = <&clocks BCM2835_CLOCK_PWM>;
 187                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 188                         assigned-clock-rates = <10000000>;
 189                         #pwm-cells = <2>;
 190                         status = "disabled";
 191                 };
 192
 193                 sdhci: sdhci@7e300000 {
 194                         compatible = "brcm,bcm2835-sdhci";
 195                         reg = <0x7e300000 0x100>;
 196                         interrupts = <2 30>;
 197                         clocks = <&clocks BCM2835_CLOCK_EMMC>;
 198                         status = "disabled";
 199                 };
 200
 201                 i2c1: i2c@7e804000 {
 202                         compatible = "brcm,bcm2835-i2c";
 203                         reg = <0x7e804000 0x1000>;
 204                         interrupts = <2 21>;
 205                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 206                         #address-cells = <1>;
 207                         #size-cells = <0>;
 208                         status = "disabled";
 209                 };
 210
 211                 i2c2: i2c@7e805000 {
 212                         compatible = "brcm,bcm2835-i2c";
 213                         reg = <0x7e805000 0x1000>;
 214                         interrupts = <2 21>;
 215                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 216                         #address-cells = <1>;
 217                         #size-cells = <0>;
 218                         status = "disabled";
 219                 };
 220
 221                 usb: usb@7e980000 {
 222                         compatible = "brcm,bcm2835-usb";
 223                         reg = <0x7e980000 0x10000>;
 224                         interrupts = <1 9>;
 225                 };
 226         };
 227
 228         clocks {
 229                 compatible = "simple-bus";
 230                 #address-cells = <1>;
 231                 #size-cells = <0>;
 232
 233                 /* The oscillator is the root of the clock tree. */
 234                 clk_osc: clock@3 {
 235                         compatible = "fixed-clock";
 236                         reg = <3>;
 237                         #clock-cells = <0>;
 238                         clock-output-names = "osc";
 239                         clock-frequency = <19200000>;
 240                 };
 241
 242         };
 243 };