arch/arm/boot/dts/bcm283x.dtsi

   1 #include <dt-bindings/pinctrl/bcm2835.h>
   2 #include <dt-bindings/clock/bcm2835.h>
   3 #include <dt-bindings/clock/bcm2835-aux.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include "skeleton.dtsi"
   6
   7 /* This include file covers the common peripherals and configuration between
   8  * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
   9  * bcm2835.dtsi and bcm2836.dtsi.
  10  */
  11
  12 / {
  13         compatible = "brcm,bcm2835";
  14         model = "BCM2835";
  15         interrupt-parent = <&intc>;
  16
  17         chosen {
  18                 bootargs = "earlyprintk console=ttyAMA0";
  19         };
  20
  21         soc {
  22                 compatible = "simple-bus";
  23                 #address-cells = <1>;
  24                 #size-cells = <1>;
  25
  26                 timer@7e003000 {
  27                         compatible = "brcm,bcm2835-system-timer";
  28                         reg = <0x7e003000 0x1000>;
  29                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  30                         /* This could be a reference to BCM2835_CLOCK_TIMER,
  31                          * but we don't have the driver using the common clock
  32                          * support yet.
  33                          */
  34                         clock-frequency = <1000000>;
  35                 };
  36
  37                 dma: dma@7e007000 {
  38                         compatible = "brcm,bcm2835-dma";
  39                         reg = <0x7e007000 0xf00>;
  40                         interrupts = <1 16>,
  41                                      <1 17>,
  42                                      <1 18>,
  43                                      <1 19>,
  44                                      <1 20>,
  45                                      <1 21>,
  46                                      <1 22>,
  47                                      <1 23>,
  48                                      <1 24>,
  49                                      <1 25>,
  50                                      <1 26>,
  51                                      <1 27>,
  52                                      <1 28>;
  53
  54                         #dma-cells = <1>;
  55                         brcm,dma-channel-mask = <0x7f35>;
  56                 };
  57
  58                 intc: interrupt-controller@7e00b200 {
  59                         compatible = "brcm,bcm2835-armctrl-ic";
  60                         reg = <0x7e00b200 0x200>;
  61                         interrupt-controller;
  62                         #interrupt-cells = <2>;
  63                 };
  64
  65                 watchdog@7e100000 {
  66                         compatible = "brcm,bcm2835-pm-wdt";
  67                         reg = <0x7e100000 0x28>;
  68                 };
  69
  70                 clocks: cprman@7e101000 {
  71                         compatible = "brcm,bcm2835-cprman";
  72                         #clock-cells = <1>;
  73                         reg = <0x7e101000 0x2000>;
  74
  75                         /* CPRMAN derives everything from the platform's
  76                          * oscillator.
  77                          */
  78                         clocks = <&clk_osc>;
  79                 };
  80
  81                 rng@7e104000 {
  82                         compatible = "brcm,bcm2835-rng";
  83                         reg = <0x7e104000 0x10>;
  84                 };
  85
  86                 mailbox: mailbox@7e00b800 {
  87                         compatible = "brcm,bcm2835-mbox";
  88                         reg = <0x7e00b880 0x40>;
  89                         interrupts = <0 1>;
  90                         #mbox-cells = <0>;
  91                 };
  92
  93                 gpio: gpio@7e200000 {
  94                         compatible = "brcm,bcm2835-gpio";
  95                         reg = <0x7e200000 0xb4>;
  96                         /*
  97                          * The GPIO IP block is designed for 3 banks of GPIOs.
  98                          * Each bank has a GPIO interrupt for itself.
  99                          * There is an overall "any bank" interrupt.
 100                          * In order, these are GIC interrupts 17, 18, 19, 20.
 101                          * Since the BCM2835 only has 2 banks, the 2nd bank
 102                          * interrupt output appears to be mirrored onto the
 103                          * 3rd bank's interrupt signal.
 104                          * So, a bank0 interrupt shows up on 17, 20, and
 105                          * a bank1 interrupt shows up on 18, 19, 20!
 106                          */
 107                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
 108
 109                         gpio-controller;
 110                         #gpio-cells = <2>;
 111
 112                         interrupt-controller;
 113                         #interrupt-cells = <2>;
 114                 };
 115
 116                 uart0: serial@7e201000 {
 117                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 118                         reg = <0x7e201000 0x1000>;
 119                         interrupts = <2 25>;
 120                         clocks = <&clocks BCM2835_CLOCK_UART>,
 121                                  <&clocks BCM2835_CLOCK_VPU>;
 122                         clock-names = "uartclk", "apb_pclk";
 123                         arm,primecell-periphid = <0x00241011>;
 124                 };
 125
 126                 i2s: i2s@7e203000 {
 127                         compatible = "brcm,bcm2835-i2s";
 128                         reg = <0x7e203000 0x20>,
 129                               <0x7e101098 0x02>;
 130
 131                         dmas = <&dma 2>,
 132                                <&dma 3>;
 133                         dma-names = "tx", "rx";
 134                         status = "disabled";
 135                 };
 136
 137                 spi: spi@7e204000 {
 138                         compatible = "brcm,bcm2835-spi";
 139                         reg = <0x7e204000 0x1000>;
 140                         interrupts = <2 22>;
 141                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 142                         #address-cells = <1>;
 143                         #size-cells = <0>;
 144                         status = "disabled";
 145                 };
 146
 147                 i2c0: i2c@7e205000 {
 148                         compatible = "brcm,bcm2835-i2c";
 149                         reg = <0x7e205000 0x1000>;
 150                         interrupts = <2 21>;
 151                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 152                         #address-cells = <1>;
 153                         #size-cells = <0>;
 154                         status = "disabled";
 155                 };
 156
 157                 pixelvalve@7e206000 {
 158                         compatible = "brcm,bcm2835-pixelvalve0";
 159                         reg = <0x7e206000 0x100>;
 160                         interrupts = <2 13>; /* pwa0 */
 161                 };
 162
 163                 pixelvalve@7e207000 {
 164                         compatible = "brcm,bcm2835-pixelvalve1";
 165                         reg = <0x7e207000 0x100>;
 166                         interrupts = <2 14>; /* pwa1 */
 167                 };
 168
 169                 aux: aux@0x7e215000 {
 170                         compatible = "brcm,bcm2835-aux";
 171                         #clock-cells = <1>;
 172                         reg = <0x7e215000 0x8>;
 173                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 174                 };
 175
 176                 uart1: serial@7e215040 {
 177                         compatible = "brcm,bcm2835-aux-uart";
 178                         reg = <0x7e215040 0x40>;
 179                         interrupts = <1 29>;
 180                         clocks = <&aux BCM2835_AUX_CLOCK_UART>;
 181                         status = "disabled";
 182                 };
 183
 184                 spi1: spi@7e215080 {
 185                         compatible = "brcm,bcm2835-aux-spi";
 186                         reg = <0x7e215080 0x40>;
 187                         interrupts = <1 29>;
 188                         clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
 189                         #address-cells = <1>;
 190                         #size-cells = <0>;
 191                         status = "disabled";
 192                 };
 193
 194                 spi2: spi@7e2150c0 {
 195                         compatible = "brcm,bcm2835-aux-spi";
 196                         reg = <0x7e2150c0 0x40>;
 197                         interrupts = <1 29>;
 198                         clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201                         status = "disabled";
 202                 };
 203
 204                 pwm: pwm@7e20c000 {
 205                         compatible = "brcm,bcm2835-pwm";
 206                         reg = <0x7e20c000 0x28>;
 207                         clocks = <&clocks BCM2835_CLOCK_PWM>;
 208                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 209                         assigned-clock-rates = <10000000>;
 210                         #pwm-cells = <2>;
 211                         status = "disabled";
 212                 };
 213
 214                 sdhci: sdhci@7e300000 {
 215                         compatible = "brcm,bcm2835-sdhci";
 216                         reg = <0x7e300000 0x100>;
 217                         interrupts = <2 30>;
 218                         clocks = <&clocks BCM2835_CLOCK_EMMC>;
 219                         status = "disabled";
 220                 };
 221
 222                 hvs@7e400000 {
 223                         compatible = "brcm,bcm2835-hvs";
 224                         reg = <0x7e400000 0x6000>;
 225                         interrupts = <2 1>;
 226                 };
 227
 228                 i2c1: i2c@7e804000 {
 229                         compatible = "brcm,bcm2835-i2c";
 230                         reg = <0x7e804000 0x1000>;
 231                         interrupts = <2 21>;
 232                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 233                         #address-cells = <1>;
 234                         #size-cells = <0>;
 235                         status = "disabled";
 236                 };
 237
 238                 i2c2: i2c@7e805000 {
 239                         compatible = "brcm,bcm2835-i2c";
 240                         reg = <0x7e805000 0x1000>;
 241                         interrupts = <2 21>;
 242                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 243                         #address-cells = <1>;
 244                         #size-cells = <0>;
 245                         status = "disabled";
 246                 };
 247
 248                 pixelvalve@7e807000 {
 249                         compatible = "brcm,bcm2835-pixelvalve2";
 250                         reg = <0x7e807000 0x100>;
 251                         interrupts = <2 10>; /* pixelvalve */
 252                 };
 253
 254                 hdmi: hdmi@7e902000 {
 255                         compatible = "brcm,bcm2835-hdmi";
 256                         reg = <0x7e902000 0x600>,
 257                               <0x7e808000 0x100>;
 258                         interrupts = <2 8>, <2 9>;
 259                         ddc = <&i2c2>;
 260                         clocks = <&clocks BCM2835_PLLH_PIX>,
 261                                  <&clocks BCM2835_CLOCK_HSM>;
 262                         clock-names = "pixel", "hdmi";
 263                         status = "disabled";
 264                 };
 265
 266                 usb: usb@7e980000 {
 267                         compatible = "brcm,bcm2835-usb";
 268                         reg = <0x7e980000 0x10000>;
 269                         interrupts = <1 9>;
 270                 };
 271
 272                 v3d: v3d@7ec00000 {
 273                         compatible = "brcm,bcm2835-v3d";
 274                         reg = <0x7ec00000 0x1000>;
 275                         interrupts = <1 10>;
 276                 };
 277
 278                 vc4: gpu {
 279                         compatible = "brcm,bcm2835-vc4";
 280                 };
 281         };
 282
 283         clocks {
 284                 compatible = "simple-bus";
 285                 #address-cells = <1>;
 286                 #size-cells = <0>;
 287
 288                 /* The oscillator is the root of the clock tree. */
 289                 clk_osc: clock@3 {
 290                         compatible = "fixed-clock";
 291                         reg = <3>;
 292                         #clock-cells = <0>;
 293                         clock-output-names = "osc";
 294                         clock-frequency = <19200000>;
 295                 };
 296
 297         };
 298 };