1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include "skeleton.dtsi"
7 /* This include file covers the common peripherals and configuration between
8 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
9 * bcm2835.dtsi and bcm2836.dtsi.
13 compatible = "brcm,bcm2835";
15 interrupt-parent = <&intc>;
18 bootargs = "earlyprintk console=ttyAMA0";
22 compatible = "simple-bus";
27 compatible = "brcm,bcm2835-system-timer";
28 reg = <0x7e003000 0x1000>;
29 interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
30 /* This could be a reference to BCM2835_CLOCK_TIMER,
31 * but we don't have the driver using the common clock
34 clock-frequency = <1000000>;
38 compatible = "brcm,bcm2835-dma";
39 reg = <0x7e007000 0xf00>;
55 brcm,dma-channel-mask = <0x7f35>;
58 intc: interrupt-controller@7e00b200 {
59 compatible = "brcm,bcm2835-armctrl-ic";
60 reg = <0x7e00b200 0x200>;
62 #interrupt-cells = <2>;
66 compatible = "brcm,bcm2835-pm-wdt";
67 reg = <0x7e100000 0x28>;
70 clocks: cprman@7e101000 {
71 compatible = "brcm,bcm2835-cprman";
73 reg = <0x7e101000 0x2000>;
75 /* CPRMAN derives everything from the platform's
82 compatible = "brcm,bcm2835-rng";
83 reg = <0x7e104000 0x10>;
86 mailbox: mailbox@7e00b800 {
87 compatible = "brcm,bcm2835-mbox";
88 reg = <0x7e00b880 0x40>;
94 compatible = "brcm,bcm2835-gpio";
95 reg = <0x7e200000 0xb4>;
97 * The GPIO IP block is designed for 3 banks of GPIOs.
98 * Each bank has a GPIO interrupt for itself.
99 * There is an overall "any bank" interrupt.
100 * In order, these are GIC interrupts 17, 18, 19, 20.
101 * Since the BCM2835 only has 2 banks, the 2nd bank
102 * interrupt output appears to be mirrored onto the
103 * 3rd bank's interrupt signal.
104 * So, a bank0 interrupt shows up on 17, 20, and
105 * a bank1 interrupt shows up on 18, 19, 20!
107 interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
112 interrupt-controller;
113 #interrupt-cells = <2>;
116 uart0: serial@7e201000 {
117 compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
118 reg = <0x7e201000 0x1000>;
120 clocks = <&clocks BCM2835_CLOCK_UART>,
121 <&clocks BCM2835_CLOCK_VPU>;
122 clock-names = "uartclk", "apb_pclk";
123 arm,primecell-periphid = <0x00241011>;
127 compatible = "brcm,bcm2835-i2s";
128 reg = <0x7e203000 0x20>,
133 dma-names = "tx", "rx";
138 compatible = "brcm,bcm2835-spi";
139 reg = <0x7e204000 0x1000>;
141 clocks = <&clocks BCM2835_CLOCK_VPU>;
142 #address-cells = <1>;
148 compatible = "brcm,bcm2835-i2c";
149 reg = <0x7e205000 0x1000>;
151 clocks = <&clocks BCM2835_CLOCK_VPU>;
152 #address-cells = <1>;
157 pixelvalve@7e206000 {
158 compatible = "brcm,bcm2835-pixelvalve0";
159 reg = <0x7e206000 0x100>;
160 interrupts = <2 13>; /* pwa0 */
163 pixelvalve@7e207000 {
164 compatible = "brcm,bcm2835-pixelvalve1";
165 reg = <0x7e207000 0x100>;
166 interrupts = <2 14>; /* pwa1 */
169 aux: aux@0x7e215000 {
170 compatible = "brcm,bcm2835-aux";
172 reg = <0x7e215000 0x8>;
173 clocks = <&clocks BCM2835_CLOCK_VPU>;
176 uart1: serial@7e215040 {
177 compatible = "brcm,bcm2835-aux-uart";
178 reg = <0x7e215040 0x40>;
180 clocks = <&aux BCM2835_AUX_CLOCK_UART>;
185 compatible = "brcm,bcm2835-aux-spi";
186 reg = <0x7e215080 0x40>;
188 clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
189 #address-cells = <1>;
195 compatible = "brcm,bcm2835-aux-spi";
196 reg = <0x7e2150c0 0x40>;
198 clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
199 #address-cells = <1>;
205 compatible = "brcm,bcm2835-pwm";
206 reg = <0x7e20c000 0x28>;
207 clocks = <&clocks BCM2835_CLOCK_PWM>;
208 assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
209 assigned-clock-rates = <10000000>;
214 sdhci: sdhci@7e300000 {
215 compatible = "brcm,bcm2835-sdhci";
216 reg = <0x7e300000 0x100>;
218 clocks = <&clocks BCM2835_CLOCK_EMMC>;
223 compatible = "brcm,bcm2835-hvs";
224 reg = <0x7e400000 0x6000>;
229 compatible = "brcm,bcm2835-i2c";
230 reg = <0x7e804000 0x1000>;
232 clocks = <&clocks BCM2835_CLOCK_VPU>;
233 #address-cells = <1>;
239 compatible = "brcm,bcm2835-i2c";
240 reg = <0x7e805000 0x1000>;
242 clocks = <&clocks BCM2835_CLOCK_VPU>;
243 #address-cells = <1>;
248 pixelvalve@7e807000 {
249 compatible = "brcm,bcm2835-pixelvalve2";
250 reg = <0x7e807000 0x100>;
251 interrupts = <2 10>; /* pixelvalve */
254 hdmi: hdmi@7e902000 {
255 compatible = "brcm,bcm2835-hdmi";
256 reg = <0x7e902000 0x600>,
258 interrupts = <2 8>, <2 9>;
260 clocks = <&clocks BCM2835_PLLH_PIX>,
261 <&clocks BCM2835_CLOCK_HSM>;
262 clock-names = "pixel", "hdmi";
267 compatible = "brcm,bcm2835-usb";
268 reg = <0x7e980000 0x10000>;
273 compatible = "brcm,bcm2835-v3d";
274 reg = <0x7ec00000 0x1000>;
279 compatible = "brcm,bcm2835-vc4";
284 compatible = "simple-bus";
285 #address-cells = <1>;
288 /* The oscillator is the root of the clock tree. */
290 compatible = "fixed-clock";
293 clock-output-names = "osc";
294 clock-frequency = <19200000>;