arch/arm/boot/dts/bcm283x.dtsi

   1 #include <dt-bindings/pinctrl/bcm2835.h>
   2 #include <dt-bindings/clock/bcm2835.h>
   3 #include "skeleton.dtsi"
   4
   5 /* This include file covers the common peripherals and configuration between
   6  * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
   7  * bcm2835.dtsi and bcm2836.dtsi.
   8  */
   9
  10 / {
  11         compatible = "brcm,bcm2835";
  12         model = "BCM2835";
  13         interrupt-parent = <&intc>;
  14
  15         chosen {
  16                 bootargs = "earlyprintk console=ttyAMA0";
  17         };
  18
  19         soc {
  20                 compatible = "simple-bus";
  21                 #address-cells = <1>;
  22                 #size-cells = <1>;
  23
  24                 timer@7e003000 {
  25                         compatible = "brcm,bcm2835-system-timer";
  26                         reg = <0x7e003000 0x1000>;
  27                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  28                         /* This could be a reference to BCM2835_CLOCK_TIMER,
  29                          * but we don't have the driver using the common clock
  30                          * support yet.
  31                          */
  32                         clock-frequency = <1000000>;
  33                 };
  34
  35                 dma: dma@7e007000 {
  36                         compatible = "brcm,bcm2835-dma";
  37                         reg = <0x7e007000 0xf00>;
  38                         interrupts = <1 16>,
  39                                      <1 17>,
  40                                      <1 18>,
  41                                      <1 19>,
  42                                      <1 20>,
  43                                      <1 21>,
  44                                      <1 22>,
  45                                      <1 23>,
  46                                      <1 24>,
  47                                      <1 25>,
  48                                      <1 26>,
  49                                      <1 27>,
  50                                      <1 28>;
  51
  52                         #dma-cells = <1>;
  53                         brcm,dma-channel-mask = <0x7f35>;
  54                 };
  55
  56                 intc: interrupt-controller@7e00b200 {
  57                         compatible = "brcm,bcm2835-armctrl-ic";
  58                         reg = <0x7e00b200 0x200>;
  59                         interrupt-controller;
  60                         #interrupt-cells = <2>;
  61                 };
  62
  63                 watchdog@7e100000 {
  64                         compatible = "brcm,bcm2835-pm-wdt";
  65                         reg = <0x7e100000 0x28>;
  66                 };
  67
  68                 clocks: cprman@7e101000 {
  69                         compatible = "brcm,bcm2835-cprman";
  70                         #clock-cells = <1>;
  71                         reg = <0x7e101000 0x2000>;
  72
  73                         /* CPRMAN derives everything from the platform's
  74                          * oscillator.
  75                          */
  76                         clocks = <&clk_osc>;
  77                 };
  78
  79                 rng@7e104000 {
  80                         compatible = "brcm,bcm2835-rng";
  81                         reg = <0x7e104000 0x10>;
  82                 };
  83
  84                 mailbox: mailbox@7e00b800 {
  85                         compatible = "brcm,bcm2835-mbox";
  86                         reg = <0x7e00b880 0x40>;
  87                         interrupts = <0 1>;
  88                         #mbox-cells = <0>;
  89                 };
  90
  91                 gpio: gpio@7e200000 {
  92                         compatible = "brcm,bcm2835-gpio";
  93                         reg = <0x7e200000 0xb4>;
  94                         /*
  95                          * The GPIO IP block is designed for 3 banks of GPIOs.
  96                          * Each bank has a GPIO interrupt for itself.
  97                          * There is an overall "any bank" interrupt.
  98                          * In order, these are GIC interrupts 17, 18, 19, 20.
  99                          * Since the BCM2835 only has 2 banks, the 2nd bank
 100                          * interrupt output appears to be mirrored onto the
 101                          * 3rd bank's interrupt signal.
 102                          * So, a bank0 interrupt shows up on 17, 20, and
 103                          * a bank1 interrupt shows up on 18, 19, 20!
 104                          */
 105                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
 106
 107                         gpio-controller;
 108                         #gpio-cells = <2>;
 109
 110                         interrupt-controller;
 111                         #interrupt-cells = <2>;
 112                 };
 113
 114                 uart0: uart@7e201000 {
 115                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 116                         reg = <0x7e201000 0x1000>;
 117                         interrupts = <2 25>;
 118                         clocks = <&clocks BCM2835_CLOCK_UART>,
 119                                  <&clocks BCM2835_CLOCK_VPU>;
 120                         clock-names = "uartclk", "apb_pclk";
 121                         arm,primecell-periphid = <0x00241011>;
 122                 };
 123
 124                 i2s: i2s@7e203000 {
 125                         compatible = "brcm,bcm2835-i2s";
 126                         reg = <0x7e203000 0x20>,
 127                               <0x7e101098 0x02>;
 128
 129                         dmas = <&dma 2>,
 130                                <&dma 3>;
 131                         dma-names = "tx", "rx";
 132                         status = "disabled";
 133                 };
 134
 135                 spi: spi@7e204000 {
 136                         compatible = "brcm,bcm2835-spi";
 137                         reg = <0x7e204000 0x1000>;
 138                         interrupts = <2 22>;
 139                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 140                         #address-cells = <1>;
 141                         #size-cells = <0>;
 142                         status = "disabled";
 143                 };
 144
 145                 i2c0: i2c@7e205000 {
 146                         compatible = "brcm,bcm2835-i2c";
 147                         reg = <0x7e205000 0x1000>;
 148                         interrupts = <2 21>;
 149                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 150                         #address-cells = <1>;
 151                         #size-cells = <0>;
 152                         status = "disabled";
 153                 };
 154
 155                 aux: aux@0x7e215000 {
 156                         compatible = "brcm,bcm2835-aux";
 157                         #clock-cells = <1>;
 158                         reg = <0x7e215000 0x8>;
 159                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 160                 };
 161
 162                 sdhci: sdhci@7e300000 {
 163                         compatible = "brcm,bcm2835-sdhci";
 164                         reg = <0x7e300000 0x100>;
 165                         interrupts = <2 30>;
 166                         clocks = <&clocks BCM2835_CLOCK_EMMC>;
 167                         status = "disabled";
 168                 };
 169
 170                 i2c1: i2c@7e804000 {
 171                         compatible = "brcm,bcm2835-i2c";
 172                         reg = <0x7e804000 0x1000>;
 173                         interrupts = <2 21>;
 174                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 175                         #address-cells = <1>;
 176                         #size-cells = <0>;
 177                         status = "disabled";
 178                 };
 179
 180                 i2c2: i2c@7e805000 {
 181                         compatible = "brcm,bcm2835-i2c";
 182                         reg = <0x7e805000 0x1000>;
 183                         interrupts = <2 21>;
 184                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 185                         #address-cells = <1>;
 186                         #size-cells = <0>;
 187                         status = "disabled";
 188                 };
 189
 190                 usb@7e980000 {
 191                         compatible = "brcm,bcm2835-usb";
 192                         reg = <0x7e980000 0x10000>;
 193                         interrupts = <1 9>;
 194                 };
 195         };
 196
 197         clocks {
 198                 compatible = "simple-bus";
 199                 #address-cells = <1>;
 200                 #size-cells = <0>;
 201
 202                 /* The oscillator is the root of the clock tree. */
 203                 clk_osc: clock@3 {
 204                         compatible = "fixed-clock";
 205                         reg = <3>;
 206                         #clock-cells = <0>;
 207                         clock-output-names = "osc";
 208                         clock-frequency = <19200000>;
 209                 };
 210
 211         };
 212 };