1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include "skeleton.dtsi"
6 /* This include file covers the common peripherals and configuration between
7 * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
8 * bcm2835.dtsi and bcm2836.dtsi.
12 compatible = "brcm,bcm2835";
14 interrupt-parent = <&intc>;
17 bootargs = "earlyprintk console=ttyAMA0";
21 compatible = "simple-bus";
26 compatible = "brcm,bcm2835-system-timer";
27 reg = <0x7e003000 0x1000>;
28 interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
29 /* This could be a reference to BCM2835_CLOCK_TIMER,
30 * but we don't have the driver using the common clock
33 clock-frequency = <1000000>;
37 compatible = "brcm,bcm2835-dma";
38 reg = <0x7e007000 0xf00>;
54 brcm,dma-channel-mask = <0x7f35>;
57 intc: interrupt-controller@7e00b200 {
58 compatible = "brcm,bcm2835-armctrl-ic";
59 reg = <0x7e00b200 0x200>;
61 #interrupt-cells = <2>;
65 compatible = "brcm,bcm2835-pm-wdt";
66 reg = <0x7e100000 0x28>;
69 clocks: cprman@7e101000 {
70 compatible = "brcm,bcm2835-cprman";
72 reg = <0x7e101000 0x2000>;
74 /* CPRMAN derives everything from the platform's
81 compatible = "brcm,bcm2835-rng";
82 reg = <0x7e104000 0x10>;
85 mailbox: mailbox@7e00b800 {
86 compatible = "brcm,bcm2835-mbox";
87 reg = <0x7e00b880 0x40>;
93 compatible = "brcm,bcm2835-gpio";
94 reg = <0x7e200000 0xb4>;
96 * The GPIO IP block is designed for 3 banks of GPIOs.
97 * Each bank has a GPIO interrupt for itself.
98 * There is an overall "any bank" interrupt.
99 * In order, these are GIC interrupts 17, 18, 19, 20.
100 * Since the BCM2835 only has 2 banks, the 2nd bank
101 * interrupt output appears to be mirrored onto the
102 * 3rd bank's interrupt signal.
103 * So, a bank0 interrupt shows up on 17, 20, and
104 * a bank1 interrupt shows up on 18, 19, 20!
106 interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
111 interrupt-controller;
112 #interrupt-cells = <2>;
115 uart0: serial@7e201000 {
116 compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
117 reg = <0x7e201000 0x1000>;
119 clocks = <&clocks BCM2835_CLOCK_UART>,
120 <&clocks BCM2835_CLOCK_VPU>;
121 clock-names = "uartclk", "apb_pclk";
122 arm,primecell-periphid = <0x00241011>;
126 compatible = "brcm,bcm2835-i2s";
127 reg = <0x7e203000 0x20>,
132 dma-names = "tx", "rx";
137 compatible = "brcm,bcm2835-spi";
138 reg = <0x7e204000 0x1000>;
140 clocks = <&clocks BCM2835_CLOCK_VPU>;
141 #address-cells = <1>;
147 compatible = "brcm,bcm2835-i2c";
148 reg = <0x7e205000 0x1000>;
150 clocks = <&clocks BCM2835_CLOCK_VPU>;
151 #address-cells = <1>;
156 aux: aux@0x7e215000 {
157 compatible = "brcm,bcm2835-aux";
159 reg = <0x7e215000 0x8>;
160 clocks = <&clocks BCM2835_CLOCK_VPU>;
163 uart1: serial@7e215040 {
164 compatible = "brcm,bcm2835-aux-uart";
165 reg = <0x7e215040 0x40>;
167 clocks = <&aux BCM2835_AUX_CLOCK_UART>;
172 compatible = "brcm,bcm2835-aux-spi";
173 reg = <0x7e215080 0x40>;
175 clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
176 #address-cells = <1>;
182 compatible = "brcm,bcm2835-aux-spi";
183 reg = <0x7e2150c0 0x40>;
185 clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
186 #address-cells = <1>;
192 compatible = "brcm,bcm2835-pwm";
193 reg = <0x7e20c000 0x28>;
194 clocks = <&clocks BCM2835_CLOCK_PWM>;
195 assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
196 assigned-clock-rates = <10000000>;
201 sdhci: sdhci@7e300000 {
202 compatible = "brcm,bcm2835-sdhci";
203 reg = <0x7e300000 0x100>;
205 clocks = <&clocks BCM2835_CLOCK_EMMC>;
210 compatible = "brcm,bcm2835-i2c";
211 reg = <0x7e804000 0x1000>;
213 clocks = <&clocks BCM2835_CLOCK_VPU>;
214 #address-cells = <1>;
220 compatible = "brcm,bcm2835-i2c";
221 reg = <0x7e805000 0x1000>;
223 clocks = <&clocks BCM2835_CLOCK_VPU>;
224 #address-cells = <1>;
230 compatible = "brcm,bcm2835-usb";
231 reg = <0x7e980000 0x10000>;
237 compatible = "simple-bus";
238 #address-cells = <1>;
241 /* The oscillator is the root of the clock tree. */
243 compatible = "fixed-clock";
246 clock-output-names = "osc";
247 clock-frequency = <19200000>;