2 * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
4 * Licensed under the ISC license.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "skeleton.dtsi"
14 interrupt-parent = <&gic>;
26 compatible = "arm,cortex-a7";
32 compatible = "simple-bus";
33 ranges = <0x00000000 0x18310000 0x00008000>;
37 gic: interrupt-controller@1000 {
38 compatible = "arm,cortex-a7-gic";
39 #interrupt-cells = <3>;
42 reg = <0x1000 0x1000>,
54 compatible = "fixed-clock";
55 clock-frequency = <40000000>;
60 compatible = "brcm,bus-axi";
61 reg = <0x18000000 0x1000>;
62 ranges = <0x00000000 0x18000000 0x00100000>;
66 #interrupt-cells = <1>;
67 interrupt-map-mask = <0x000fffff 0xffff>;
70 <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
73 <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
75 /* PCIe Controller 0 */
76 <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
77 <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
78 <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
79 <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
80 <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
81 <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
83 /* USB 2.0 Controller */
84 <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
86 /* Ethernet Controller 0 */
87 <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
90 <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
92 /* Ethernet Controller 1 */
93 <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
95 chipcommon: chipcommon@0 {
96 compatible = "simple-bus";
97 reg = <0x00000000 0x1000>;
100 #address-cells = <1>;
107 compatible = "ns16550a";
108 reg = <0x0300 0x100>;
109 interrupt-parent = <&gic>;
110 interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
117 reg = <0x4000 0x1000>;
119 #address-cells = <1>;
123 compatible = "generic-ehci";
124 reg = <0x4000 0x1000>;
125 interrupt-parent = <&gic>;
126 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
128 #address-cells = <1>;
143 compatible = "generic-ohci";
144 reg = <0xd000 0x1000>;
145 interrupt-parent = <&gic>;
146 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
148 #address-cells = <1>;
161 gmac0: ethernet@5000 {
162 reg = <0x5000 0x1000>;
165 gmac1: ethernet@b000 {
166 reg = <0xb000 0x1000>;
170 compatible = "simple-mfd", "syscon";
171 reg = <0x00012000 0x00001000>;
174 compatible = "brcm,bcm53573-ilp";
177 clock-output-names = "ilp";