2 * Copyright 2012 Linaro Ltd
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 /include/ "skeleton.dtsi"
18 compatible = "stericsson,db8500";
19 interrupt-parent = <&intc>;
22 intc: interrupt-controller@a0411000 {
23 compatible = "arm,cortex-a9-gic";
24 #interrupt-cells = <3>;
27 reg = <0xa0411000 0x1000>,
32 compatible = "arm,pl310-cache";
33 reg = <0xa0412000 0x1000>;
34 interrupts = <0 13 4>;
40 compatible = "arm,cortex-a9-pmu";
41 interrupts = <0 7 0x4>;
45 compatible = "arm,cortex-a9-twd-timer";
46 reg = <0xa0410600 0x20>;
47 interrupts = <1 13 0x304>;
51 compatible = "stericsson,db8500-rtc";
52 reg = <0x80154000 0x1000>;
53 interrupts = <0 18 0x4>;
56 gpio0: gpio@8012e000 {
57 compatible = "stericsson,db8500-gpio",
59 reg = <0x8012e000 0x80>;
60 interrupts = <0 119 0x4>;
65 gpio1: gpio@8012e080 {
66 compatible = "stericsson,db8500-gpio",
68 reg = <0x8012e080 0x80>;
69 interrupts = <0 120 0x4>;
74 gpio2: gpio@8000e000 {
75 compatible = "stericsson,db8500-gpio",
77 reg = <0x8000e000 0x80>;
78 interrupts = <0 121 0x4>;
83 gpio3: gpio@8000e080 {
84 compatible = "stericsson,db8500-gpio",
86 reg = <0x8000e080 0x80>;
87 interrupts = <0 122 0x4>;
92 gpio4: gpio@8000e100 {
93 compatible = "stericsson,db8500-gpio",
95 reg = <0x8000e100 0x80>;
96 interrupts = <0 123 0x4>;
101 gpio5: gpio@8000e180 {
102 compatible = "stericsson,db8500-gpio",
104 reg = <0x8000e180 0x80>;
105 interrupts = <0 124 0x4>;
110 gpio6: gpio@8011e000 {
111 compatible = "stericsson,db8500-gpio",
113 reg = <0x8011e000 0x80>;
114 interrupts = <0 125 0x4>;
119 gpio7: gpio@8011e080 {
120 compatible = "stericsson,db8500-gpio",
122 reg = <0x8011e080 0x80>;
123 interrupts = <0 126 0x4>;
128 gpio8: gpio@a03fe000 {
129 compatible = "stericsson,db8500-gpio",
131 reg = <0xa03fe000 0x80>;
132 interrupts = <0 127 0x4>;
138 compatible = "stericsson,db8500-musb",
140 reg = <0xa03e0000 0x10000>;
141 interrupts = <0 23 0x4>;
144 dma-controller@801C0000 {
145 compatible = "stericsson,db8500-dma40",
147 reg = <0x801C0000 0x1000 0x40010000 0x800>;
148 interrupts = <0 25 0x4>;
152 compatible = "stericsson,db8500-prcmu";
153 reg = <0x80157000 0x1000>;
154 interrupts = <46 47>;
155 #address-cells = <1>;
159 compatible = "stericsson,ab8500";
160 reg = <5>; /* mailbox 5 is i2c */
161 interrupts = <0 40 0x4>;
166 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
167 reg = <0x80004000 0x1000>;
168 interrupts = <0 21 0x4>;
169 #address-cells = <1>;
174 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
175 reg = <0x80122000 0x1000>;
176 interrupts = <0 22 0x4>;
177 #address-cells = <1>;
182 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
183 reg = <0x80128000 0x1000>;
184 interrupts = <0 55 0x4>;
185 #address-cells = <1>;
190 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
191 reg = <0x80110000 0x1000>;
192 interrupts = <0 12 0x4>;
193 #address-cells = <1>;
198 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
199 reg = <0x8012a000 0x1000>;
200 interrupts = <0 51 0x4>;
201 #address-cells = <1>;
206 compatible = "arm,pl022", "arm,primecell";
207 reg = <80002000 0x1000>;
208 interrupts = <0 14 0x4>;
209 #address-cells = <1>;
213 // Add one of these for each child device
214 cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
219 compatible = "arm,pl011", "arm,primecell";
220 reg = <0x80120000 0x1000>;
221 interrupts = <0 11 0x4>;
225 compatible = "arm,pl011", "arm,primecell";
226 reg = <0x80121000 0x1000>;
227 interrupts = <0 19 0x4>;
231 compatible = "arm,pl011", "arm,primecell";
232 reg = <0x80007000 0x1000>;
233 interrupts = <0 26 0x4>;
238 compatible = "arm,pl18x", "arm,primecell";
239 reg = <0x80126000 0x1000>;
240 interrupts = <0 60 0x4>;
244 compatible = "arm,pl18x", "arm,primecell";
245 reg = <0x80118000 0x1000>;
246 interrupts = <0 50 0x4>;
250 compatible = "arm,pl18x", "arm,primecell";
251 reg = <0x80005000 0x1000>;
252 interrupts = <0 41 0x4>;
256 compatible = "arm,pl18x", "arm,primecell";
257 reg = <0x80119000 0x1000>;
258 interrupts = <0 59 0x4>;
262 compatible = "arm,pl18x", "arm,primecell";
263 reg = <0x80114000 0x1000>;
264 interrupts = <0 99 0x4>;
268 compatible = "arm,pl18x", "arm,primecell";
269 reg = <0x80114000 0x1000>;
270 interrupts = <0 100 0x4>;