2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/dm814x.h>
11 compatible = "ti,dm814";
12 interrupt-parent = <&intc>;
23 ethernet0 = &cpsw_emac0;
24 ethernet1 = &cpsw_emac1;
35 compatible = "arm,cortex-a8";
42 compatible = "arm,cortex-a8-pmu";
47 * The soc node represents the soc top level view. It is used for IPs
48 * that are not memory mapped in the MPU view or for the MPU itself.
51 compatible = "ti,omap-infra";
53 compatible = "ti,omap3-mpu";
59 compatible = "simple-bus";
63 ti,hwmods = "l3_main";
66 compatible = "ti,am33xx-usb";
67 reg = <0x47400000 0x1000>;
71 ti,hwmods = "usb_otg_hs";
73 usb0_phy: usb-phy@47401300 {
74 compatible = "ti,am335x-usb-phy";
75 reg = <0x47401300 0x100>;
77 ti,ctrl_mod = <&usb_ctrl_mod>;
81 compatible = "ti,musb-am33xx";
82 reg = <0x47401400 0x400
84 reg-names = "mc", "control";
87 interrupt-names = "mc";
89 mentor,multipoint = <1>;
90 mentor,num-eps = <16>;
91 mentor,ram-bits = <12>;
95 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
96 &cppi41dma 2 0 &cppi41dma 3 0
97 &cppi41dma 4 0 &cppi41dma 5 0
98 &cppi41dma 6 0 &cppi41dma 7 0
99 &cppi41dma 8 0 &cppi41dma 9 0
100 &cppi41dma 10 0 &cppi41dma 11 0
101 &cppi41dma 12 0 &cppi41dma 13 0
102 &cppi41dma 14 0 &cppi41dma 0 1
103 &cppi41dma 1 1 &cppi41dma 2 1
104 &cppi41dma 3 1 &cppi41dma 4 1
105 &cppi41dma 5 1 &cppi41dma 6 1
106 &cppi41dma 7 1 &cppi41dma 8 1
107 &cppi41dma 9 1 &cppi41dma 10 1
108 &cppi41dma 11 1 &cppi41dma 12 1
109 &cppi41dma 13 1 &cppi41dma 14 1>;
111 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
112 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
114 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
115 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
120 compatible = "ti,musb-am33xx";
121 reg = <0x47401c00 0x400
123 reg-names = "mc", "control";
125 interrupt-names = "mc";
127 mentor,multipoint = <1>;
128 mentor,num-eps = <16>;
129 mentor,ram-bits = <12>;
130 mentor,power = <500>;
133 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
134 &cppi41dma 17 0 &cppi41dma 18 0
135 &cppi41dma 19 0 &cppi41dma 20 0
136 &cppi41dma 21 0 &cppi41dma 22 0
137 &cppi41dma 23 0 &cppi41dma 24 0
138 &cppi41dma 25 0 &cppi41dma 26 0
139 &cppi41dma 27 0 &cppi41dma 28 0
140 &cppi41dma 29 0 &cppi41dma 15 1
141 &cppi41dma 16 1 &cppi41dma 17 1
142 &cppi41dma 18 1 &cppi41dma 19 1
143 &cppi41dma 20 1 &cppi41dma 21 1
144 &cppi41dma 22 1 &cppi41dma 23 1
145 &cppi41dma 24 1 &cppi41dma 25 1
146 &cppi41dma 26 1 &cppi41dma 27 1
147 &cppi41dma 28 1 &cppi41dma 29 1>;
149 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
150 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
152 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
153 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
157 cppi41dma: dma-controller@47402000 {
158 compatible = "ti,am3359-cppi41";
159 reg = <0x47400000 0x1000
163 reg-names = "glue", "controller", "scheduler", "queuemgr";
165 interrupt-names = "glue";
167 #dma-channels = <30>;
168 #dma-requests = <256>;
173 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
174 * It shows the module target agent registers though, so the
175 * actual device is typically 0x1000 before the target agent
176 * except in cases where the module is larger than 0x1000.
178 l4ls: l4ls@48000000 {
179 compatible = "ti,dm814-l4ls", "simple-bus";
180 #address-cells = <1>;
182 ranges = <0 0x48000000 0x2000000>;
185 compatible = "ti,omap4-i2c";
186 #address-cells = <1>;
189 reg = <0x28000 0x1000>;
194 compatible = "ti,814-elm";
196 reg = <0x80000 0x2000>;
201 compatible = "ti,omap4-gpio";
204 reg = <0x32000 0x2000>;
208 interrupt-controller;
209 #interrupt-cells = <2>;
213 compatible = "ti,omap4-gpio";
216 reg = <0x4c000 0x2000>;
220 interrupt-controller;
221 #interrupt-cells = <2>;
225 compatible = "ti,omap4-i2c";
226 #address-cells = <1>;
229 reg = <0x2a000 0x1000>;
234 compatible = "ti,omap4-mcspi";
235 reg = <0x30000 0x1000>;
236 #address-cells = <1>;
240 ti,hwmods = "mcspi1";
241 dmas = <&edma 16 0 &edma 17 0
242 &edma 18 0 &edma 19 0>;
243 dma-names = "tx0", "rx0", "tx1", "rx1";
246 timer1: timer@2e000 {
247 compatible = "ti,dm814-timer";
248 reg = <0x2e000 0x2000>;
250 ti,hwmods = "timer1";
255 compatible = "ti,omap3-uart";
257 reg = <0x20000 0x2000>;
258 clock-frequency = <48000000>;
260 dmas = <&edma 26 0 &edma 27 0>;
261 dma-names = "tx", "rx";
265 compatible = "ti,omap3-uart";
267 reg = <0x22000 0x2000>;
268 clock-frequency = <48000000>;
270 dmas = <&edma 28 0 &edma 29 0>;
271 dma-names = "tx", "rx";
275 compatible = "ti,omap3-uart";
277 reg = <0x24000 0x2000>;
278 clock-frequency = <48000000>;
280 dmas = <&edma 30 0 &edma 31 0>;
281 dma-names = "tx", "rx";
284 timer2: timer@40000 {
285 compatible = "ti,dm814-timer";
286 reg = <0x40000 0x2000>;
288 ti,hwmods = "timer2";
291 timer3: timer@42000 {
292 compatible = "ti,dm814-timer";
293 reg = <0x42000 0x2000>;
295 ti,hwmods = "timer3";
299 compatible = "ti,omap4-hsmmc";
303 dma-names = "tx", "rx";
305 interrupt-parent = <&intc>;
306 reg = <0x60000 0x1000>;
310 compatible = "ti,am3352-rtc", "ti,da830-rtc";
311 reg = <0xc0000 0x1000>;
312 interrupts = <75 76>;
317 compatible = "ti,omap4-hsmmc";
321 dma-names = "tx", "rx";
323 interrupt-parent = <&intc>;
324 reg = <0x1d8000 0x1000>;
327 control: control@140000 {
328 compatible = "ti,dm814-scm", "simple-bus";
329 reg = <0x140000 0x20000>;
330 #address-cells = <1>;
332 ranges = <0 0x140000 0x20000>;
334 scm_conf: scm_conf@0 {
335 compatible = "syscon";
337 #address-cells = <1>;
341 #address-cells = <1>;
345 scm_clockdomains: clockdomains {
349 usb_ctrl_mod: control@620 {
350 compatible = "ti,am335x-usb-ctrl-module";
353 reg-names = "phy_ctrl", "wakeup";
356 edma_xbar: dma-router@f90 {
357 compatible = "ti,am335x-edma-crossbar";
361 dma-masters = <&edma>;
365 * Note that silicon revision 2.1 and older
366 * require input enabled (bit 18 set) for all
367 * 3.3V I/Os to avoid cumulative hardware damage.
368 * For more info, see errata advisory 2.1.87.
369 * We leave bit 18 out of function-mask and rely
370 * on the bootloader for it.
372 pincntl: pinmux@800 {
373 compatible = "pinctrl-single";
375 #address-cells = <1>;
377 #pinctrl-cells = <1>;
378 pinctrl-single,register-width = <32>;
379 pinctrl-single,function-mask = <0x307ff>;
382 usb1_phy: usb-phy@1b00 {
383 compatible = "ti,am335x-usb-phy";
384 reg = <0x1b00 0x100>;
386 ti,ctrl_mod = <&usb_ctrl_mod>;
391 compatible = "ti,dm814-prcm", "simple-bus";
392 reg = <0x180000 0x2000>;
393 #address-cells = <1>;
395 ranges = <0 0x180000 0x2000>;
397 prcm_clocks: clocks {
398 #address-cells = <1>;
402 prcm_clockdomains: clockdomains {
406 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
407 pllss: pllss@1c5000 {
408 compatible = "ti,dm814-pllss", "simple-bus";
409 reg = <0x1c5000 0x1000>;
410 #address-cells = <1>;
412 ranges = <0 0x1c5000 0x1000>;
414 pllss_clocks: clocks {
415 #address-cells = <1>;
419 pllss_clockdomains: clockdomains {
424 compatible = "ti,omap3-wdt";
425 ti,hwmods = "wd_timer";
426 reg = <0x1c7000 0x1000>;
431 intc: interrupt-controller@48200000 {
432 compatible = "ti,dm814-intc";
433 interrupt-controller;
434 #interrupt-cells = <1>;
435 reg = <0x48200000 0x1000>;
438 /* Board must configure evtmux with edma_xbar for EDMA */
440 compatible = "ti,omap4-hsmmc";
443 interrupt-parent = <&intc>;
444 reg = <0x47810000 0x1000>;
447 edma: edma@49000000 {
448 compatible = "ti,edma3-tpcc";
450 reg = <0x49000000 0x10000>;
451 reg-names = "edma3_cc";
452 interrupts = <12 13 14>;
453 interrupt-names = "edma3_ccint", "edma3_mperr",
458 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
459 <&edma_tptc2 3>, <&edma_tptc3 0>;
461 ti,edma-memcpy-channels = <20 21>;
464 edma_tptc0: tptc@49800000 {
465 compatible = "ti,edma3-tptc";
467 reg = <0x49800000 0x100000>;
469 interrupt-names = "edma3_tcerrint";
472 edma_tptc1: tptc@49900000 {
473 compatible = "ti,edma3-tptc";
475 reg = <0x49900000 0x100000>;
477 interrupt-names = "edma3_tcerrint";
480 edma_tptc2: tptc@49a00000 {
481 compatible = "ti,edma3-tptc";
483 reg = <0x49a00000 0x100000>;
485 interrupt-names = "edma3_tcerrint";
488 edma_tptc3: tptc@49b00000 {
489 compatible = "ti,edma3-tptc";
491 reg = <0x49b00000 0x100000>;
493 interrupt-names = "edma3_tcerrint";
496 /* See TRM "Table 1-318. L4HS Instance Summary" */
497 l4hs: l4hs@4a000000 {
498 compatible = "ti,dm814-l4hs", "simple-bus";
499 #address-cells = <1>;
501 ranges = <0 0x4a000000 0x1b4040>;
504 /* REVISIT: Move to live under l4hs once driver is fixed */
505 mac: ethernet@4a100000 {
506 compatible = "ti,cpsw";
507 ti,hwmods = "cpgmac0";
508 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
509 clock-names = "fck", "cpts";
510 cpdma_channels = <8>;
511 ale_entries = <1024>;
512 bd_ram_size = <0x2000>;
514 mac_control = <0x20>;
517 cpts_clock_mult = <0x80000000>;
518 cpts_clock_shift = <29>;
519 reg = <0x4a100000 0x800
521 #address-cells = <1>;
523 interrupt-parent = <&intc>;
530 interrupts = <40 41 42 43>;
532 syscon = <&scm_conf>;
534 davinci_mdio: mdio@4a100800 {
535 compatible = "ti,davinci_mdio";
536 #address-cells = <1>;
538 ti,hwmods = "davinci_mdio";
539 bus_freq = <1000000>;
540 reg = <0x4a100800 0x100>;
543 cpsw_emac0: slave@4a100200 {
544 /* Filled in by U-Boot */
545 mac-address = [ 00 00 00 00 00 00 ];
548 cpsw_emac1: slave@4a100300 {
549 /* Filled in by U-Boot */
550 mac-address = [ 00 00 00 00 00 00 ];
553 phy_sel: cpsw-phy-sel@48140650 {
554 compatible = "ti,am3352-cpsw-phy-sel";
555 reg= <0x48140650 0x4>;
556 reg-names = "gmii-sel";
560 gpmc: gpmc@50000000 {
561 compatible = "ti,am3352-gpmc";
564 reg = <0x50000000 0x2000>;
567 gpmc,num-waitpins = <2>;
568 #address-cells = <2>;
570 interrupt-controller;
571 #interrupt-cells = <2>;
578 #include "dm814x-clocks.dtsi"