2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/dm814x.h>
10 #include "skeleton.dtsi"
13 compatible = "ti,dm814";
14 interrupt-parent = <&intc>;
22 ethernet0 = &cpsw_emac0;
23 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a8";
41 compatible = "arm,cortex-a8-pmu";
46 * The soc node represents the soc top level view. It is used for IPs
47 * that are not memory mapped in the MPU view or for the MPU itself.
50 compatible = "ti,omap-infra";
52 compatible = "ti,omap3-mpu";
58 compatible = "simple-bus";
62 ti,hwmods = "l3_main";
65 compatible = "ti,am33xx-usb";
66 reg = <0x47400000 0x1000>;
70 ti,hwmods = "usb_otg_hs";
72 usb0_phy: usb-phy@47401300 {
73 compatible = "ti,am335x-usb-phy";
74 reg = <0x47401300 0x100>;
76 ti,ctrl_mod = <&usb_ctrl_mod>;
80 compatible = "ti,musb-am33xx";
81 reg = <0x47401400 0x400
83 reg-names = "mc", "control";
86 interrupt-names = "mc";
88 mentor,multipoint = <1>;
89 mentor,num-eps = <16>;
90 mentor,ram-bits = <12>;
94 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
95 &cppi41dma 2 0 &cppi41dma 3 0
96 &cppi41dma 4 0 &cppi41dma 5 0
97 &cppi41dma 6 0 &cppi41dma 7 0
98 &cppi41dma 8 0 &cppi41dma 9 0
99 &cppi41dma 10 0 &cppi41dma 11 0
100 &cppi41dma 12 0 &cppi41dma 13 0
101 &cppi41dma 14 0 &cppi41dma 0 1
102 &cppi41dma 1 1 &cppi41dma 2 1
103 &cppi41dma 3 1 &cppi41dma 4 1
104 &cppi41dma 5 1 &cppi41dma 6 1
105 &cppi41dma 7 1 &cppi41dma 8 1
106 &cppi41dma 9 1 &cppi41dma 10 1
107 &cppi41dma 11 1 &cppi41dma 12 1
108 &cppi41dma 13 1 &cppi41dma 14 1>;
110 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
111 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
113 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
114 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
119 compatible = "ti,musb-am33xx";
120 reg = <0x47401c00 0x400
122 reg-names = "mc", "control";
124 interrupt-names = "mc";
126 mentor,multipoint = <1>;
127 mentor,num-eps = <16>;
128 mentor,ram-bits = <12>;
129 mentor,power = <500>;
132 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
133 &cppi41dma 17 0 &cppi41dma 18 0
134 &cppi41dma 19 0 &cppi41dma 20 0
135 &cppi41dma 21 0 &cppi41dma 22 0
136 &cppi41dma 23 0 &cppi41dma 24 0
137 &cppi41dma 25 0 &cppi41dma 26 0
138 &cppi41dma 27 0 &cppi41dma 28 0
139 &cppi41dma 29 0 &cppi41dma 15 1
140 &cppi41dma 16 1 &cppi41dma 17 1
141 &cppi41dma 18 1 &cppi41dma 19 1
142 &cppi41dma 20 1 &cppi41dma 21 1
143 &cppi41dma 22 1 &cppi41dma 23 1
144 &cppi41dma 24 1 &cppi41dma 25 1
145 &cppi41dma 26 1 &cppi41dma 27 1
146 &cppi41dma 28 1 &cppi41dma 29 1>;
148 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
149 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
151 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
152 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
156 cppi41dma: dma-controller@47402000 {
157 compatible = "ti,am3359-cppi41";
158 reg = <0x47400000 0x1000
162 reg-names = "glue", "controller", "scheduler", "queuemgr";
164 interrupt-names = "glue";
166 #dma-channels = <30>;
167 #dma-requests = <256>;
172 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
173 * It shows the module target agent registers though, so the
174 * actual device is typically 0x1000 before the target agent
175 * except in cases where the module is larger than 0x1000.
177 l4ls: l4ls@48000000 {
178 compatible = "ti,dm814-l4ls", "simple-bus";
179 #address-cells = <1>;
181 ranges = <0 0x48000000 0x2000000>;
184 compatible = "ti,omap4-i2c";
185 #address-cells = <1>;
188 reg = <0x28000 0x1000>;
193 compatible = "ti,814-elm";
195 reg = <0x80000 0x2000>;
200 compatible = "ti,omap4-gpio";
203 reg = <0x32000 0x2000>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
212 compatible = "ti,omap4-gpio";
215 reg = <0x4c000 0x2000>;
219 interrupt-controller;
220 #interrupt-cells = <2>;
224 compatible = "ti,omap4-i2c";
225 #address-cells = <1>;
228 reg = <0x2a000 0x1000>;
233 compatible = "ti,omap4-mcspi";
234 reg = <0x30000 0x1000>;
235 #address-cells = <1>;
239 ti,hwmods = "mcspi1";
240 dmas = <&edma 16 0 &edma 17 0
241 &edma 18 0 &edma 19 0>;
242 dma-names = "tx0", "rx0", "tx1", "rx1";
245 timer1: timer@2e000 {
246 compatible = "ti,dm814-timer";
247 reg = <0x2e000 0x2000>;
249 ti,hwmods = "timer1";
254 compatible = "ti,omap3-uart";
256 reg = <0x20000 0x2000>;
257 clock-frequency = <48000000>;
259 dmas = <&edma 26 0 &edma 27 0>;
260 dma-names = "tx", "rx";
264 compatible = "ti,omap3-uart";
266 reg = <0x22000 0x2000>;
267 clock-frequency = <48000000>;
269 dmas = <&edma 28 0 &edma 29 0>;
270 dma-names = "tx", "rx";
274 compatible = "ti,omap3-uart";
276 reg = <0x24000 0x2000>;
277 clock-frequency = <48000000>;
279 dmas = <&edma 30 0 &edma 31 0>;
280 dma-names = "tx", "rx";
283 timer2: timer@40000 {
284 compatible = "ti,dm814-timer";
285 reg = <0x40000 0x2000>;
287 ti,hwmods = "timer2";
290 timer3: timer@42000 {
291 compatible = "ti,dm814-timer";
292 reg = <0x42000 0x2000>;
294 ti,hwmods = "timer3";
298 compatible = "ti,omap4-hsmmc";
302 dma-names = "tx", "rx";
304 interrupt-parent = <&intc>;
305 reg = <0x60000 0x1000>;
309 compatible = "ti,omap4-hsmmc";
313 dma-names = "tx", "rx";
315 interrupt-parent = <&intc>;
316 reg = <0x1d8000 0x1000>;
319 control: control@140000 {
320 compatible = "ti,dm814-scm", "simple-bus";
321 reg = <0x140000 0x20000>;
322 #address-cells = <1>;
324 ranges = <0 0x140000 0x20000>;
326 scm_conf: scm_conf@0 {
327 compatible = "syscon";
329 #address-cells = <1>;
333 #address-cells = <1>;
337 scm_clockdomains: clockdomains {
341 usb_ctrl_mod: control@620 {
342 compatible = "ti,am335x-usb-ctrl-module";
345 reg-names = "phy_ctrl", "wakeup";
348 edma_xbar: dma-router@f90 {
349 compatible = "ti,am335x-edma-crossbar";
353 dma-masters = <&edma>;
357 * Note that silicon revision 2.1 and older
358 * require input enabled (bit 18 set) for all
359 * 3.3V I/Os to avoid cumulative hardware damage.
360 * For more info, see errata advisory 2.1.87.
361 * We leave bit 18 out of function-mask and rely
362 * on the bootloader for it.
364 pincntl: pinmux@800 {
365 compatible = "pinctrl-single";
367 #address-cells = <1>;
369 pinctrl-single,register-width = <32>;
370 pinctrl-single,function-mask = <0x307ff>;
373 usb1_phy: usb-phy@1b00 {
374 compatible = "ti,am335x-usb-phy";
375 reg = <0x1b00 0x100>;
377 ti,ctrl_mod = <&usb_ctrl_mod>;
382 compatible = "ti,dm814-prcm", "simple-bus";
383 reg = <0x180000 0x2000>;
384 #address-cells = <1>;
386 ranges = <0 0x180000 0x2000>;
388 prcm_clocks: clocks {
389 #address-cells = <1>;
393 prcm_clockdomains: clockdomains {
397 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
398 pllss: pllss@1c5000 {
399 compatible = "ti,dm814-pllss", "simple-bus";
400 reg = <0x1c5000 0x1000>;
401 #address-cells = <1>;
403 ranges = <0 0x1c5000 0x1000>;
405 pllss_clocks: clocks {
406 #address-cells = <1>;
410 pllss_clockdomains: clockdomains {
415 compatible = "ti,omap3-wdt";
416 ti,hwmods = "wd_timer";
417 reg = <0x1c7000 0x1000>;
422 intc: interrupt-controller@48200000 {
423 compatible = "ti,dm814-intc";
424 interrupt-controller;
425 #interrupt-cells = <1>;
426 reg = <0x48200000 0x1000>;
429 /* Board must configure evtmux with edma_xbar for EDMA */
431 compatible = "ti,omap4-hsmmc";
434 interrupt-parent = <&intc>;
435 reg = <0x47810000 0x1000>;
438 edma: edma@49000000 {
439 compatible = "ti,edma3-tpcc";
441 reg = <0x49000000 0x10000>;
442 reg-names = "edma3_cc";
443 interrupts = <12 13 14>;
444 interrupt-names = "edma3_ccint", "emda3_mperr",
449 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
450 <&edma_tptc2 3>, <&edma_tptc3 0>;
452 ti,edma-memcpy-channels = <20 21>;
455 edma_tptc0: tptc@49800000 {
456 compatible = "ti,edma3-tptc";
458 reg = <0x49800000 0x100000>;
460 interrupt-names = "edma3_tcerrint";
463 edma_tptc1: tptc@49900000 {
464 compatible = "ti,edma3-tptc";
466 reg = <0x49900000 0x100000>;
468 interrupt-names = "edma3_tcerrint";
471 edma_tptc2: tptc@49a00000 {
472 compatible = "ti,edma3-tptc";
474 reg = <0x49a00000 0x100000>;
476 interrupt-names = "edma3_tcerrint";
479 edma_tptc3: tptc@49b00000 {
480 compatible = "ti,edma3-tptc";
482 reg = <0x49b00000 0x100000>;
484 interrupt-names = "edma3_tcerrint";
487 /* See TRM "Table 1-318. L4HS Instance Summary" */
488 l4hs: l4hs@4a000000 {
489 compatible = "ti,dm814-l4hs", "simple-bus";
490 #address-cells = <1>;
492 ranges = <0 0x4a000000 0x1b4040>;
495 /* REVISIT: Move to live under l4hs once driver is fixed */
496 mac: ethernet@4a100000 {
497 compatible = "ti,cpsw";
498 ti,hwmods = "cpgmac0";
499 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
500 clock-names = "fck", "cpts";
501 cpdma_channels = <8>;
502 ale_entries = <1024>;
503 bd_ram_size = <0x2000>;
506 mac_control = <0x20>;
509 cpts_clock_mult = <0x80000000>;
510 cpts_clock_shift = <29>;
511 reg = <0x4a100000 0x800
513 #address-cells = <1>;
515 interrupt-parent = <&intc>;
522 interrupts = <40 41 42 43>;
524 syscon = <&scm_conf>;
526 davinci_mdio: mdio@4a100800 {
527 compatible = "ti,davinci_mdio";
528 #address-cells = <1>;
530 ti,hwmods = "davinci_mdio";
531 bus_freq = <1000000>;
532 reg = <0x4a100800 0x100>;
535 cpsw_emac0: slave@4a100200 {
536 /* Filled in by U-Boot */
537 mac-address = [ 00 00 00 00 00 00 ];
540 cpsw_emac1: slave@4a100300 {
541 /* Filled in by U-Boot */
542 mac-address = [ 00 00 00 00 00 00 ];
545 phy_sel: cpsw-phy-sel@48140650 {
546 compatible = "ti,am3352-cpsw-phy-sel";
547 reg= <0x48140650 0x4>;
548 reg-names = "gmii-sel";
554 #include "dm814x-clocks.dtsi"