2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
10 #include "skeleton.dtsi"
13 compatible = "ti,dm816";
14 interrupt-parent = <&intc>;
30 compatible = "arm,cortex-a8";
37 compatible = "arm,cortex-a8-pmu";
42 * The soc node represents the soc top level view. It is used for IPs
43 * that are not memory mapped in the MPU view or for the MPU itself.
46 compatible = "ti,omap-infra";
48 compatible = "ti,omap3-mpu";
54 * XXX: Use a flat representation of the dm816x interconnect.
55 * The real dm816x interconnect network is quite complex. Since
56 * it will not bring real advantage to represent that in DT
57 * for the moment, just use a fake OCP bus entry to represent
58 * the whole bus hierarchy.
61 compatible = "simple-bus";
62 reg = <0x44000000 0x10000>;
69 compatible = "ti,dm816-prcm";
70 reg = <0x48180000 0x4000>;
77 prcm_clockdomains: clockdomains {
82 compatible = "ti,dm816-scrm", "simple-bus";
83 reg = <0x48140000 0x21000>;
86 ranges = <0 0x48140000 0x21000>;
88 dm816x_pinmux: pinmux@800 {
89 compatible = "pinctrl-single";
93 pinctrl-single,register-width = <16>;
94 pinctrl-single,function-mask = <0xf>;
97 /* Device Configuration Registers */
98 scm_conf: syscon@600 {
99 compatible = "syscon", "simple-bus";
101 #address-cells = <1>;
103 ranges = <0 0x600 0x110>;
105 usb_phy0: usb-phy@20 {
106 compatible = "ti,dm8168-usb-phy";
109 clocks = <&main_fapll 6>;
110 clock-names = "refclk";
112 syscon = <&scm_conf>;
115 usb_phy1: usb-phy@28 {
116 compatible = "ti,dm8168-usb-phy";
119 clocks = <&main_fapll 6>;
120 clock-names = "refclk";
122 syscon = <&scm_conf>;
126 scrm_clocks: clocks {
127 #address-cells = <1>;
131 scrm_clockdomains: clockdomains {
135 edma: edma@49000000 {
136 compatible = "ti,edma3";
137 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
138 reg = <0x49000000 0x10000>,
140 interrupts = <12 13 14>;
145 compatible = "ti,816-elm";
147 reg = <0x48080000 0x2000>;
151 gpio1: gpio@48032000 {
152 compatible = "ti,omap4-gpio";
155 reg = <0x48032000 0x1000>;
159 interrupt-controller;
160 #interrupt-cells = <2>;
163 gpio2: gpio@4804c000 {
164 compatible = "ti,omap4-gpio";
167 reg = <0x4804c000 0x1000>;
171 interrupt-controller;
172 #interrupt-cells = <2>;
175 gpmc: gpmc@50000000 {
176 compatible = "ti,am3352-gpmc";
178 reg = <0x50000000 0x2000>;
179 #address-cells = <2>;
185 gpmc,num-waitpins = <2>;
186 interrupt-controller;
187 #interrupt-cells = <2>;
191 compatible = "ti,omap4-i2c";
193 reg = <0x48028000 0x1000>;
194 #address-cells = <1>;
197 dmas = <&edma 58 &edma 59>;
198 dma-names = "tx", "rx";
202 compatible = "ti,omap4-i2c";
204 reg = <0x4802a000 0x1000>;
205 #address-cells = <1>;
208 dmas = <&edma 60 &edma 61>;
209 dma-names = "tx", "rx";
212 intc: interrupt-controller@48200000 {
213 compatible = "ti,dm816-intc";
214 interrupt-controller;
215 #interrupt-cells = <1>;
216 reg = <0x48200000 0x1000>;
220 compatible = "ti,am3352-rtc", "ti,da830-rtc";
221 reg = <0x480c0000 0x1000>;
222 interrupts = <75 76>;
226 mailbox: mailbox@480c8000 {
227 compatible = "ti,omap4-mailbox";
228 reg = <0x480c8000 0x2000>;
230 ti,hwmods = "mailbox";
232 ti,mbox-num-users = <4>;
233 ti,mbox-num-fifos = <12>;
235 ti,mbox-tx = <3 0 0>;
236 ti,mbox-rx = <0 0 0>;
240 spinbox: spinbox@480ca000 {
241 compatible = "ti,omap4-hwspinlock";
242 reg = <0x480ca000 0x2000>;
243 ti,hwmods = "spinbox";
247 mdio: mdio@4a100800 {
248 compatible = "ti,davinci_mdio";
249 #address-cells = <1>;
251 reg = <0x4a100800 0x100>;
252 ti,hwmods = "davinci_mdio";
253 bus_freq = <1000000>;
254 phy0: ethernet-phy@0 {
257 phy1: ethernet-phy@1 {
262 eth0: ethernet@4a100000 {
263 compatible = "ti,dm816-emac";
265 reg = <0x4a100000 0x800
267 clocks = <&sysclk24_ck>;
268 syscon = <&scm_conf>;
269 ti,davinci-ctrl-reg-offset = <0>;
270 ti,davinci-ctrl-mod-reg-offset = <0x900>;
271 ti,davinci-ctrl-ram-offset = <0x2000>;
272 ti,davinci-ctrl-ram-size = <0x2000>;
273 interrupts = <40 41 42 43>;
274 phy-handle = <&phy0>;
277 eth1: ethernet@4a120000 {
278 compatible = "ti,dm816-emac";
280 reg = <0x4a120000 0x4000>;
281 clocks = <&sysclk24_ck>;
282 syscon = <&scm_conf>;
283 ti,davinci-ctrl-reg-offset = <0>;
284 ti,davinci-ctrl-mod-reg-offset = <0x900>;
285 ti,davinci-ctrl-ram-offset = <0x2000>;
286 ti,davinci-ctrl-ram-size = <0x2000>;
287 interrupts = <44 45 46 47>;
288 phy-handle = <&phy1>;
291 mcspi1: spi@48030000 {
292 compatible = "ti,omap4-mcspi";
293 reg = <0x48030000 0x1000>;
294 #address-cells = <1>;
298 ti,hwmods = "mcspi1";
299 dmas = <&edma 16 &edma 17
303 dma-names = "tx0", "rx0", "tx1", "rx1",
304 "tx2", "rx2", "tx3", "rx3";
308 compatible = "ti,omap4-hsmmc";
309 reg = <0x48060000 0x11000>;
312 dmas = <&edma 24 &edma 25>;
313 dma-names = "tx", "rx";
316 timer1: timer@4802e000 {
317 compatible = "ti,dm816-timer";
318 reg = <0x4802e000 0x2000>;
320 ti,hwmods = "timer1";
324 timer2: timer@48040000 {
325 compatible = "ti,dm816-timer";
326 reg = <0x48040000 0x2000>;
328 ti,hwmods = "timer2";
331 timer3: timer@48042000 {
332 compatible = "ti,dm816-timer";
333 reg = <0x48042000 0x2000>;
335 ti,hwmods = "timer3";
338 timer4: timer@48044000 {
339 compatible = "ti,dm816-timer";
340 reg = <0x48044000 0x2000>;
342 ti,hwmods = "timer4";
346 timer5: timer@48046000 {
347 compatible = "ti,dm816-timer";
348 reg = <0x48046000 0x2000>;
350 ti,hwmods = "timer5";
354 timer6: timer@48048000 {
355 compatible = "ti,dm816-timer";
356 reg = <0x48048000 0x2000>;
358 ti,hwmods = "timer6";
362 timer7: timer@4804a000 {
363 compatible = "ti,dm816-timer";
364 reg = <0x4804a000 0x2000>;
366 ti,hwmods = "timer7";
370 uart1: uart@48020000 {
371 compatible = "ti,omap3-uart";
373 reg = <0x48020000 0x2000>;
374 clock-frequency = <48000000>;
376 dmas = <&edma 26 &edma 27>;
377 dma-names = "tx", "rx";
380 uart2: uart@48022000 {
381 compatible = "ti,omap3-uart";
383 reg = <0x48022000 0x2000>;
384 clock-frequency = <48000000>;
386 dmas = <&edma 28 &edma 29>;
387 dma-names = "tx", "rx";
390 uart3: uart@48024000 {
391 compatible = "ti,omap3-uart";
393 reg = <0x48024000 0x2000>;
394 clock-frequency = <48000000>;
396 dmas = <&edma 30 &edma 31>;
397 dma-names = "tx", "rx";
400 /* NOTE: USB needs a transceiver driver for phys to work */
401 usb: usb_otg_hs@47401000 {
402 compatible = "ti,am33xx-usb";
403 reg = <0x47401000 0x400000>;
405 #address-cells = <1>;
407 ti,hwmods = "usb_otg_hs";
410 compatible = "ti,musb-dm816";
411 reg = <0x47401400 0x400
413 reg-names = "mc", "control";
415 interrupt-names = "mc";
417 interface-type = <0>;
419 phy-names = "usb2-phy";
420 mentor,multipoint = <1>;
421 mentor,num-eps = <16>;
422 mentor,ram-bits = <12>;
423 mentor,power = <500>;
425 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
426 &cppi41dma 2 0 &cppi41dma 3 0
427 &cppi41dma 4 0 &cppi41dma 5 0
428 &cppi41dma 6 0 &cppi41dma 7 0
429 &cppi41dma 8 0 &cppi41dma 9 0
430 &cppi41dma 10 0 &cppi41dma 11 0
431 &cppi41dma 12 0 &cppi41dma 13 0
432 &cppi41dma 14 0 &cppi41dma 0 1
433 &cppi41dma 1 1 &cppi41dma 2 1
434 &cppi41dma 3 1 &cppi41dma 4 1
435 &cppi41dma 5 1 &cppi41dma 6 1
436 &cppi41dma 7 1 &cppi41dma 8 1
437 &cppi41dma 9 1 &cppi41dma 10 1
438 &cppi41dma 11 1 &cppi41dma 12 1
439 &cppi41dma 13 1 &cppi41dma 14 1>;
441 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
442 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
444 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
445 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
450 compatible = "ti,musb-dm816";
451 reg = <0x47401c00 0x400
453 reg-names = "mc", "control";
455 interrupt-names = "mc";
457 interface-type = <0>;
459 phy-names = "usb2-phy";
460 mentor,multipoint = <1>;
461 mentor,num-eps = <16>;
462 mentor,ram-bits = <12>;
463 mentor,power = <500>;
465 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
466 &cppi41dma 17 0 &cppi41dma 18 0
467 &cppi41dma 19 0 &cppi41dma 20 0
468 &cppi41dma 21 0 &cppi41dma 22 0
469 &cppi41dma 23 0 &cppi41dma 24 0
470 &cppi41dma 25 0 &cppi41dma 26 0
471 &cppi41dma 27 0 &cppi41dma 28 0
472 &cppi41dma 29 0 &cppi41dma 15 1
473 &cppi41dma 16 1 &cppi41dma 17 1
474 &cppi41dma 18 1 &cppi41dma 19 1
475 &cppi41dma 20 1 &cppi41dma 21 1
476 &cppi41dma 22 1 &cppi41dma 23 1
477 &cppi41dma 24 1 &cppi41dma 25 1
478 &cppi41dma 26 1 &cppi41dma 27 1
479 &cppi41dma 28 1 &cppi41dma 29 1>;
481 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
482 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
484 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
485 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
489 cppi41dma: dma-controller@47402000 {
490 compatible = "ti,am3359-cppi41";
491 reg = <0x47400000 0x1000
495 reg-names = "glue", "controller", "scheduler", "queuemgr";
497 interrupt-names = "glue";
499 #dma-channels = <30>;
500 #dma-requests = <256>;
504 wd_timer2: wd_timer@480c2000 {
505 compatible = "ti,omap3-wdt";
506 ti,hwmods = "wd_timer";
507 reg = <0x480c2000 0x1000>;
513 #include "dm816x-clocks.dtsi"