2 * Samsung's Exynos4 SoC series common device tree source
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
22 /include/ "skeleton.dtsi"
25 interrupt-parent = <&gic>;
41 pd_mfc: mfc-power-domain@10023C40 {
42 compatible = "samsung,exynos4210-pd";
43 reg = <0x10023C40 0x20>;
46 pd_g3d: g3d-power-domain@10023C60 {
47 compatible = "samsung,exynos4210-pd";
48 reg = <0x10023C60 0x20>;
51 pd_lcd0: lcd0-power-domain@10023C80 {
52 compatible = "samsung,exynos4210-pd";
53 reg = <0x10023C80 0x20>;
56 pd_tv: tv-power-domain@10023C20 {
57 compatible = "samsung,exynos4210-pd";
58 reg = <0x10023C20 0x20>;
61 pd_cam: cam-power-domain@10023C00 {
62 compatible = "samsung,exynos4210-pd";
63 reg = <0x10023C00 0x20>;
66 pd_gps: gps-power-domain@10023CE0 {
67 compatible = "samsung,exynos4210-pd";
68 reg = <0x10023CE0 0x20>;
71 gic:interrupt-controller@10490000 {
72 compatible = "arm,cortex-a9-gic";
73 #interrupt-cells = <3>;
75 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
78 combiner:interrupt-controller@10440000 {
79 compatible = "samsung,exynos4210-combiner";
80 #interrupt-cells = <2>;
82 reg = <0x10440000 0x1000>;
86 compatible = "samsung,exynos4-sysreg", "syscon";
87 reg = <0x10010000 0x400>;
91 compatible = "samsung,s3c2410-wdt";
92 reg = <0x10060000 0x100>;
93 interrupts = <0 43 0>;
94 clocks = <&clock 345>;
95 clock-names = "watchdog";
100 compatible = "samsung,s3c6410-rtc";
101 reg = <0x10070000 0x100>;
102 interrupts = <0 44 0>, <0 45 0>;
103 clocks = <&clock 346>;
109 compatible = "samsung,s5pv210-keypad";
110 reg = <0x100A0000 0x100>;
111 interrupts = <0 109 0>;
112 clocks = <&clock 347>;
113 clock-names = "keypad";
118 compatible = "samsung,exynos4210-sdhci";
119 reg = <0x12510000 0x100>;
120 interrupts = <0 73 0>;
121 clocks = <&clock 297>, <&clock 145>;
122 clock-names = "hsmmc", "mmc_busclk.2";
127 compatible = "samsung,exynos4210-sdhci";
128 reg = <0x12520000 0x100>;
129 interrupts = <0 74 0>;
130 clocks = <&clock 298>, <&clock 146>;
131 clock-names = "hsmmc", "mmc_busclk.2";
136 compatible = "samsung,exynos4210-sdhci";
137 reg = <0x12530000 0x100>;
138 interrupts = <0 75 0>;
139 clocks = <&clock 299>, <&clock 147>;
140 clock-names = "hsmmc", "mmc_busclk.2";
145 compatible = "samsung,exynos4210-sdhci";
146 reg = <0x12540000 0x100>;
147 interrupts = <0 76 0>;
148 clocks = <&clock 300>, <&clock 148>;
149 clock-names = "hsmmc", "mmc_busclk.2";
153 mfc: codec@13400000 {
154 compatible = "samsung,mfc-v5";
155 reg = <0x13400000 0x10000>;
156 interrupts = <0 94 0>;
157 samsung,power-domain = <&pd_mfc>;
162 compatible = "samsung,exynos4210-uart";
163 reg = <0x13800000 0x100>;
164 interrupts = <0 52 0>;
165 clocks = <&clock 312>, <&clock 151>;
166 clock-names = "uart", "clk_uart_baud0";
171 compatible = "samsung,exynos4210-uart";
172 reg = <0x13810000 0x100>;
173 interrupts = <0 53 0>;
174 clocks = <&clock 313>, <&clock 152>;
175 clock-names = "uart", "clk_uart_baud0";
180 compatible = "samsung,exynos4210-uart";
181 reg = <0x13820000 0x100>;
182 interrupts = <0 54 0>;
183 clocks = <&clock 314>, <&clock 153>;
184 clock-names = "uart", "clk_uart_baud0";
189 compatible = "samsung,exynos4210-uart";
190 reg = <0x13830000 0x100>;
191 interrupts = <0 55 0>;
192 clocks = <&clock 315>, <&clock 154>;
193 clock-names = "uart", "clk_uart_baud0";
197 i2c_0: i2c@13860000 {
198 #address-cells = <1>;
200 compatible = "samsung,s3c2440-i2c";
201 reg = <0x13860000 0x100>;
202 interrupts = <0 58 0>;
203 clocks = <&clock 317>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&i2c0_bus>;
210 i2c_1: i2c@13870000 {
211 #address-cells = <1>;
213 compatible = "samsung,s3c2440-i2c";
214 reg = <0x13870000 0x100>;
215 interrupts = <0 59 0>;
216 clocks = <&clock 318>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&i2c1_bus>;
223 i2c_2: i2c@13880000 {
224 #address-cells = <1>;
226 compatible = "samsung,s3c2440-i2c";
227 reg = <0x13880000 0x100>;
228 interrupts = <0 60 0>;
229 clocks = <&clock 319>;
234 i2c_3: i2c@13890000 {
235 #address-cells = <1>;
237 compatible = "samsung,s3c2440-i2c";
238 reg = <0x13890000 0x100>;
239 interrupts = <0 61 0>;
240 clocks = <&clock 320>;
245 i2c_4: i2c@138A0000 {
246 #address-cells = <1>;
248 compatible = "samsung,s3c2440-i2c";
249 reg = <0x138A0000 0x100>;
250 interrupts = <0 62 0>;
251 clocks = <&clock 321>;
256 i2c_5: i2c@138B0000 {
257 #address-cells = <1>;
259 compatible = "samsung,s3c2440-i2c";
260 reg = <0x138B0000 0x100>;
261 interrupts = <0 63 0>;
262 clocks = <&clock 322>;
267 i2c_6: i2c@138C0000 {
268 #address-cells = <1>;
270 compatible = "samsung,s3c2440-i2c";
271 reg = <0x138C0000 0x100>;
272 interrupts = <0 64 0>;
273 clocks = <&clock 323>;
278 i2c_7: i2c@138D0000 {
279 #address-cells = <1>;
281 compatible = "samsung,s3c2440-i2c";
282 reg = <0x138D0000 0x100>;
283 interrupts = <0 65 0>;
284 clocks = <&clock 324>;
289 spi_0: spi@13920000 {
290 compatible = "samsung,exynos4210-spi";
291 reg = <0x13920000 0x100>;
292 interrupts = <0 66 0>;
293 tx-dma-channel = <&pdma0 7>; /* preliminary */
294 rx-dma-channel = <&pdma0 6>; /* preliminary */
295 #address-cells = <1>;
297 clocks = <&clock 327>, <&clock 159>;
298 clock-names = "spi", "spi_busclk0";
299 pinctrl-names = "default";
300 pinctrl-0 = <&spi0_bus>;
304 spi_1: spi@13930000 {
305 compatible = "samsung,exynos4210-spi";
306 reg = <0x13930000 0x100>;
307 interrupts = <0 67 0>;
308 tx-dma-channel = <&pdma1 7>; /* preliminary */
309 rx-dma-channel = <&pdma1 6>; /* preliminary */
310 #address-cells = <1>;
312 clocks = <&clock 328>, <&clock 160>;
313 clock-names = "spi", "spi_busclk0";
314 pinctrl-names = "default";
315 pinctrl-0 = <&spi1_bus>;
319 spi_2: spi@13940000 {
320 compatible = "samsung,exynos4210-spi";
321 reg = <0x13940000 0x100>;
322 interrupts = <0 68 0>;
323 tx-dma-channel = <&pdma0 9>; /* preliminary */
324 rx-dma-channel = <&pdma0 8>; /* preliminary */
325 #address-cells = <1>;
327 clocks = <&clock 329>, <&clock 161>;
328 clock-names = "spi", "spi_busclk0";
329 pinctrl-names = "default";
330 pinctrl-0 = <&spi2_bus>;
335 #address-cells = <1>;
337 compatible = "arm,amba-bus";
338 interrupt-parent = <&gic>;
341 pdma0: pdma@12680000 {
342 compatible = "arm,pl330", "arm,primecell";
343 reg = <0x12680000 0x1000>;
344 interrupts = <0 35 0>;
345 clocks = <&clock 292>;
346 clock-names = "apb_pclk";
349 #dma-requests = <32>;
352 pdma1: pdma@12690000 {
353 compatible = "arm,pl330", "arm,primecell";
354 reg = <0x12690000 0x1000>;
355 interrupts = <0 36 0>;
356 clocks = <&clock 293>;
357 clock-names = "apb_pclk";
360 #dma-requests = <32>;
363 mdma1: mdma@12850000 {
364 compatible = "arm,pl330", "arm,primecell";
365 reg = <0x12850000 0x1000>;
366 interrupts = <0 34 0>;
367 clocks = <&clock 279>;
368 clock-names = "apb_pclk";
375 fimd: fimd@11c00000 {
376 compatible = "samsung,exynos4210-fimd";
377 interrupt-parent = <&combiner>;
378 reg = <0x11c00000 0x20000>;
379 interrupt-names = "fifo", "vsync", "lcd_sys";
380 interrupts = <11 0>, <11 1>, <11 2>;
381 clocks = <&clock 140>, <&clock 283>;
382 clock-names = "sclk_fimd", "fimd";
383 samsung,power-domain = <&pd_lcd0>;