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1 /*
2  * Samsung's Exynos5 SoC series common device tree source
3  *
4  * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
5  *              http://www.samsung.com
6  *
7  * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
8  * SoCs from Exynos5 series can include this file and provide values for SoCs
9  * specfic bindings.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include "skeleton.dtsi"
17
18 / {
19         interrupt-parent = <&gic>;
20
21         aliases {
22                 serial0 = &serial_0;
23                 serial1 = &serial_1;
24                 serial2 = &serial_2;
25                 serial3 = &serial_3;
26         };
27
28         chipid@10000000 {
29                 compatible = "samsung,exynos4210-chipid";
30                 reg = <0x10000000 0x100>;
31         };
32
33         sromc@12250000 {
34                 compatible = "samsung,exynos-srom";
35                 reg = <0x12250000 0x14>;
36         };
37
38         combiner: interrupt-controller@10440000 {
39                 compatible = "samsung,exynos4210-combiner";
40                 #interrupt-cells = <2>;
41                 interrupt-controller;
42                 samsung,combiner-nr = <32>;
43                 reg = <0x10440000 0x1000>;
44                 interrupts =    <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
45                                 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
46                                 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
47                                 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
48                                 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
49                                 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
50                                 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
51                                 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
52         };
53
54         gic: interrupt-controller@10481000 {
55                 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
56                 #interrupt-cells = <3>;
57                 interrupt-controller;
58                 reg =   <0x10481000 0x1000>,
59                         <0x10482000 0x1000>,
60                         <0x10484000 0x2000>,
61                         <0x10486000 0x2000>;
62                 interrupts = <1 9 0xf04>;
63         };
64
65         serial_0: serial@12C00000 {
66                 compatible = "samsung,exynos4210-uart";
67                 reg = <0x12C00000 0x100>;
68                 interrupts = <0 51 0>;
69         };
70
71         serial_1: serial@12C10000 {
72                 compatible = "samsung,exynos4210-uart";
73                 reg = <0x12C10000 0x100>;
74                 interrupts = <0 52 0>;
75         };
76
77         serial_2: serial@12C20000 {
78                 compatible = "samsung,exynos4210-uart";
79                 reg = <0x12C20000 0x100>;
80                 interrupts = <0 53 0>;
81         };
82
83         serial_3: serial@12C30000 {
84                 compatible = "samsung,exynos4210-uart";
85                 reg = <0x12C30000 0x100>;
86                 interrupts = <0 54 0>;
87         };
88
89         rtc: rtc@101E0000 {
90                 compatible = "samsung,s3c6410-rtc";
91                 reg = <0x101E0000 0x100>;
92                 interrupts = <0 43 0>, <0 44 0>;
93                 status = "disabled";
94         };
95
96         poweroff: syscon-poweroff {
97                 compatible = "syscon-poweroff";
98                 regmap = <&pmu_system_controller>;
99                 offset = <0x330C>; /* PS_HOLD_CONTROL */
100                 mask = <0x5200>; /* reset value */
101         };
102
103         reboot: syscon-reboot {
104                 compatible = "syscon-reboot";
105                 regmap = <&pmu_system_controller>;
106                 offset = <0x0400>; /* SWRESET */
107                 mask = <0x1>;
108         };
109
110         fimd: fimd@14400000 {
111                 compatible = "samsung,exynos5250-fimd";
112                 interrupt-parent = <&combiner>;
113                 reg = <0x14400000 0x40000>;
114                 interrupt-names = "fifo", "vsync", "lcd_sys";
115                 interrupts = <18 4>, <18 5>, <18 6>;
116                 samsung,sysreg = <&sysreg_system_controller>;
117                 status = "disabled";
118         };
119
120         dp: dp-controller@145B0000 {
121                 compatible = "samsung,exynos5-dp";
122                 reg = <0x145B0000 0x1000>;
123                 interrupts = <10 3>;
124                 interrupt-parent = <&combiner>;
125                 #address-cells = <1>;
126                 #size-cells = <0>;
127                 status = "disabled";
128         };
129 };