arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 /include/ "skeleton.dtsi"
  21
  22 / {
  23         compatible = "samsung,exynos5250";
  24         interrupt-parent = <&gic>;
  25
  26         aliases {
  27                 spi0 = &spi_0;
  28                 spi1 = &spi_1;
  29                 spi2 = &spi_2;
  30                 gsc0 = &gsc_0;
  31                 gsc1 = &gsc_1;
  32                 gsc2 = &gsc_2;
  33                 gsc3 = &gsc_3;
  34                 mshc0 = &dwmmc_0;
  35                 mshc1 = &dwmmc_1;
  36                 mshc2 = &dwmmc_2;
  37                 mshc3 = &dwmmc_3;
  38                 i2c0 = &i2c_0;
  39                 i2c1 = &i2c_1;
  40                 i2c2 = &i2c_2;
  41                 i2c3 = &i2c_3;
  42                 i2c4 = &i2c_4;
  43                 i2c5 = &i2c_5;
  44                 i2c6 = &i2c_6;
  45                 i2c7 = &i2c_7;
  46                 i2c8 = &i2c_8;
  47         };
  48
  49         pd_gsc: gsc-power-domain@0x10044000 {
  50                 compatible = "samsung,exynos4210-pd";
  51                 reg = <0x10044000 0x20>;
  52         };
  53
  54         pd_mfc: mfc-power-domain@0x10044040 {
  55                 compatible = "samsung,exynos4210-pd";
  56                 reg = <0x10044040 0x20>;
  57         };
  58
  59         clock: clock-controller@0x10010000 {
  60                 compatible = "samsung,exynos5250-clock";
  61                 reg = <0x10010000 0x30000>;
  62                 #clock-cells = <1>;
  63         };
  64
  65         gic:interrupt-controller@10481000 {
  66                 compatible = "arm,cortex-a9-gic";
  67                 #interrupt-cells = <3>;
  68                 interrupt-controller;
  69                 reg = <0x10481000 0x1000>, <0x10482000 0x2000>;
  70         };
  71
  72         combiner:interrupt-controller@10440000 {
  73                 compatible = "samsung,exynos4210-combiner";
  74                 #interrupt-cells = <2>;
  75                 interrupt-controller;
  76                 samsung,combiner-nr = <32>;
  77                 reg = <0x10440000 0x1000>;
  78                 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  79                              <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  80                              <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  81                              <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  82                              <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  83                              <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  84                              <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  85                              <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  86         };
  87
  88         mct@101C0000 {
  89                 compatible = "samsung,exynos4210-mct";
  90                 reg = <0x101C0000 0x800>;
  91                 interrupt-controller;
  92                 #interrups-cells = <2>;
  93                 interrupt-parent = <&mct_map>;
  94                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
  95                              <4 0>, <5 0>;
  96                 clocks = <&clock 1>, <&clock 335>;
  97                 clock-names = "fin_pll", "mct";
  98
  99                 mct_map: mct-map {
 100                         #interrupt-cells = <2>;
 101                         #address-cells = <0>;
 102                         #size-cells = <0>;
 103                         interrupt-map = <0x0 0 &combiner 23 3>,
 104                                         <0x1 0 &combiner 23 4>,
 105                                         <0x2 0 &combiner 25 2>,
 106                                         <0x3 0 &combiner 25 3>,
 107                                         <0x4 0 &gic 0 120 0>,
 108                                         <0x5 0 &gic 0 121 0>;
 109                 };
 110         };
 111
 112         pmu {
 113                 compatible = "arm,cortex-a15-pmu";
 114                 interrupt-parent = <&combiner>;
 115                 interrupts = <1 2>, <22 4>;
 116         };
 117
 118         watchdog {
 119                 compatible = "samsung,s3c2410-wdt";
 120                 reg = <0x101D0000 0x100>;
 121                 interrupts = <0 42 0>;
 122                 clocks = <&clock 336>;
 123                 clock-names = "watchdog";
 124         };
 125
 126         codec@11000000 {
 127                 compatible = "samsung,mfc-v6";
 128                 reg = <0x11000000 0x10000>;
 129                 interrupts = <0 96 0>;
 130                 samsung,power-domain = <&pd_mfc>;
 131         };
 132
 133         rtc {
 134                 compatible = "samsung,s3c6410-rtc";
 135                 reg = <0x101E0000 0x100>;
 136                 interrupts = <0 43 0>, <0 44 0>;
 137                 clocks = <&clock 337>;
 138                 clock-names = "rtc";
 139                 status = "disabled";
 140         };
 141
 142         tmu@10060000 {
 143                 compatible = "samsung,exynos5250-tmu";
 144                 reg = <0x10060000 0x100>;
 145                 interrupts = <0 65 0>;
 146                 clocks = <&clock 338>;
 147                 clock-names = "tmu_apbif";
 148         };
 149
 150         serial@12C00000 {
 151                 compatible = "samsung,exynos4210-uart";
 152                 reg = <0x12C00000 0x100>;
 153                 interrupts = <0 51 0>;
 154                 clocks = <&clock 289>, <&clock 146>;
 155                 clock-names = "uart", "clk_uart_baud0";
 156         };
 157
 158         serial@12C10000 {
 159                 compatible = "samsung,exynos4210-uart";
 160                 reg = <0x12C10000 0x100>;
 161                 interrupts = <0 52 0>;
 162                 clocks = <&clock 290>, <&clock 147>;
 163                 clock-names = "uart", "clk_uart_baud0";
 164         };
 165
 166         serial@12C20000 {
 167                 compatible = "samsung,exynos4210-uart";
 168                 reg = <0x12C20000 0x100>;
 169                 interrupts = <0 53 0>;
 170                 clocks = <&clock 291>, <&clock 148>;
 171                 clock-names = "uart", "clk_uart_baud0";
 172         };
 173
 174         serial@12C30000 {
 175                 compatible = "samsung,exynos4210-uart";
 176                 reg = <0x12C30000 0x100>;
 177                 interrupts = <0 54 0>;
 178                 clocks = <&clock 292>, <&clock 149>;
 179                 clock-names = "uart", "clk_uart_baud0";
 180         };
 181
 182         sata@122F0000 {
 183                 compatible = "samsung,exynos5-sata-ahci";
 184                 reg = <0x122F0000 0x1ff>;
 185                 interrupts = <0 115 0>;
 186                 clocks = <&clock 277>, <&clock 143>;
 187                 clock-names = "sata", "sclk_sata";
 188         };
 189
 190         sata-phy@12170000 {
 191                 compatible = "samsung,exynos5-sata-phy";
 192                 reg = <0x12170000 0x1ff>;
 193         };
 194
 195         i2c_0: i2c@12C60000 {
 196                 compatible = "samsung,s3c2440-i2c";
 197                 reg = <0x12C60000 0x100>;
 198                 interrupts = <0 56 0>;
 199                 #address-cells = <1>;
 200                 #size-cells = <0>;
 201                 clocks = <&clock 294>;
 202                 clock-names = "i2c";
 203         };
 204
 205         i2c_1: i2c@12C70000 {
 206                 compatible = "samsung,s3c2440-i2c";
 207                 reg = <0x12C70000 0x100>;
 208                 interrupts = <0 57 0>;
 209                 #address-cells = <1>;
 210                 #size-cells = <0>;
 211                 clocks = <&clock 295>;
 212                 clock-names = "i2c";
 213         };
 214
 215         i2c_2: i2c@12C80000 {
 216                 compatible = "samsung,s3c2440-i2c";
 217                 reg = <0x12C80000 0x100>;
 218                 interrupts = <0 58 0>;
 219                 #address-cells = <1>;
 220                 #size-cells = <0>;
 221                 clocks = <&clock 296>;
 222                 clock-names = "i2c";
 223         };
 224
 225         i2c_3: i2c@12C90000 {
 226                 compatible = "samsung,s3c2440-i2c";
 227                 reg = <0x12C90000 0x100>;
 228                 interrupts = <0 59 0>;
 229                 #address-cells = <1>;
 230                 #size-cells = <0>;
 231                 clocks = <&clock 297>;
 232                 clock-names = "i2c";
 233         };
 234
 235         i2c_4: i2c@12CA0000 {
 236                 compatible = "samsung,s3c2440-i2c";
 237                 reg = <0x12CA0000 0x100>;
 238                 interrupts = <0 60 0>;
 239                 #address-cells = <1>;
 240                 #size-cells = <0>;
 241                 clocks = <&clock 298>;
 242                 clock-names = "i2c";
 243         };
 244
 245         i2c_5: i2c@12CB0000 {
 246                 compatible = "samsung,s3c2440-i2c";
 247                 reg = <0x12CB0000 0x100>;
 248                 interrupts = <0 61 0>;
 249                 #address-cells = <1>;
 250                 #size-cells = <0>;
 251                 clocks = <&clock 299>;
 252                 clock-names = "i2c";
 253         };
 254
 255         i2c_6: i2c@12CC0000 {
 256                 compatible = "samsung,s3c2440-i2c";
 257                 reg = <0x12CC0000 0x100>;
 258                 interrupts = <0 62 0>;
 259                 #address-cells = <1>;
 260                 #size-cells = <0>;
 261                 clocks = <&clock 300>;
 262                 clock-names = "i2c";
 263         };
 264
 265         i2c_7: i2c@12CD0000 {
 266                 compatible = "samsung,s3c2440-i2c";
 267                 reg = <0x12CD0000 0x100>;
 268                 interrupts = <0 63 0>;
 269                 #address-cells = <1>;
 270                 #size-cells = <0>;
 271                 clocks = <&clock 301>;
 272                 clock-names = "i2c";
 273         };
 274
 275         i2c_8: i2c@12CE0000 {
 276                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 277                 reg = <0x12CE0000 0x1000>;
 278                 interrupts = <0 64 0>;
 279                 #address-cells = <1>;
 280                 #size-cells = <0>;
 281                 clocks = <&clock 302>;
 282                 clock-names = "i2c";
 283         };
 284
 285         i2c@121D0000 {
 286                 compatible = "samsung,exynos5-sata-phy-i2c";
 287                 reg = <0x121D0000 0x100>;
 288                 #address-cells = <1>;
 289                 #size-cells = <0>;
 290                 clocks = <&clock 288>;
 291                 clock-names = "i2c";
 292         };
 293
 294         spi_0: spi@12d20000 {
 295                 compatible = "samsung,exynos4210-spi";
 296                 reg = <0x12d20000 0x100>;
 297                 interrupts = <0 66 0>;
 298                 dmas = <&pdma0 5
 299                         &pdma0 4>;
 300                 dma-names = "tx", "rx";
 301                 #address-cells = <1>;
 302                 #size-cells = <0>;
 303                 clocks = <&clock 304>, <&clock 154>;
 304                 clock-names = "spi", "spi_busclk0";
 305         };
 306
 307         spi_1: spi@12d30000 {
 308                 compatible = "samsung,exynos4210-spi";
 309                 reg = <0x12d30000 0x100>;
 310                 interrupts = <0 67 0>;
 311                 dmas = <&pdma1 5
 312                         &pdma1 4>;
 313                 dma-names = "tx", "rx";
 314                 #address-cells = <1>;
 315                 #size-cells = <0>;
 316                 clocks = <&clock 305>, <&clock 155>;
 317                 clock-names = "spi", "spi_busclk0";
 318         };
 319
 320         spi_2: spi@12d40000 {
 321                 compatible = "samsung,exynos4210-spi";
 322                 reg = <0x12d40000 0x100>;
 323                 interrupts = <0 68 0>;
 324                 dmas = <&pdma0 7
 325                         &pdma0 6>;
 326                 dma-names = "tx", "rx";
 327                 #address-cells = <1>;
 328                 #size-cells = <0>;
 329                 clocks = <&clock 306>, <&clock 156>;
 330                 clock-names = "spi", "spi_busclk0";
 331         };
 332
 333         dwmmc_0: dwmmc0@12200000 {
 334                 compatible = "samsung,exynos5250-dw-mshc";
 335                 reg = <0x12200000 0x1000>;
 336                 interrupts = <0 75 0>;
 337                 #address-cells = <1>;
 338                 #size-cells = <0>;
 339                 clocks = <&clock 280>, <&clock 139>;
 340                 clock-names = "biu", "ciu";
 341         };
 342
 343         dwmmc_1: dwmmc1@12210000 {
 344                 compatible = "samsung,exynos5250-dw-mshc";
 345                 reg = <0x12210000 0x1000>;
 346                 interrupts = <0 76 0>;
 347                 #address-cells = <1>;
 348                 #size-cells = <0>;
 349                 clocks = <&clock 281>, <&clock 140>;
 350                 clock-names = "biu", "ciu";
 351         };
 352
 353         dwmmc_2: dwmmc2@12220000 {
 354                 compatible = "samsung,exynos5250-dw-mshc";
 355                 reg = <0x12220000 0x1000>;
 356                 interrupts = <0 77 0>;
 357                 #address-cells = <1>;
 358                 #size-cells = <0>;
 359                 clocks = <&clock 282>, <&clock 141>;
 360                 clock-names = "biu", "ciu";
 361         };
 362
 363         dwmmc_3: dwmmc3@12230000 {
 364                 compatible = "samsung,exynos5250-dw-mshc";
 365                 reg = <0x12230000 0x1000>;
 366                 interrupts = <0 78 0>;
 367                 #address-cells = <1>;
 368                 #size-cells = <0>;
 369                 clocks = <&clock 283>, <&clock 142>;
 370                 clock-names = "biu", "ciu";
 371         };
 372
 373         i2s0: i2s@03830000 {
 374                 compatible = "samsung,i2s-v5";
 375                 reg = <0x03830000 0x100>;
 376                 dmas = <&pdma0 10
 377                         &pdma0 9
 378                         &pdma0 8>;
 379                 dma-names = "tx", "rx", "tx-sec";
 380                 samsung,supports-6ch;
 381                 samsung,supports-rstclr;
 382                 samsung,supports-secdai;
 383                 samsung,idma-addr = <0x03000000>;
 384         };
 385
 386         i2s1: i2s@12D60000 {
 387                 compatible = "samsung,i2s-v5";
 388                 reg = <0x12D60000 0x100>;
 389                 dmas = <&pdma1 12
 390                         &pdma1 11>;
 391                 dma-names = "tx", "rx";
 392         };
 393
 394         i2s2: i2s@12D70000 {
 395                 compatible = "samsung,i2s-v5";
 396                 reg = <0x12D70000 0x100>;
 397                 dmas = <&pdma0 12
 398                         &pdma0 11>;
 399                 dma-names = "tx", "rx";
 400         };
 401
 402         usb@12110000 {
 403                 compatible = "samsung,exynos4210-ehci";
 404                 reg = <0x12110000 0x100>;
 405                 interrupts = <0 71 0>;
 406         };
 407
 408         usb@12120000 {
 409                 compatible = "samsung,exynos4210-ohci";
 410                 reg = <0x12120000 0x100>;
 411                 interrupts = <0 71 0>;
 412         };
 413
 414         amba {
 415                 #address-cells = <1>;
 416                 #size-cells = <1>;
 417                 compatible = "arm,amba-bus";
 418                 interrupt-parent = <&gic>;
 419                 ranges;
 420
 421                 pdma0: pdma@121A0000 {
 422                         compatible = "arm,pl330", "arm,primecell";
 423                         reg = <0x121A0000 0x1000>;
 424                         interrupts = <0 34 0>;
 425                         clocks = <&clock 275>;
 426                         clock-names = "apb_pclk";
 427                         #dma-cells = <1>;
 428                         #dma-channels = <8>;
 429                         #dma-requests = <32>;
 430                 };
 431
 432                 pdma1: pdma@121B0000 {
 433                         compatible = "arm,pl330", "arm,primecell";
 434                         reg = <0x121B0000 0x1000>;
 435                         interrupts = <0 35 0>;
 436                         clocks = <&clock 276>;
 437                         clock-names = "apb_pclk";
 438                         #dma-cells = <1>;
 439                         #dma-channels = <8>;
 440                         #dma-requests = <32>;
 441                 };
 442
 443                 mdma0: mdma@10800000 {
 444                         compatible = "arm,pl330", "arm,primecell";
 445                         reg = <0x10800000 0x1000>;
 446                         interrupts = <0 33 0>;
 447                         clocks = <&clock 271>;
 448                         clock-names = "apb_pclk";
 449                         #dma-cells = <1>;
 450                         #dma-channels = <8>;
 451                         #dma-requests = <1>;
 452                 };
 453
 454                 mdma1: mdma@11C10000 {
 455                         compatible = "arm,pl330", "arm,primecell";
 456                         reg = <0x11C10000 0x1000>;
 457                         interrupts = <0 124 0>;
 458                         clocks = <&clock 271>;
 459                         clock-names = "apb_pclk";
 460                         #dma-cells = <1>;
 461                         #dma-channels = <8>;
 462                         #dma-requests = <1>;
 463                 };
 464         };
 465
 466         gpio-controllers {
 467                 #address-cells = <1>;
 468                 #size-cells = <1>;
 469                 gpio-controller;
 470                 ranges;
 471
 472                 gpa0: gpio-controller@11400000 {
 473                         compatible = "samsung,exynos4-gpio";
 474                         reg = <0x11400000 0x20>;
 475                         #gpio-cells = <4>;
 476                 };
 477
 478                 gpa1: gpio-controller@11400020 {
 479                         compatible = "samsung,exynos4-gpio";
 480                         reg = <0x11400020 0x20>;
 481                         #gpio-cells = <4>;
 482                 };
 483
 484                 gpa2: gpio-controller@11400040 {
 485                         compatible = "samsung,exynos4-gpio";
 486                         reg = <0x11400040 0x20>;
 487                         #gpio-cells = <4>;
 488                 };
 489
 490                 gpb0: gpio-controller@11400060 {
 491                         compatible = "samsung,exynos4-gpio";
 492                         reg = <0x11400060 0x20>;
 493                         #gpio-cells = <4>;
 494                 };
 495
 496                 gpb1: gpio-controller@11400080 {
 497                         compatible = "samsung,exynos4-gpio";
 498                         reg = <0x11400080 0x20>;
 499                         #gpio-cells = <4>;
 500                 };
 501
 502                 gpb2: gpio-controller@114000A0 {
 503                         compatible = "samsung,exynos4-gpio";
 504                         reg = <0x114000A0 0x20>;
 505                         #gpio-cells = <4>;
 506                 };
 507
 508                 gpb3: gpio-controller@114000C0 {
 509                         compatible = "samsung,exynos4-gpio";
 510                         reg = <0x114000C0 0x20>;
 511                         #gpio-cells = <4>;
 512                 };
 513
 514                 gpc0: gpio-controller@114000E0 {
 515                         compatible = "samsung,exynos4-gpio";
 516                         reg = <0x114000E0 0x20>;
 517                         #gpio-cells = <4>;
 518                 };
 519
 520                 gpc1: gpio-controller@11400100 {
 521                         compatible = "samsung,exynos4-gpio";
 522                         reg = <0x11400100 0x20>;
 523                         #gpio-cells = <4>;
 524                 };
 525
 526                 gpc2: gpio-controller@11400120 {
 527                         compatible = "samsung,exynos4-gpio";
 528                         reg = <0x11400120 0x20>;
 529                         #gpio-cells = <4>;
 530                 };
 531
 532                 gpc3: gpio-controller@11400140 {
 533                         compatible = "samsung,exynos4-gpio";
 534                         reg = <0x11400140 0x20>;
 535                         #gpio-cells = <4>;
 536                 };
 537
 538                 gpc4: gpio-controller@114002E0 {
 539                         compatible = "samsung,exynos4-gpio";
 540                         reg = <0x114002E0 0x20>;
 541                         #gpio-cells = <4>;
 542                 };
 543
 544                 gpd0: gpio-controller@11400160 {
 545                         compatible = "samsung,exynos4-gpio";
 546                         reg = <0x11400160 0x20>;
 547                         #gpio-cells = <4>;
 548                 };
 549
 550                 gpd1: gpio-controller@11400180 {
 551                         compatible = "samsung,exynos4-gpio";
 552                         reg = <0x11400180 0x20>;
 553                         #gpio-cells = <4>;
 554                 };
 555
 556                 gpy0: gpio-controller@114001A0 {
 557                         compatible = "samsung,exynos4-gpio";
 558                         reg = <0x114001A0 0x20>;
 559                         #gpio-cells = <4>;
 560                 };
 561
 562                 gpy1: gpio-controller@114001C0 {
 563                         compatible = "samsung,exynos4-gpio";
 564                         reg = <0x114001C0 0x20>;
 565                         #gpio-cells = <4>;
 566                 };
 567
 568                 gpy2: gpio-controller@114001E0 {
 569                         compatible = "samsung,exynos4-gpio";
 570                         reg = <0x114001E0 0x20>;
 571                         #gpio-cells = <4>;
 572                 };
 573
 574                 gpy3: gpio-controller@11400200 {
 575                         compatible = "samsung,exynos4-gpio";
 576                         reg = <0x11400200 0x20>;
 577                         #gpio-cells = <4>;
 578                 };
 579
 580                 gpy4: gpio-controller@11400220 {
 581                         compatible = "samsung,exynos4-gpio";
 582                         reg = <0x11400220 0x20>;
 583                         #gpio-cells = <4>;
 584                 };
 585
 586                 gpy5: gpio-controller@11400240 {
 587                         compatible = "samsung,exynos4-gpio";
 588                         reg = <0x11400240 0x20>;
 589                         #gpio-cells = <4>;
 590                 };
 591
 592                 gpy6: gpio-controller@11400260 {
 593                         compatible = "samsung,exynos4-gpio";
 594                         reg = <0x11400260 0x20>;
 595                         #gpio-cells = <4>;
 596                 };
 597
 598                 gpx0: gpio-controller@11400C00 {
 599                         compatible = "samsung,exynos4-gpio";
 600                         reg = <0x11400C00 0x20>;
 601                         #gpio-cells = <4>;
 602                 };
 603
 604                 gpx1: gpio-controller@11400C20 {
 605                         compatible = "samsung,exynos4-gpio";
 606                         reg = <0x11400C20 0x20>;
 607                         #gpio-cells = <4>;
 608                 };
 609
 610                 gpx2: gpio-controller@11400C40 {
 611                         compatible = "samsung,exynos4-gpio";
 612                         reg = <0x11400C40 0x20>;
 613                         #gpio-cells = <4>;
 614                 };
 615
 616                 gpx3: gpio-controller@11400C60 {
 617                         compatible = "samsung,exynos4-gpio";
 618                         reg = <0x11400C60 0x20>;
 619                         #gpio-cells = <4>;
 620                 };
 621
 622                 gpe0: gpio-controller@13400000 {
 623                         compatible = "samsung,exynos4-gpio";
 624                         reg = <0x13400000 0x20>;
 625                         #gpio-cells = <4>;
 626                 };
 627
 628                 gpe1: gpio-controller@13400020 {
 629                         compatible = "samsung,exynos4-gpio";
 630                         reg = <0x13400020 0x20>;
 631                         #gpio-cells = <4>;
 632                 };
 633
 634                 gpf0: gpio-controller@13400040 {
 635                         compatible = "samsung,exynos4-gpio";
 636                         reg = <0x13400040 0x20>;
 637                         #gpio-cells = <4>;
 638                 };
 639
 640                 gpf1: gpio-controller@13400060 {
 641                         compatible = "samsung,exynos4-gpio";
 642                         reg = <0x13400060 0x20>;
 643                         #gpio-cells = <4>;
 644                 };
 645
 646                 gpg0: gpio-controller@13400080 {
 647                         compatible = "samsung,exynos4-gpio";
 648                         reg = <0x13400080 0x20>;
 649                         #gpio-cells = <4>;
 650                 };
 651
 652                 gpg1: gpio-controller@134000A0 {
 653                         compatible = "samsung,exynos4-gpio";
 654                         reg = <0x134000A0 0x20>;
 655                         #gpio-cells = <4>;
 656                 };
 657
 658                 gpg2: gpio-controller@134000C0 {
 659                         compatible = "samsung,exynos4-gpio";
 660                         reg = <0x134000C0 0x20>;
 661                         #gpio-cells = <4>;
 662                 };
 663
 664                 gph0: gpio-controller@134000E0 {
 665                         compatible = "samsung,exynos4-gpio";
 666                         reg = <0x134000E0 0x20>;
 667                         #gpio-cells = <4>;
 668                 };
 669
 670                 gph1: gpio-controller@13400100 {
 671                         compatible = "samsung,exynos4-gpio";
 672                         reg = <0x13400100 0x20>;
 673                         #gpio-cells = <4>;
 674                 };
 675
 676                 gpv0: gpio-controller@10D10000 {
 677                         compatible = "samsung,exynos4-gpio";
 678                         reg = <0x10D10000 0x20>;
 679                         #gpio-cells = <4>;
 680                 };
 681
 682                 gpv1: gpio-controller@10D10020 {
 683                         compatible = "samsung,exynos4-gpio";
 684                         reg = <0x10D10020 0x20>;
 685                         #gpio-cells = <4>;
 686                 };
 687
 688                 gpv2: gpio-controller@10D10040 {
 689                         compatible = "samsung,exynos4-gpio";
 690                         reg = <0x10D10060 0x20>;
 691                         #gpio-cells = <4>;
 692                 };
 693
 694                 gpv3: gpio-controller@10D10060 {
 695                         compatible = "samsung,exynos4-gpio";
 696                         reg = <0x10D10080 0x20>;
 697                         #gpio-cells = <4>;
 698                 };
 699
 700                 gpv4: gpio-controller@10D10080 {
 701                         compatible = "samsung,exynos4-gpio";
 702                         reg = <0x10D100C0 0x20>;
 703                         #gpio-cells = <4>;
 704                 };
 705
 706                 gpz: gpio-controller@03860000 {
 707                         compatible = "samsung,exynos4-gpio";
 708                         reg = <0x03860000 0x20>;
 709                         #gpio-cells = <4>;
 710                 };
 711         };
 712
 713
 714         gsc_0:  gsc@0x13e00000 {
 715                 compatible = "samsung,exynos5-gsc";
 716                 reg = <0x13e00000 0x1000>;
 717                 interrupts = <0 85 0>;
 718                 samsung,power-domain = <&pd_gsc>;
 719                 clocks = <&clock 256>;
 720                 clock-names = "gscl";
 721         };
 722
 723         gsc_1:  gsc@0x13e10000 {
 724                 compatible = "samsung,exynos5-gsc";
 725                 reg = <0x13e10000 0x1000>;
 726                 interrupts = <0 86 0>;
 727                 samsung,power-domain = <&pd_gsc>;
 728                 clocks = <&clock 257>;
 729                 clock-names = "gscl";
 730         };
 731
 732         gsc_2:  gsc@0x13e20000 {
 733                 compatible = "samsung,exynos5-gsc";
 734                 reg = <0x13e20000 0x1000>;
 735                 interrupts = <0 87 0>;
 736                 samsung,power-domain = <&pd_gsc>;
 737                 clocks = <&clock 258>;
 738                 clock-names = "gscl";
 739         };
 740
 741         gsc_3:  gsc@0x13e30000 {
 742                 compatible = "samsung,exynos5-gsc";
 743                 reg = <0x13e30000 0x1000>;
 744                 interrupts = <0 88 0>;
 745                 samsung,power-domain = <&pd_gsc>;
 746                 clocks = <&clock 259>;
 747                 clock-names = "gscl";
 748         };
 749
 750         hdmi {
 751                 compatible = "samsung,exynos5-hdmi";
 752                 reg = <0x14530000 0x70000>;
 753                 interrupts = <0 95 0>;
 754                 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
 755                                 <&clock 333>, <&clock 333>;
 756                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 757                                 "sclk_hdmiphy", "hdmiphy";
 758         };
 759
 760         mixer {
 761                 compatible = "samsung,exynos5-mixer";
 762                 reg = <0x14450000 0x10000>;
 763                 interrupts = <0 94 0>;
 764         };
 765
 766         dp-controller {
 767                 compatible = "samsung,exynos5-dp";
 768                 reg = <0x145b0000 0x1000>;
 769                 interrupts = <10 3>;
 770                 interrupt-parent = <&combiner>;
 771                 #address-cells = <1>;
 772                 #size-cells = <0>;
 773
 774                 dptx-phy {
 775                         reg = <0x10040720>;
 776                         samsung,enable-mask = <1>;
 777                 };
 778         };
 779 };