arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos5.dtsi"
  21 #include "exynos5250-pinctrl.dtsi"
  22
  23 #include <dt-bindings/clk/exynos-audss-clk.h>
  24
  25 / {
  26         compatible = "samsung,exynos5250";
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 gsc0 = &gsc_0;
  33                 gsc1 = &gsc_1;
  34                 gsc2 = &gsc_2;
  35                 gsc3 = &gsc_3;
  36                 mshc0 = &dwmmc_0;
  37                 mshc1 = &dwmmc_1;
  38                 mshc2 = &dwmmc_2;
  39                 mshc3 = &dwmmc_3;
  40                 i2c0 = &i2c_0;
  41                 i2c1 = &i2c_1;
  42                 i2c2 = &i2c_2;
  43                 i2c3 = &i2c_3;
  44                 i2c4 = &i2c_4;
  45                 i2c5 = &i2c_5;
  46                 i2c6 = &i2c_6;
  47                 i2c7 = &i2c_7;
  48                 i2c8 = &i2c_8;
  49                 pinctrl0 = &pinctrl_0;
  50                 pinctrl1 = &pinctrl_1;
  51                 pinctrl2 = &pinctrl_2;
  52                 pinctrl3 = &pinctrl_3;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <0>;
  63                 };
  64                 cpu@1 {
  65                         device_type = "cpu";
  66                         compatible = "arm,cortex-a15";
  67                         reg = <1>;
  68                 };
  69         };
  70
  71         pd_gsc: gsc-power-domain@10044000 {
  72                 compatible = "samsung,exynos4210-pd";
  73                 reg = <0x10044000 0x20>;
  74         };
  75
  76         pd_mfc: mfc-power-domain@10044040 {
  77                 compatible = "samsung,exynos4210-pd";
  78                 reg = <0x10044040 0x20>;
  79         };
  80
  81         clock: clock-controller@10010000 {
  82                 compatible = "samsung,exynos5250-clock";
  83                 reg = <0x10010000 0x30000>;
  84                 #clock-cells = <1>;
  85         };
  86
  87         clock_audss: audss-clock-controller@3810000 {
  88                 compatible = "samsung,exynos5250-audss-clock";
  89                 reg = <0x03810000 0x0C>;
  90                 #clock-cells = <1>;
  91         };
  92
  93         timer {
  94                 compatible = "arm,armv7-timer";
  95                 interrupts = <1 13 0xf08>,
  96                              <1 14 0xf08>,
  97                              <1 11 0xf08>,
  98                              <1 10 0xf08>;
  99         };
 100
 101         mct@101C0000 {
 102                 compatible = "samsung,exynos4210-mct";
 103                 reg = <0x101C0000 0x800>;
 104                 interrupt-controller;
 105                 #interrups-cells = <2>;
 106                 interrupt-parent = <&mct_map>;
 107                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 108                              <4 0>, <5 0>;
 109                 clocks = <&clock 1>, <&clock 335>;
 110                 clock-names = "fin_pll", "mct";
 111
 112                 mct_map: mct-map {
 113                         #interrupt-cells = <2>;
 114                         #address-cells = <0>;
 115                         #size-cells = <0>;
 116                         interrupt-map = <0x0 0 &combiner 23 3>,
 117                                         <0x1 0 &combiner 23 4>,
 118                                         <0x2 0 &combiner 25 2>,
 119                                         <0x3 0 &combiner 25 3>,
 120                                         <0x4 0 &gic 0 120 0>,
 121                                         <0x5 0 &gic 0 121 0>;
 122                 };
 123         };
 124
 125         pmu {
 126                 compatible = "arm,cortex-a15-pmu";
 127                 interrupt-parent = <&combiner>;
 128                 interrupts = <1 2>, <22 4>;
 129         };
 130
 131         pinctrl_0: pinctrl@11400000 {
 132                 compatible = "samsung,exynos5250-pinctrl";
 133                 reg = <0x11400000 0x1000>;
 134                 interrupts = <0 46 0>;
 135
 136                 wakup_eint: wakeup-interrupt-controller {
 137                         compatible = "samsung,exynos4210-wakeup-eint";
 138                         interrupt-parent = <&gic>;
 139                         interrupts = <0 32 0>;
 140                 };
 141         };
 142
 143         pinctrl_1: pinctrl@13400000 {
 144                 compatible = "samsung,exynos5250-pinctrl";
 145                 reg = <0x13400000 0x1000>;
 146                 interrupts = <0 45 0>;
 147         };
 148
 149         pinctrl_2: pinctrl@10d10000 {
 150                 compatible = "samsung,exynos5250-pinctrl";
 151                 reg = <0x10d10000 0x1000>;
 152                 interrupts = <0 50 0>;
 153         };
 154
 155         pinctrl_3: pinctrl@03860000 {
 156                 compatible = "samsung,exynos5250-pinctrl";
 157                 reg = <0x03860000 0x1000>;
 158                 interrupts = <0 47 0>;
 159         };
 160
 161         watchdog {
 162                 clocks = <&clock 336>;
 163                 clock-names = "watchdog";
 164         };
 165
 166         g2d@10850000 {
 167                 compatible = "samsung,exynos5250-g2d";
 168                 reg = <0x10850000 0x1000>;
 169                 interrupts = <0 91 0>;
 170                 clocks = <&clock 345>;
 171                 clock-names = "fimg2d";
 172         };
 173
 174         codec@11000000 {
 175                 compatible = "samsung,mfc-v6";
 176                 reg = <0x11000000 0x10000>;
 177                 interrupts = <0 96 0>;
 178                 samsung,power-domain = <&pd_mfc>;
 179                 clocks = <&clock 266>;
 180                 clock-names = "mfc";
 181         };
 182
 183         rtc@101E0000 {
 184                 clocks = <&clock 337>;
 185                 clock-names = "rtc";
 186                 status = "okay";
 187         };
 188
 189         tmu@10060000 {
 190                 compatible = "samsung,exynos5250-tmu";
 191                 reg = <0x10060000 0x100>;
 192                 interrupts = <0 65 0>;
 193                 clocks = <&clock 338>;
 194                 clock-names = "tmu_apbif";
 195         };
 196
 197         serial@12C00000 {
 198                 clocks = <&clock 289>, <&clock 146>;
 199                 clock-names = "uart", "clk_uart_baud0";
 200         };
 201
 202         serial@12C10000 {
 203                 clocks = <&clock 290>, <&clock 147>;
 204                 clock-names = "uart", "clk_uart_baud0";
 205         };
 206
 207         serial@12C20000 {
 208                 clocks = <&clock 291>, <&clock 148>;
 209                 clock-names = "uart", "clk_uart_baud0";
 210         };
 211
 212         serial@12C30000 {
 213                 clocks = <&clock 292>, <&clock 149>;
 214                 clock-names = "uart", "clk_uart_baud0";
 215         };
 216
 217         sata@122F0000 {
 218                 compatible = "samsung,exynos5-sata-ahci";
 219                 reg = <0x122F0000 0x1ff>;
 220                 interrupts = <0 115 0>;
 221                 clocks = <&clock 277>, <&clock 143>;
 222                 clock-names = "sata", "sclk_sata";
 223         };
 224
 225         sata-phy@12170000 {
 226                 compatible = "samsung,exynos5-sata-phy";
 227                 reg = <0x12170000 0x1ff>;
 228         };
 229
 230         i2c_0: i2c@12C60000 {
 231                 compatible = "samsung,s3c2440-i2c";
 232                 reg = <0x12C60000 0x100>;
 233                 interrupts = <0 56 0>;
 234                 #address-cells = <1>;
 235                 #size-cells = <0>;
 236                 clocks = <&clock 294>;
 237                 clock-names = "i2c";
 238                 pinctrl-names = "default";
 239                 pinctrl-0 = <&i2c0_bus>;
 240         };
 241
 242         i2c_1: i2c@12C70000 {
 243                 compatible = "samsung,s3c2440-i2c";
 244                 reg = <0x12C70000 0x100>;
 245                 interrupts = <0 57 0>;
 246                 #address-cells = <1>;
 247                 #size-cells = <0>;
 248                 clocks = <&clock 295>;
 249                 clock-names = "i2c";
 250                 pinctrl-names = "default";
 251                 pinctrl-0 = <&i2c1_bus>;
 252         };
 253
 254         i2c_2: i2c@12C80000 {
 255                 compatible = "samsung,s3c2440-i2c";
 256                 reg = <0x12C80000 0x100>;
 257                 interrupts = <0 58 0>;
 258                 #address-cells = <1>;
 259                 #size-cells = <0>;
 260                 clocks = <&clock 296>;
 261                 clock-names = "i2c";
 262                 pinctrl-names = "default";
 263                 pinctrl-0 = <&i2c2_bus>;
 264         };
 265
 266         i2c_3: i2c@12C90000 {
 267                 compatible = "samsung,s3c2440-i2c";
 268                 reg = <0x12C90000 0x100>;
 269                 interrupts = <0 59 0>;
 270                 #address-cells = <1>;
 271                 #size-cells = <0>;
 272                 clocks = <&clock 297>;
 273                 clock-names = "i2c";
 274                 pinctrl-names = "default";
 275                 pinctrl-0 = <&i2c3_bus>;
 276         };
 277
 278         i2c_4: i2c@12CA0000 {
 279                 compatible = "samsung,s3c2440-i2c";
 280                 reg = <0x12CA0000 0x100>;
 281                 interrupts = <0 60 0>;
 282                 #address-cells = <1>;
 283                 #size-cells = <0>;
 284                 clocks = <&clock 298>;
 285                 clock-names = "i2c";
 286                 pinctrl-names = "default";
 287                 pinctrl-0 = <&i2c4_bus>;
 288         };
 289
 290         i2c_5: i2c@12CB0000 {
 291                 compatible = "samsung,s3c2440-i2c";
 292                 reg = <0x12CB0000 0x100>;
 293                 interrupts = <0 61 0>;
 294                 #address-cells = <1>;
 295                 #size-cells = <0>;
 296                 clocks = <&clock 299>;
 297                 clock-names = "i2c";
 298                 pinctrl-names = "default";
 299                 pinctrl-0 = <&i2c5_bus>;
 300         };
 301
 302         i2c_6: i2c@12CC0000 {
 303                 compatible = "samsung,s3c2440-i2c";
 304                 reg = <0x12CC0000 0x100>;
 305                 interrupts = <0 62 0>;
 306                 #address-cells = <1>;
 307                 #size-cells = <0>;
 308                 clocks = <&clock 300>;
 309                 clock-names = "i2c";
 310                 pinctrl-names = "default";
 311                 pinctrl-0 = <&i2c6_bus>;
 312         };
 313
 314         i2c_7: i2c@12CD0000 {
 315                 compatible = "samsung,s3c2440-i2c";
 316                 reg = <0x12CD0000 0x100>;
 317                 interrupts = <0 63 0>;
 318                 #address-cells = <1>;
 319                 #size-cells = <0>;
 320                 clocks = <&clock 301>;
 321                 clock-names = "i2c";
 322                 pinctrl-names = "default";
 323                 pinctrl-0 = <&i2c7_bus>;
 324         };
 325
 326         i2c_8: i2c@12CE0000 {
 327                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 328                 reg = <0x12CE0000 0x1000>;
 329                 interrupts = <0 64 0>;
 330                 #address-cells = <1>;
 331                 #size-cells = <0>;
 332                 clocks = <&clock 302>;
 333                 clock-names = "i2c";
 334         };
 335
 336         i2c@121D0000 {
 337                 compatible = "samsung,exynos5-sata-phy-i2c";
 338                 reg = <0x121D0000 0x100>;
 339                 #address-cells = <1>;
 340                 #size-cells = <0>;
 341                 clocks = <&clock 288>;
 342                 clock-names = "i2c";
 343         };
 344
 345         spi_0: spi@12d20000 {
 346                 compatible = "samsung,exynos4210-spi";
 347                 reg = <0x12d20000 0x100>;
 348                 interrupts = <0 66 0>;
 349                 dmas = <&pdma0 5
 350                         &pdma0 4>;
 351                 dma-names = "tx", "rx";
 352                 #address-cells = <1>;
 353                 #size-cells = <0>;
 354                 clocks = <&clock 304>, <&clock 154>;
 355                 clock-names = "spi", "spi_busclk0";
 356                 pinctrl-names = "default";
 357                 pinctrl-0 = <&spi0_bus>;
 358         };
 359
 360         spi_1: spi@12d30000 {
 361                 compatible = "samsung,exynos4210-spi";
 362                 reg = <0x12d30000 0x100>;
 363                 interrupts = <0 67 0>;
 364                 dmas = <&pdma1 5
 365                         &pdma1 4>;
 366                 dma-names = "tx", "rx";
 367                 #address-cells = <1>;
 368                 #size-cells = <0>;
 369                 clocks = <&clock 305>, <&clock 155>;
 370                 clock-names = "spi", "spi_busclk0";
 371                 pinctrl-names = "default";
 372                 pinctrl-0 = <&spi1_bus>;
 373         };
 374
 375         spi_2: spi@12d40000 {
 376                 compatible = "samsung,exynos4210-spi";
 377                 reg = <0x12d40000 0x100>;
 378                 interrupts = <0 68 0>;
 379                 dmas = <&pdma0 7
 380                         &pdma0 6>;
 381                 dma-names = "tx", "rx";
 382                 #address-cells = <1>;
 383                 #size-cells = <0>;
 384                 clocks = <&clock 306>, <&clock 156>;
 385                 clock-names = "spi", "spi_busclk0";
 386                 pinctrl-names = "default";
 387                 pinctrl-0 = <&spi2_bus>;
 388         };
 389
 390         dwmmc_0: dwmmc0@12200000 {
 391                 reg = <0x12200000 0x1000>;
 392                 clocks = <&clock 280>, <&clock 139>;
 393                 clock-names = "biu", "ciu";
 394         };
 395
 396         dwmmc_1: dwmmc1@12210000 {
 397                 reg = <0x12210000 0x1000>;
 398                 clocks = <&clock 281>, <&clock 140>;
 399                 clock-names = "biu", "ciu";
 400         };
 401
 402         dwmmc_2: dwmmc2@12220000 {
 403                 reg = <0x12220000 0x1000>;
 404                 clocks = <&clock 282>, <&clock 141>;
 405                 clock-names = "biu", "ciu";
 406         };
 407
 408         dwmmc_3: dwmmc3@12230000 {
 409                 compatible = "samsung,exynos5250-dw-mshc";
 410                 reg = <0x12230000 0x1000>;
 411                 interrupts = <0 78 0>;
 412                 #address-cells = <1>;
 413                 #size-cells = <0>;
 414                 clocks = <&clock 283>, <&clock 142>;
 415                 clock-names = "biu", "ciu";
 416         };
 417
 418         i2s0: i2s@03830000 {
 419                 compatible = "samsung,s5pv210-i2s";
 420                 reg = <0x03830000 0x100>;
 421                 dmas = <&pdma0 10
 422                         &pdma0 9
 423                         &pdma0 8>;
 424                 dma-names = "tx", "rx", "tx-sec";
 425                 clocks = <&clock_audss EXYNOS_I2S_BUS>,
 426                         <&clock_audss EXYNOS_I2S_BUS>,
 427                         <&clock_audss EXYNOS_SCLK_I2S>;
 428                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 429                 samsung,idma-addr = <0x03000000>;
 430                 pinctrl-names = "default";
 431                 pinctrl-0 = <&i2s0_bus>;
 432         };
 433
 434         i2s1: i2s@12D60000 {
 435                 compatible = "samsung,s3c6410-i2s";
 436                 reg = <0x12D60000 0x100>;
 437                 dmas = <&pdma1 12
 438                         &pdma1 11>;
 439                 dma-names = "tx", "rx";
 440                 clocks = <&clock 307>, <&clock 157>;
 441                 clock-names = "iis", "i2s_opclk0";
 442                 pinctrl-names = "default";
 443                 pinctrl-0 = <&i2s1_bus>;
 444         };
 445
 446         i2s2: i2s@12D70000 {
 447                 compatible = "samsung,s3c6410-i2s";
 448                 reg = <0x12D70000 0x100>;
 449                 dmas = <&pdma0 12
 450                         &pdma0 11>;
 451                 dma-names = "tx", "rx";
 452                 clocks = <&clock 308>, <&clock 158>;
 453                 clock-names = "iis", "i2s_opclk0";
 454                 pinctrl-names = "default";
 455                 pinctrl-0 = <&i2s2_bus>;
 456         };
 457
 458         usb@12000000 {
 459                 compatible = "samsung,exynos5250-dwusb3";
 460                 clocks = <&clock 286>;
 461                 clock-names = "usbdrd30";
 462                 #address-cells = <1>;
 463                 #size-cells = <1>;
 464                 ranges;
 465
 466                 dwc3 {
 467                         compatible = "synopsys,dwc3";
 468                         reg = <0x12000000 0x10000>;
 469                         interrupts = <0 72 0>;
 470                         usb-phy = <&usb2_phy &usb3_phy>;
 471                 };
 472         };
 473
 474         usb3_phy: usbphy@12100000 {
 475                 compatible = "samsung,exynos5250-usb3phy";
 476                 reg = <0x12100000 0x100>;
 477                 clocks = <&clock 1>, <&clock 286>;
 478                 clock-names = "ext_xtal", "usbdrd30";
 479                 #address-cells = <1>;
 480                 #size-cells = <1>;
 481                 ranges;
 482
 483                 usbphy-sys {
 484                         reg = <0x10040704 0x8>;
 485                 };
 486         };
 487
 488         usb@12110000 {
 489                 compatible = "samsung,exynos4210-ehci";
 490                 reg = <0x12110000 0x100>;
 491                 interrupts = <0 71 0>;
 492
 493                 clocks = <&clock 285>;
 494                 clock-names = "usbhost";
 495         };
 496
 497         usb@12120000 {
 498                 compatible = "samsung,exynos4210-ohci";
 499                 reg = <0x12120000 0x100>;
 500                 interrupts = <0 71 0>;
 501
 502                 clocks = <&clock 285>;
 503                 clock-names = "usbhost";
 504         };
 505
 506         usb2_phy: usbphy@12130000 {
 507                 compatible = "samsung,exynos5250-usb2phy";
 508                 reg = <0x12130000 0x100>;
 509                 clocks = <&clock 1>, <&clock 285>;
 510                 clock-names = "ext_xtal", "usbhost";
 511                 #address-cells = <1>;
 512                 #size-cells = <1>;
 513                 ranges;
 514
 515                 usbphy-sys {
 516                         reg = <0x10040704 0x8>,
 517                               <0x10050230 0x4>;
 518                 };
 519         };
 520
 521         amba {
 522                 #address-cells = <1>;
 523                 #size-cells = <1>;
 524                 compatible = "arm,amba-bus";
 525                 interrupt-parent = <&gic>;
 526                 ranges;
 527
 528                 pdma0: pdma@121A0000 {
 529                         compatible = "arm,pl330", "arm,primecell";
 530                         reg = <0x121A0000 0x1000>;
 531                         interrupts = <0 34 0>;
 532                         clocks = <&clock 275>;
 533                         clock-names = "apb_pclk";
 534                         #dma-cells = <1>;
 535                         #dma-channels = <8>;
 536                         #dma-requests = <32>;
 537                 };
 538
 539                 pdma1: pdma@121B0000 {
 540                         compatible = "arm,pl330", "arm,primecell";
 541                         reg = <0x121B0000 0x1000>;
 542                         interrupts = <0 35 0>;
 543                         clocks = <&clock 276>;
 544                         clock-names = "apb_pclk";
 545                         #dma-cells = <1>;
 546                         #dma-channels = <8>;
 547                         #dma-requests = <32>;
 548                 };
 549
 550                 mdma0: mdma@10800000 {
 551                         compatible = "arm,pl330", "arm,primecell";
 552                         reg = <0x10800000 0x1000>;
 553                         interrupts = <0 33 0>;
 554                         clocks = <&clock 271>;
 555                         clock-names = "apb_pclk";
 556                         #dma-cells = <1>;
 557                         #dma-channels = <8>;
 558                         #dma-requests = <1>;
 559                 };
 560
 561                 mdma1: mdma@11C10000 {
 562                         compatible = "arm,pl330", "arm,primecell";
 563                         reg = <0x11C10000 0x1000>;
 564                         interrupts = <0 124 0>;
 565                         clocks = <&clock 271>;
 566                         clock-names = "apb_pclk";
 567                         #dma-cells = <1>;
 568                         #dma-channels = <8>;
 569                         #dma-requests = <1>;
 570                 };
 571         };
 572
 573         gsc_0:  gsc@13e00000 {
 574                 compatible = "samsung,exynos5-gsc";
 575                 reg = <0x13e00000 0x1000>;
 576                 interrupts = <0 85 0>;
 577                 samsung,power-domain = <&pd_gsc>;
 578                 clocks = <&clock 256>;
 579                 clock-names = "gscl";
 580         };
 581
 582         gsc_1:  gsc@13e10000 {
 583                 compatible = "samsung,exynos5-gsc";
 584                 reg = <0x13e10000 0x1000>;
 585                 interrupts = <0 86 0>;
 586                 samsung,power-domain = <&pd_gsc>;
 587                 clocks = <&clock 257>;
 588                 clock-names = "gscl";
 589         };
 590
 591         gsc_2:  gsc@13e20000 {
 592                 compatible = "samsung,exynos5-gsc";
 593                 reg = <0x13e20000 0x1000>;
 594                 interrupts = <0 87 0>;
 595                 samsung,power-domain = <&pd_gsc>;
 596                 clocks = <&clock 258>;
 597                 clock-names = "gscl";
 598         };
 599
 600         gsc_3:  gsc@13e30000 {
 601                 compatible = "samsung,exynos5-gsc";
 602                 reg = <0x13e30000 0x1000>;
 603                 interrupts = <0 88 0>;
 604                 samsung,power-domain = <&pd_gsc>;
 605                 clocks = <&clock 259>;
 606                 clock-names = "gscl";
 607         };
 608
 609         hdmi {
 610                 compatible = "samsung,exynos4212-hdmi";
 611                 reg = <0x14530000 0x70000>;
 612                 interrupts = <0 95 0>;
 613                 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
 614                                 <&clock 333>, <&clock 333>;
 615                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 616                                 "sclk_hdmiphy", "hdmiphy";
 617         };
 618
 619         mixer {
 620                 compatible = "samsung,exynos5250-mixer";
 621                 reg = <0x14450000 0x10000>;
 622                 interrupts = <0 94 0>;
 623         };
 624
 625         dp_phy: video-phy@10040720 {
 626                 compatible = "samsung,exynos5250-dp-video-phy";
 627                 reg = <0x10040720 4>;
 628                 #phy-cells = <0>;
 629         };
 630
 631         dp-controller@145B0000 {
 632                 clocks = <&clock 342>;
 633                 clock-names = "dp";
 634                 phys = <&dp_phy>;
 635                 phy-names = "dp";
 636         };
 637
 638         fimd@14400000 {
 639                 clocks = <&clock 133>, <&clock 339>;
 640                 clock-names = "sclk_fimd", "fimd";
 641         };
 642
 643         adc: adc@12D10000 {
 644                 compatible = "samsung,exynos-adc-v1";
 645                 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
 646                 interrupts = <0 106 0>;
 647                 clocks = <&clock 303>;
 648                 clock-names = "adc";
 649                 #io-channel-cells = <1>;
 650                 io-channel-ranges;
 651                 status = "disabled";
 652         };
 653 };