2 * SAMSUNG EXYNOS5250 SoC device tree source
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
8 * EXYNOS5250 based board files can include this file and provide
9 * values for board specfic bindings.
11 * Note: This file does not include device nodes for all the controllers in
12 * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
13 * additional nodes can be added to this file.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include "exynos5.dtsi"
21 #include "exynos5250-pinctrl.dtsi"
23 #include <dt-bindings/clk/exynos-audss-clk.h>
26 compatible = "samsung,exynos5250";
49 pinctrl0 = &pinctrl_0;
50 pinctrl1 = &pinctrl_1;
51 pinctrl2 = &pinctrl_2;
52 pinctrl3 = &pinctrl_3;
61 compatible = "arm,cortex-a15";
66 compatible = "arm,cortex-a15";
71 pd_gsc: gsc-power-domain@10044000 {
72 compatible = "samsung,exynos4210-pd";
73 reg = <0x10044000 0x20>;
76 pd_mfc: mfc-power-domain@10044040 {
77 compatible = "samsung,exynos4210-pd";
78 reg = <0x10044040 0x20>;
81 clock: clock-controller@10010000 {
82 compatible = "samsung,exynos5250-clock";
83 reg = <0x10010000 0x30000>;
87 clock_audss: audss-clock-controller@3810000 {
88 compatible = "samsung,exynos5250-audss-clock";
89 reg = <0x03810000 0x0C>;
94 compatible = "arm,armv7-timer";
95 interrupts = <1 13 0xf08>,
99 /* Unfortunately we need this since some versions of U-Boot
100 * on Exynos don't set the CNTFRQ register, so we need the
103 clock-frequency = <24000000>;
107 compatible = "samsung,exynos4210-mct";
108 reg = <0x101C0000 0x800>;
109 interrupt-controller;
110 #interrups-cells = <2>;
111 interrupt-parent = <&mct_map>;
112 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
114 clocks = <&clock 1>, <&clock 335>;
115 clock-names = "fin_pll", "mct";
118 #interrupt-cells = <2>;
119 #address-cells = <0>;
121 interrupt-map = <0x0 0 &combiner 23 3>,
122 <0x1 0 &combiner 23 4>,
123 <0x2 0 &combiner 25 2>,
124 <0x3 0 &combiner 25 3>,
125 <0x4 0 &gic 0 120 0>,
126 <0x5 0 &gic 0 121 0>;
131 compatible = "arm,cortex-a15-pmu";
132 interrupt-parent = <&combiner>;
133 interrupts = <1 2>, <22 4>;
136 pinctrl_0: pinctrl@11400000 {
137 compatible = "samsung,exynos5250-pinctrl";
138 reg = <0x11400000 0x1000>;
139 interrupts = <0 46 0>;
141 wakup_eint: wakeup-interrupt-controller {
142 compatible = "samsung,exynos4210-wakeup-eint";
143 interrupt-parent = <&gic>;
144 interrupts = <0 32 0>;
148 pinctrl_1: pinctrl@13400000 {
149 compatible = "samsung,exynos5250-pinctrl";
150 reg = <0x13400000 0x1000>;
151 interrupts = <0 45 0>;
154 pinctrl_2: pinctrl@10d10000 {
155 compatible = "samsung,exynos5250-pinctrl";
156 reg = <0x10d10000 0x1000>;
157 interrupts = <0 50 0>;
160 pinctrl_3: pinctrl@03860000 {
161 compatible = "samsung,exynos5250-pinctrl";
162 reg = <0x03860000 0x1000>;
163 interrupts = <0 47 0>;
167 clocks = <&clock 336>;
168 clock-names = "watchdog";
172 compatible = "samsung,exynos5250-g2d";
173 reg = <0x10850000 0x1000>;
174 interrupts = <0 91 0>;
175 clocks = <&clock 345>;
176 clock-names = "fimg2d";
180 compatible = "samsung,mfc-v6";
181 reg = <0x11000000 0x10000>;
182 interrupts = <0 96 0>;
183 samsung,power-domain = <&pd_mfc>;
184 clocks = <&clock 266>;
189 clocks = <&clock 337>;
195 compatible = "samsung,exynos5250-tmu";
196 reg = <0x10060000 0x100>;
197 interrupts = <0 65 0>;
198 clocks = <&clock 338>;
199 clock-names = "tmu_apbif";
203 clocks = <&clock 289>, <&clock 146>;
204 clock-names = "uart", "clk_uart_baud0";
208 clocks = <&clock 290>, <&clock 147>;
209 clock-names = "uart", "clk_uart_baud0";
213 clocks = <&clock 291>, <&clock 148>;
214 clock-names = "uart", "clk_uart_baud0";
218 clocks = <&clock 292>, <&clock 149>;
219 clock-names = "uart", "clk_uart_baud0";
223 compatible = "samsung,exynos5-sata-ahci";
224 reg = <0x122F0000 0x1ff>;
225 interrupts = <0 115 0>;
226 clocks = <&clock 277>, <&clock 143>;
227 clock-names = "sata", "sclk_sata";
231 compatible = "samsung,exynos5-sata-phy";
232 reg = <0x12170000 0x1ff>;
235 i2c_0: i2c@12C60000 {
236 compatible = "samsung,s3c2440-i2c";
237 reg = <0x12C60000 0x100>;
238 interrupts = <0 56 0>;
239 #address-cells = <1>;
241 clocks = <&clock 294>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&i2c0_bus>;
247 i2c_1: i2c@12C70000 {
248 compatible = "samsung,s3c2440-i2c";
249 reg = <0x12C70000 0x100>;
250 interrupts = <0 57 0>;
251 #address-cells = <1>;
253 clocks = <&clock 295>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&i2c1_bus>;
259 i2c_2: i2c@12C80000 {
260 compatible = "samsung,s3c2440-i2c";
261 reg = <0x12C80000 0x100>;
262 interrupts = <0 58 0>;
263 #address-cells = <1>;
265 clocks = <&clock 296>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&i2c2_bus>;
271 i2c_3: i2c@12C90000 {
272 compatible = "samsung,s3c2440-i2c";
273 reg = <0x12C90000 0x100>;
274 interrupts = <0 59 0>;
275 #address-cells = <1>;
277 clocks = <&clock 297>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&i2c3_bus>;
283 i2c_4: i2c@12CA0000 {
284 compatible = "samsung,s3c2440-i2c";
285 reg = <0x12CA0000 0x100>;
286 interrupts = <0 60 0>;
287 #address-cells = <1>;
289 clocks = <&clock 298>;
291 pinctrl-names = "default";
292 pinctrl-0 = <&i2c4_bus>;
295 i2c_5: i2c@12CB0000 {
296 compatible = "samsung,s3c2440-i2c";
297 reg = <0x12CB0000 0x100>;
298 interrupts = <0 61 0>;
299 #address-cells = <1>;
301 clocks = <&clock 299>;
303 pinctrl-names = "default";
304 pinctrl-0 = <&i2c5_bus>;
307 i2c_6: i2c@12CC0000 {
308 compatible = "samsung,s3c2440-i2c";
309 reg = <0x12CC0000 0x100>;
310 interrupts = <0 62 0>;
311 #address-cells = <1>;
313 clocks = <&clock 300>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c6_bus>;
319 i2c_7: i2c@12CD0000 {
320 compatible = "samsung,s3c2440-i2c";
321 reg = <0x12CD0000 0x100>;
322 interrupts = <0 63 0>;
323 #address-cells = <1>;
325 clocks = <&clock 301>;
327 pinctrl-names = "default";
328 pinctrl-0 = <&i2c7_bus>;
331 i2c_8: i2c@12CE0000 {
332 compatible = "samsung,s3c2440-hdmiphy-i2c";
333 reg = <0x12CE0000 0x1000>;
334 interrupts = <0 64 0>;
335 #address-cells = <1>;
337 clocks = <&clock 302>;
342 compatible = "samsung,exynos5-sata-phy-i2c";
343 reg = <0x121D0000 0x100>;
344 #address-cells = <1>;
346 clocks = <&clock 288>;
350 spi_0: spi@12d20000 {
351 compatible = "samsung,exynos4210-spi";
352 reg = <0x12d20000 0x100>;
353 interrupts = <0 66 0>;
356 dma-names = "tx", "rx";
357 #address-cells = <1>;
359 clocks = <&clock 304>, <&clock 154>;
360 clock-names = "spi", "spi_busclk0";
361 pinctrl-names = "default";
362 pinctrl-0 = <&spi0_bus>;
365 spi_1: spi@12d30000 {
366 compatible = "samsung,exynos4210-spi";
367 reg = <0x12d30000 0x100>;
368 interrupts = <0 67 0>;
371 dma-names = "tx", "rx";
372 #address-cells = <1>;
374 clocks = <&clock 305>, <&clock 155>;
375 clock-names = "spi", "spi_busclk0";
376 pinctrl-names = "default";
377 pinctrl-0 = <&spi1_bus>;
380 spi_2: spi@12d40000 {
381 compatible = "samsung,exynos4210-spi";
382 reg = <0x12d40000 0x100>;
383 interrupts = <0 68 0>;
386 dma-names = "tx", "rx";
387 #address-cells = <1>;
389 clocks = <&clock 306>, <&clock 156>;
390 clock-names = "spi", "spi_busclk0";
391 pinctrl-names = "default";
392 pinctrl-0 = <&spi2_bus>;
395 mmc_0: mmc@12200000 {
396 compatible = "samsung,exynos5250-dw-mshc";
397 interrupts = <0 75 0>;
398 #address-cells = <1>;
400 reg = <0x12200000 0x1000>;
401 clocks = <&clock 280>, <&clock 139>;
402 clock-names = "biu", "ciu";
407 mmc_1: mmc@12210000 {
408 compatible = "samsung,exynos5250-dw-mshc";
409 interrupts = <0 76 0>;
410 #address-cells = <1>;
412 reg = <0x12210000 0x1000>;
413 clocks = <&clock 281>, <&clock 140>;
414 clock-names = "biu", "ciu";
419 mmc_2: mmc@12220000 {
420 compatible = "samsung,exynos5250-dw-mshc";
421 interrupts = <0 77 0>;
422 #address-cells = <1>;
424 reg = <0x12220000 0x1000>;
425 clocks = <&clock 282>, <&clock 141>;
426 clock-names = "biu", "ciu";
431 mmc_3: mmc@12230000 {
432 compatible = "samsung,exynos5250-dw-mshc";
433 reg = <0x12230000 0x1000>;
434 interrupts = <0 78 0>;
435 #address-cells = <1>;
437 clocks = <&clock 283>, <&clock 142>;
438 clock-names = "biu", "ciu";
444 compatible = "samsung,s5pv210-i2s";
446 reg = <0x03830000 0x100>;
450 dma-names = "tx", "rx", "tx-sec";
451 clocks = <&clock_audss EXYNOS_I2S_BUS>,
452 <&clock_audss EXYNOS_I2S_BUS>,
453 <&clock_audss EXYNOS_SCLK_I2S>;
454 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
455 samsung,idma-addr = <0x03000000>;
456 pinctrl-names = "default";
457 pinctrl-0 = <&i2s0_bus>;
461 compatible = "samsung,s3c6410-i2s";
463 reg = <0x12D60000 0x100>;
466 dma-names = "tx", "rx";
467 clocks = <&clock 307>, <&clock 157>;
468 clock-names = "iis", "i2s_opclk0";
469 pinctrl-names = "default";
470 pinctrl-0 = <&i2s1_bus>;
474 compatible = "samsung,s3c6410-i2s";
476 reg = <0x12D70000 0x100>;
479 dma-names = "tx", "rx";
480 clocks = <&clock 308>, <&clock 158>;
481 clock-names = "iis", "i2s_opclk0";
482 pinctrl-names = "default";
483 pinctrl-0 = <&i2s2_bus>;
487 compatible = "samsung,exynos5250-dwusb3";
488 clocks = <&clock 286>;
489 clock-names = "usbdrd30";
490 #address-cells = <1>;
495 compatible = "synopsys,dwc3";
496 reg = <0x12000000 0x10000>;
497 interrupts = <0 72 0>;
498 usb-phy = <&usb2_phy &usb3_phy>;
502 usb3_phy: usbphy@12100000 {
503 compatible = "samsung,exynos5250-usb3phy";
504 reg = <0x12100000 0x100>;
505 clocks = <&clock 1>, <&clock 286>;
506 clock-names = "ext_xtal", "usbdrd30";
507 #address-cells = <1>;
512 reg = <0x10040704 0x8>;
517 compatible = "samsung,exynos4210-ehci";
518 reg = <0x12110000 0x100>;
519 interrupts = <0 71 0>;
521 clocks = <&clock 285>;
522 clock-names = "usbhost";
526 compatible = "samsung,exynos4210-ohci";
527 reg = <0x12120000 0x100>;
528 interrupts = <0 71 0>;
530 clocks = <&clock 285>;
531 clock-names = "usbhost";
534 usb2_phy: usbphy@12130000 {
535 compatible = "samsung,exynos5250-usb2phy";
536 reg = <0x12130000 0x100>;
537 clocks = <&clock 1>, <&clock 285>;
538 clock-names = "ext_xtal", "usbhost";
539 #address-cells = <1>;
544 reg = <0x10040704 0x8>,
550 #address-cells = <1>;
552 compatible = "arm,amba-bus";
553 interrupt-parent = <&gic>;
556 pdma0: pdma@121A0000 {
557 compatible = "arm,pl330", "arm,primecell";
558 reg = <0x121A0000 0x1000>;
559 interrupts = <0 34 0>;
560 clocks = <&clock 275>;
561 clock-names = "apb_pclk";
564 #dma-requests = <32>;
567 pdma1: pdma@121B0000 {
568 compatible = "arm,pl330", "arm,primecell";
569 reg = <0x121B0000 0x1000>;
570 interrupts = <0 35 0>;
571 clocks = <&clock 276>;
572 clock-names = "apb_pclk";
575 #dma-requests = <32>;
578 mdma0: mdma@10800000 {
579 compatible = "arm,pl330", "arm,primecell";
580 reg = <0x10800000 0x1000>;
581 interrupts = <0 33 0>;
582 clocks = <&clock 271>;
583 clock-names = "apb_pclk";
589 mdma1: mdma@11C10000 {
590 compatible = "arm,pl330", "arm,primecell";
591 reg = <0x11C10000 0x1000>;
592 interrupts = <0 124 0>;
593 clocks = <&clock 271>;
594 clock-names = "apb_pclk";
601 gsc_0: gsc@13e00000 {
602 compatible = "samsung,exynos5-gsc";
603 reg = <0x13e00000 0x1000>;
604 interrupts = <0 85 0>;
605 samsung,power-domain = <&pd_gsc>;
606 clocks = <&clock 256>;
607 clock-names = "gscl";
610 gsc_1: gsc@13e10000 {
611 compatible = "samsung,exynos5-gsc";
612 reg = <0x13e10000 0x1000>;
613 interrupts = <0 86 0>;
614 samsung,power-domain = <&pd_gsc>;
615 clocks = <&clock 257>;
616 clock-names = "gscl";
619 gsc_2: gsc@13e20000 {
620 compatible = "samsung,exynos5-gsc";
621 reg = <0x13e20000 0x1000>;
622 interrupts = <0 87 0>;
623 samsung,power-domain = <&pd_gsc>;
624 clocks = <&clock 258>;
625 clock-names = "gscl";
628 gsc_3: gsc@13e30000 {
629 compatible = "samsung,exynos5-gsc";
630 reg = <0x13e30000 0x1000>;
631 interrupts = <0 88 0>;
632 samsung,power-domain = <&pd_gsc>;
633 clocks = <&clock 259>;
634 clock-names = "gscl";
638 compatible = "samsung,exynos4212-hdmi";
639 reg = <0x14530000 0x70000>;
640 interrupts = <0 95 0>;
641 clocks = <&clock 344>, <&clock 136>, <&clock 137>,
642 <&clock 159>, <&clock 1024>;
643 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
644 "sclk_hdmiphy", "mout_hdmi";
648 compatible = "samsung,exynos5250-mixer";
649 reg = <0x14450000 0x10000>;
650 interrupts = <0 94 0>;
651 clocks = <&clock 343>, <&clock 136>;
652 clock-names = "mixer", "sclk_hdmi";
655 dp_phy: video-phy@10040720 {
656 compatible = "samsung,exynos5250-dp-video-phy";
657 reg = <0x10040720 4>;
661 dp-controller@145B0000 {
662 clocks = <&clock 342>;
669 clocks = <&clock 133>, <&clock 339>;
670 clock-names = "sclk_fimd", "fimd";
674 compatible = "samsung,exynos-adc-v1";
675 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
676 interrupts = <0 106 0>;
677 clocks = <&clock 303>;
679 #io-channel-cells = <1>;